RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
> -Original Message- > From: Vinod Koul [mailto:vinod.k...@intel.com] > Sent: Monday, September 23, 2013 12:26 PM > To: Lu Jingchang-B35083 > Cc: d...@fb.com; shawn@linaro.org; linux-kernel@vger.kernel.org; > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org > Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support > > On Tue, Sep 17, 2013 at 08:08:46AM +, Lu Jingchang-B35083 wrote: > > > > + case DMA_PAUSE: > > > > + if (fsl_chan->edesc) > > > > + fsl_edma_disable_request(fsl_chan); > > > racy here too... > > It only set the channel HW register, no list is handled, > > is lock needed here? Thanks! > well thats the point while you are terminating the current trasnaction > can > complete and then start another one. You want to try and prevent these > case > also. Here you are neither locking the HW access nor the the list, so its > juts > waiting to crash! Thanks! I have sent out the new v6 patch last week with holding lock here, Could you please help review it? Best Regards, Jingchang
RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
-Original Message- From: Vinod Koul [mailto:vinod.k...@intel.com] Sent: Monday, September 23, 2013 12:26 PM To: Lu Jingchang-B35083 Cc: d...@fb.com; shawn@linaro.org; linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support On Tue, Sep 17, 2013 at 08:08:46AM +, Lu Jingchang-B35083 wrote: + case DMA_PAUSE: + if (fsl_chan-edesc) + fsl_edma_disable_request(fsl_chan); racy here too... It only set the channel HW register, no list is handled, is lock needed here? Thanks! well thats the point while you are terminating the current trasnaction can complete and then start another one. You want to try and prevent these case also. Here you are neither locking the HW access nor the the list, so its juts waiting to crash! Thanks! I have sent out the new v6 patch last week with holding lock here, Could you please help review it? Best Regards, Jingchang
Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
On Tue, Sep 17, 2013 at 08:08:46AM +, Lu Jingchang-B35083 wrote: > > > + case DMA_PAUSE: > > > + if (fsl_chan->edesc) > > > + fsl_edma_disable_request(fsl_chan); > > racy here too... > It only set the channel HW register, no list is handled, > is lock needed here? Thanks! well thats the point while you are terminating the current trasnaction can complete and then start another one. You want to try and prevent these case also. Here you are neither locking the HW access nor the the list, so its juts waiting to crash! ~Vinod -- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
On Tue, Sep 17, 2013 at 08:08:46AM +, Lu Jingchang-B35083 wrote: + case DMA_PAUSE: + if (fsl_chan-edesc) + fsl_edma_disable_request(fsl_chan); racy here too... It only set the channel HW register, no list is handled, is lock needed here? Thanks! well thats the point while you are terminating the current trasnaction can complete and then start another one. You want to try and prevent these case also. Here you are neither locking the HW access nor the the list, so its juts waiting to crash! ~Vinod -- -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
> -Original Message- > From: Vinod Koul [mailto:vinod.k...@intel.com] > Sent: Tuesday, September 17, 2013 12:54 PM > To: Lu Jingchang-B35083 > Cc: d...@fb.com; shawn@linaro.org; linux-kernel@vger.kernel.org; > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; Wang > Huan-B18965 > Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support > > + case DMA_PAUSE: > > + if (fsl_chan->edesc) > > + fsl_edma_disable_request(fsl_chan); > racy here too... It only set the channel HW register, no list is handled, is lock needed here? Thanks! Best Regards, Jingchang
RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
> -Original Message-
> From: Vinod Koul [mailto:vinod.k...@intel.com]
> Sent: Tuesday, September 17, 2013 12:54 PM
> To: Lu Jingchang-B35083
> Cc: d...@fb.com; shawn@linaro.org; linux-kernel@vger.kernel.org;
> linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; Wang
> Huan-B18965
> Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
>
> I need ACK from DT maintainers on the above parts
Should I cc this to one of the DT maintainers? Thanks.
>
> > +static int fsl_edma_control(struct dma_chan *chan, enum dma_ctrl_cmd
> cmd,
> > + unsigned long arg)
> > +{
> > + struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
> > + struct dma_slave_config *cfg = (void *)arg;
> > +
> > + switch (cmd) {
> > + case DMA_TERMINATE_ALL:
> > + fsl_edma_disable_request(fsl_chan);
> > + fsl_chan->edesc = NULL;
> you need to hold the lock here to prevent race here!
Thanks, I will fix this in the next version of the patch.
>
> > + vchan_free_chan_resources(_chan->vchan);
> > + return 0;
> > +
> > + case DMA_SLAVE_CONFIG:
> > + fsl_chan->fsc.dir = cfg->direction;
> > + if (cfg->direction == DMA_DEV_TO_MEM) {
> > + fsl_chan->fsc.dev_addr = cfg->src_addr;
> > + fsl_chan->fsc.addr_width = cfg->src_addr_width;
> > + fsl_chan->fsc.burst = cfg->src_maxburst;
> > + fsl_chan->fsc.attr = fsl_edma_get_tcd_attr(cfg-
> >src_addr_width);
> > + } else if (cfg->direction == DMA_MEM_TO_DEV) {
> > + fsl_chan->fsc.dev_addr = cfg->dst_addr;
> > + fsl_chan->fsc.addr_width = cfg->dst_addr_width;
> > + fsl_chan->fsc.burst = cfg->dst_maxburst;
> > + fsl_chan->fsc.attr = fsl_edma_get_tcd_attr(cfg-
> >dst_addr_width);
> > + } else {
> > + return -EINVAL;
> > + }
> > +
> > + if (!cfg->slave_id) {
> > + return -EINVAL;
> should you check for this first, you wrote the channel with config above
> and now
> returning error?
Yes, the slave id should be checked first, thanks!
> > + spin_lock_irqsave(_chan->vchan.lock, flags);
> > + vdesc = vchan_find_desc(_chan->vchan, cookie);
> > + if (fsl_chan->edesc && cookie == fsl_chan->edesc->vdesc.tx.cookie)
> > + txstate->residue = fsl_edma_desc_residue(fsl_chan, vdesc, 1);
> why not use true/false for the last bool arg?
Thanks, I will use true/false instead.
Best Regards,
Jingchang
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RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
-Original Message-
From: Vinod Koul [mailto:vinod.k...@intel.com]
Sent: Tuesday, September 17, 2013 12:54 PM
To: Lu Jingchang-B35083
Cc: d...@fb.com; shawn@linaro.org; linux-kernel@vger.kernel.org;
linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; Wang
Huan-B18965
Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
I need ACK from DT maintainers on the above parts
Should I cc this to one of the DT maintainers? Thanks.
+static int fsl_edma_control(struct dma_chan *chan, enum dma_ctrl_cmd
cmd,
+ unsigned long arg)
+{
+ struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
+ struct dma_slave_config *cfg = (void *)arg;
+
+ switch (cmd) {
+ case DMA_TERMINATE_ALL:
+ fsl_edma_disable_request(fsl_chan);
+ fsl_chan-edesc = NULL;
you need to hold the lock here to prevent race here!
Thanks, I will fix this in the next version of the patch.
+ vchan_free_chan_resources(fsl_chan-vchan);
+ return 0;
+
+ case DMA_SLAVE_CONFIG:
+ fsl_chan-fsc.dir = cfg-direction;
+ if (cfg-direction == DMA_DEV_TO_MEM) {
+ fsl_chan-fsc.dev_addr = cfg-src_addr;
+ fsl_chan-fsc.addr_width = cfg-src_addr_width;
+ fsl_chan-fsc.burst = cfg-src_maxburst;
+ fsl_chan-fsc.attr = fsl_edma_get_tcd_attr(cfg-
src_addr_width);
+ } else if (cfg-direction == DMA_MEM_TO_DEV) {
+ fsl_chan-fsc.dev_addr = cfg-dst_addr;
+ fsl_chan-fsc.addr_width = cfg-dst_addr_width;
+ fsl_chan-fsc.burst = cfg-dst_maxburst;
+ fsl_chan-fsc.attr = fsl_edma_get_tcd_attr(cfg-
dst_addr_width);
+ } else {
+ return -EINVAL;
+ }
+
+ if (!cfg-slave_id) {
+ return -EINVAL;
should you check for this first, you wrote the channel with config above
and now
returning error?
Yes, the slave id should be checked first, thanks!
+ spin_lock_irqsave(fsl_chan-vchan.lock, flags);
+ vdesc = vchan_find_desc(fsl_chan-vchan, cookie);
+ if (fsl_chan-edesc cookie == fsl_chan-edesc-vdesc.tx.cookie)
+ txstate-residue = fsl_edma_desc_residue(fsl_chan, vdesc, 1);
why not use true/false for the last bool arg?
Thanks, I will use true/false instead.
Best Regards,
Jingchang
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RE: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
-Original Message- From: Vinod Koul [mailto:vinod.k...@intel.com] Sent: Tuesday, September 17, 2013 12:54 PM To: Lu Jingchang-B35083 Cc: d...@fb.com; shawn@linaro.org; linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; Wang Huan-B18965 Subject: Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support + case DMA_PAUSE: + if (fsl_chan-edesc) + fsl_edma_disable_request(fsl_chan); racy here too... It only set the channel HW register, no list is handled, is lock needed here? Thanks! Best Regards, Jingchang
Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
On Thu, Sep 05, 2013 at 05:53:19PM +0800, Jingchang Lu wrote:
> Add Freescale enhanced direct memory(eDMA) controller support.
> The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
> to eDMA channels.
> This module can be found on Vybrid and LS-1 SoCs.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Jingchang Lu
> ---
> changes in v5:
> config slave_id when dmaengine_slave_config intead of channel request.
> adding residue calculation and dma pause/resume device control.
>
> changes in v4:
> using exact compatible string in binding document.
>
> changes in v3:
> handle all pending interrupt one time.
> add protect lock on dma transfer complete handling.
> change desc and tcd alloc flag to GFP_NOWAIT.
> add sanity check and error messages.
>
> changes in v2:
> using generic dma-channels property instead of fsl,dma-channel.
> rename the binding document to fsl-edma.txt.
>
> Documentation/devicetree/bindings/dma/fsl-edma.txt | 84 ++
> drivers/dma/Kconfig| 10 +
> drivers/dma/Makefile | 1 +
> drivers/dma/fsl-edma.c | 925
> +
> 4 files changed, 1020 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/fsl-edma.txt
> create mode 100644 drivers/dma/fsl-edma.c
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl-edma.txt
> b/Documentation/devicetree/bindings/dma/fsl-edma.txt
> new file mode 100644
> index 000..60a8cb2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl-edma.txt
> @@ -0,0 +1,84 @@
> +* Freescale enhanced Direct Memory Access(eDMA) Controller
> +
> +The eDMA engine deploys DMAMUXs routing request sources(slot) to
> +eDMA controller channels.
> +
> +* eDMA Controller
> +Required properties:
> +- compatible :
> + - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
> +- reg : Should contain eDMA registers location and length
> +- interrupts : Should contain eDMA interrupt
> +- interrupt-names : Should be "edma-tx" for tx interrupt and
> + "edma-err" for err interrupt
> +- #dma-cells : Must be <2>.
> + The first cell specifies the DMAMUX ID. Specific request source
> + can only be routed by specific DMAMUXs.
> + the second cell specifies the request source(slot) ID.
> + See include/dt-bindings/dma/-edma.h for all the supported
> + request source IDs.
> +- dma-channels : Number of channels supported by the controller
> +- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
> +
> +
> +* DMAMUX
> +Required properties:
> +- reg : Should contain DMAMUX registers location and length
> +- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
> + inside one eDMA controller, specific request source can only be routed by
> + one of its DMAMUXs.
> + However Specific request source may be routed to different eDMA controller,
> + thus all the DMAMUXs sharing a the same request sources have the same ID.
> +- clocks : Phandle of the clock used by the DMAMUX
> +- clock-names : The clock names
> +
> +Below is the eDMA controller and DMAMUX association, and DMAMUX IDs
> assignment
> +On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
> +and DMAMUX1 and DMAMU2 share the same request source group.
> +
> +eDMA controller DMAMUXs DMAMUX ID
> +-
> +eDMA0DMAMUX0 0
> + DMAMUX1 1
> +
> +eDMA1DMAMUX2 1
> + DMAMUX3 0
> +
> +Examples:
> +
> +edma0: dma-controller@40018000 {
> + #dma-cells = <2>;
> + compatible = "fsl,vf610-edma";
> + reg = <0x40018000 0x2000>;
> + interrupts = <0 8 0x04>, <0 9 0x04>;
> + interrupt-names = "edma-tx", "edma-err";
> + dma-channels = <32>;
> + fsl,edma-mux = <>, <>;
> +};
> +
> +dmamux0: dmamux@40024000 {
> + reg = <0x40024000 0x1000>;
> + fsl,dmamux-id = <0>;
> + clocks = < VF610_CLK_DMAMUX0>;
> + clock-names = "dmamux";
> +};
> +
> +
> +* DMA clients
> +DMA client drivers that uses the DMA function must use the format described
> +in the dma.txt file, using a three-cell specifier for each channel: a phandle
> +plus two integer cells as described above.
> +
> +Examples:
> +
> +sai2: sai@40031000 {
> + compatible = "fsl,vf610-sai";
> + reg = <0x40031000 0x1000>;
> + interrupts = <0 86 0x04>;
> + clocks = < VF610_CLK_SAI2>;
> + clock-names = "sai";
> + dma-names = "tx", "rx";
> + dmas = < 0 VF610_EDMA_MUXID0_SAI2_TX>,
> + < 0 VF610_EDMA_MUXID0_SAI2_RX>;
> + status = "disabled";
> +};
I need ACK from DT maintainers on the above parts
> +static int fsl_edma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
> + unsigned long arg)
> +{
> + struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
> + struct
Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
On Thu, Sep 05, 2013 at 05:53:19PM +0800, Jingchang Lu wrote:
Add Freescale enhanced direct memory(eDMA) controller support.
The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
to eDMA channels.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
---
changes in v5:
config slave_id when dmaengine_slave_config intead of channel request.
adding residue calculation and dma pause/resume device control.
changes in v4:
using exact compatible string in binding document.
changes in v3:
handle all pending interrupt one time.
add protect lock on dma transfer complete handling.
change desc and tcd alloc flag to GFP_NOWAIT.
add sanity check and error messages.
changes in v2:
using generic dma-channels property instead of fsl,dma-channel.
rename the binding document to fsl-edma.txt.
Documentation/devicetree/bindings/dma/fsl-edma.txt | 84 ++
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-edma.c | 925
+
4 files changed, 1020 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-edma.txt
create mode 100644 drivers/dma/fsl-edma.c
diff --git a/Documentation/devicetree/bindings/dma/fsl-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-edma.txt
new file mode 100644
index 000..60a8cb2
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-edma.txt
@@ -0,0 +1,84 @@
+* Freescale enhanced Direct Memory Access(eDMA) Controller
+
+The eDMA engine deploys DMAMUXs routing request sources(slot) to
+eDMA controller channels.
+
+* eDMA Controller
+Required properties:
+- compatible :
+ - fsl,vf610-edma for eDMA used similar to that on Vybrid vf610 SoC
+- reg : Should contain eDMA registers location and length
+- interrupts : Should contain eDMA interrupt
+- interrupt-names : Should be edma-tx for tx interrupt and
+ edma-err for err interrupt
+- #dma-cells : Must be 2.
+ The first cell specifies the DMAMUX ID. Specific request source
+ can only be routed by specific DMAMUXs.
+ the second cell specifies the request source(slot) ID.
+ See include/dt-bindings/dma/soc-edma.h for all the supported
+ request source IDs.
+- dma-channels : Number of channels supported by the controller
+- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
+
+
+* DMAMUX
+Required properties:
+- reg : Should contain DMAMUX registers location and length
+- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
+ inside one eDMA controller, specific request source can only be routed by
+ one of its DMAMUXs.
+ However Specific request source may be routed to different eDMA controller,
+ thus all the DMAMUXs sharing a the same request sources have the same ID.
+- clocks : Phandle of the clock used by the DMAMUX
+- clock-names : The clock names
+
+Below is the eDMA controller and DMAMUX association, and DMAMUX IDs
assignment
+On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
+and DMAMUX1 and DMAMU2 share the same request source group.
+
+eDMA controller DMAMUXs DMAMUX ID
+-
+eDMA0DMAMUX0 0
+ DMAMUX1 1
+
+eDMA1DMAMUX2 1
+ DMAMUX3 0
+
+Examples:
+
+edma0: dma-controller@40018000 {
+ #dma-cells = 2;
+ compatible = fsl,vf610-edma;
+ reg = 0x40018000 0x2000;
+ interrupts = 0 8 0x04, 0 9 0x04;
+ interrupt-names = edma-tx, edma-err;
+ dma-channels = 32;
+ fsl,edma-mux = dmamux0, dmamux1;
+};
+
+dmamux0: dmamux@40024000 {
+ reg = 0x40024000 0x1000;
+ fsl,dmamux-id = 0;
+ clocks = clks VF610_CLK_DMAMUX0;
+ clock-names = dmamux;
+};
+
+
+* DMA clients
+DMA client drivers that uses the DMA function must use the format described
+in the dma.txt file, using a three-cell specifier for each channel: a phandle
+plus two integer cells as described above.
+
+Examples:
+
+sai2: sai@40031000 {
+ compatible = fsl,vf610-sai;
+ reg = 0x40031000 0x1000;
+ interrupts = 0 86 0x04;
+ clocks = clks VF610_CLK_SAI2;
+ clock-names = sai;
+ dma-names = tx, rx;
+ dmas = edma0 0 VF610_EDMA_MUXID0_SAI2_TX,
+ edma0 0 VF610_EDMA_MUXID0_SAI2_RX;
+ status = disabled;
+};
I need ACK from DT maintainers on the above parts
+static int fsl_edma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+ unsigned long arg)
+{
+ struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);
+ struct dma_slave_config *cfg = (void *)arg;
+
+ switch (cmd) {
+ case DMA_TERMINATE_ALL:
+
[PATCH 3/3] dma: Add Freescale eDMA engine driver support
Add Freescale enhanced direct memory(eDMA) controller support.
The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
to eDMA channels.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang
Signed-off-by: Jingchang Lu
---
changes in v5:
config slave_id when dmaengine_slave_config intead of channel request.
adding residue calculation and dma pause/resume device control.
changes in v4:
using exact compatible string in binding document.
changes in v3:
handle all pending interrupt one time.
add protect lock on dma transfer complete handling.
change desc and tcd alloc flag to GFP_NOWAIT.
add sanity check and error messages.
changes in v2:
using generic dma-channels property instead of fsl,dma-channel.
rename the binding document to fsl-edma.txt.
Documentation/devicetree/bindings/dma/fsl-edma.txt | 84 ++
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-edma.c | 925 +
4 files changed, 1020 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-edma.txt
create mode 100644 drivers/dma/fsl-edma.c
diff --git a/Documentation/devicetree/bindings/dma/fsl-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-edma.txt
new file mode 100644
index 000..60a8cb2
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-edma.txt
@@ -0,0 +1,84 @@
+* Freescale enhanced Direct Memory Access(eDMA) Controller
+
+The eDMA engine deploys DMAMUXs routing request sources(slot) to
+eDMA controller channels.
+
+* eDMA Controller
+Required properties:
+- compatible :
+ - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
+- reg : Should contain eDMA registers location and length
+- interrupts : Should contain eDMA interrupt
+- interrupt-names : Should be "edma-tx" for tx interrupt and
+ "edma-err" for err interrupt
+- #dma-cells : Must be <2>.
+ The first cell specifies the DMAMUX ID. Specific request source
+ can only be routed by specific DMAMUXs.
+ the second cell specifies the request source(slot) ID.
+ See include/dt-bindings/dma/-edma.h for all the supported
+ request source IDs.
+- dma-channels : Number of channels supported by the controller
+- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
+
+
+* DMAMUX
+Required properties:
+- reg : Should contain DMAMUX registers location and length
+- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
+ inside one eDMA controller, specific request source can only be routed by
+ one of its DMAMUXs.
+ However Specific request source may be routed to different eDMA controller,
+ thus all the DMAMUXs sharing a the same request sources have the same ID.
+- clocks : Phandle of the clock used by the DMAMUX
+- clock-names : The clock names
+
+Below is the eDMA controller and DMAMUX association, and DMAMUX IDs assignment
+On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
+and DMAMUX1 and DMAMU2 share the same request source group.
+
+eDMA controllerDMAMUXs DMAMUX ID
+-
+eDMA0 DMAMUX0 0
+ DMAMUX1 1
+
+eDMA1 DMAMUX2 1
+ DMAMUX3 0
+
+Examples:
+
+edma0: dma-controller@40018000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x40018000 0x2000>;
+ interrupts = <0 8 0x04>, <0 9 0x04>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ fsl,edma-mux = <>, <>;
+};
+
+dmamux0: dmamux@40024000 {
+ reg = <0x40024000 0x1000>;
+ fsl,dmamux-id = <0>;
+ clocks = < VF610_CLK_DMAMUX0>;
+ clock-names = "dmamux";
+};
+
+
+* DMA clients
+DMA client drivers that uses the DMA function must use the format described
+in the dma.txt file, using a three-cell specifier for each channel: a phandle
+plus two integer cells as described above.
+
+Examples:
+
+sai2: sai@40031000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x40031000 0x1000>;
+ interrupts = <0 86 0x04>;
+ clocks = < VF610_CLK_SAI2>;
+ clock-names = "sai";
+ dma-names = "tx", "rx";
+ dmas = < 0 VF610_EDMA_MUXID0_SAI2_TX>,
+ < 0 VF610_EDMA_MUXID0_SAI2_RX>;
+ status = "disabled";
+};
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 526ec77..7d7604d 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -317,6 +317,16 @@ config K3_DMA
Support the DMA engine for Hisilicon K3 platform
devices.
+config FSL_EDMA
+ tristate "Freescale eDMA engine support"
+ depends on OF
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+ help
+ Support the Freescale eDMA engine with DMAMUXs managing route
+ between request sources(slot) and eDMA engine
[PATCH 3/3] dma: Add Freescale eDMA engine driver support
Add Freescale enhanced direct memory(eDMA) controller support.
The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
to eDMA channels.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
---
changes in v5:
config slave_id when dmaengine_slave_config intead of channel request.
adding residue calculation and dma pause/resume device control.
changes in v4:
using exact compatible string in binding document.
changes in v3:
handle all pending interrupt one time.
add protect lock on dma transfer complete handling.
change desc and tcd alloc flag to GFP_NOWAIT.
add sanity check and error messages.
changes in v2:
using generic dma-channels property instead of fsl,dma-channel.
rename the binding document to fsl-edma.txt.
Documentation/devicetree/bindings/dma/fsl-edma.txt | 84 ++
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-edma.c | 925 +
4 files changed, 1020 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-edma.txt
create mode 100644 drivers/dma/fsl-edma.c
diff --git a/Documentation/devicetree/bindings/dma/fsl-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-edma.txt
new file mode 100644
index 000..60a8cb2
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-edma.txt
@@ -0,0 +1,84 @@
+* Freescale enhanced Direct Memory Access(eDMA) Controller
+
+The eDMA engine deploys DMAMUXs routing request sources(slot) to
+eDMA controller channels.
+
+* eDMA Controller
+Required properties:
+- compatible :
+ - fsl,vf610-edma for eDMA used similar to that on Vybrid vf610 SoC
+- reg : Should contain eDMA registers location and length
+- interrupts : Should contain eDMA interrupt
+- interrupt-names : Should be edma-tx for tx interrupt and
+ edma-err for err interrupt
+- #dma-cells : Must be 2.
+ The first cell specifies the DMAMUX ID. Specific request source
+ can only be routed by specific DMAMUXs.
+ the second cell specifies the request source(slot) ID.
+ See include/dt-bindings/dma/soc-edma.h for all the supported
+ request source IDs.
+- dma-channels : Number of channels supported by the controller
+- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
+
+
+* DMAMUX
+Required properties:
+- reg : Should contain DMAMUX registers location and length
+- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
+ inside one eDMA controller, specific request source can only be routed by
+ one of its DMAMUXs.
+ However Specific request source may be routed to different eDMA controller,
+ thus all the DMAMUXs sharing a the same request sources have the same ID.
+- clocks : Phandle of the clock used by the DMAMUX
+- clock-names : The clock names
+
+Below is the eDMA controller and DMAMUX association, and DMAMUX IDs assignment
+On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
+and DMAMUX1 and DMAMU2 share the same request source group.
+
+eDMA controllerDMAMUXs DMAMUX ID
+-
+eDMA0 DMAMUX0 0
+ DMAMUX1 1
+
+eDMA1 DMAMUX2 1
+ DMAMUX3 0
+
+Examples:
+
+edma0: dma-controller@40018000 {
+ #dma-cells = 2;
+ compatible = fsl,vf610-edma;
+ reg = 0x40018000 0x2000;
+ interrupts = 0 8 0x04, 0 9 0x04;
+ interrupt-names = edma-tx, edma-err;
+ dma-channels = 32;
+ fsl,edma-mux = dmamux0, dmamux1;
+};
+
+dmamux0: dmamux@40024000 {
+ reg = 0x40024000 0x1000;
+ fsl,dmamux-id = 0;
+ clocks = clks VF610_CLK_DMAMUX0;
+ clock-names = dmamux;
+};
+
+
+* DMA clients
+DMA client drivers that uses the DMA function must use the format described
+in the dma.txt file, using a three-cell specifier for each channel: a phandle
+plus two integer cells as described above.
+
+Examples:
+
+sai2: sai@40031000 {
+ compatible = fsl,vf610-sai;
+ reg = 0x40031000 0x1000;
+ interrupts = 0 86 0x04;
+ clocks = clks VF610_CLK_SAI2;
+ clock-names = sai;
+ dma-names = tx, rx;
+ dmas = edma0 0 VF610_EDMA_MUXID0_SAI2_TX,
+ edma0 0 VF610_EDMA_MUXID0_SAI2_RX;
+ status = disabled;
+};
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 526ec77..7d7604d 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -317,6 +317,16 @@ config K3_DMA
Support the DMA engine for Hisilicon K3 platform
devices.
+config FSL_EDMA
+ tristate Freescale eDMA engine support
+ depends on OF
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+ help
+ Support the Freescale eDMA engine with DMAMUXs managing route
+ between request
Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
On Fri, Aug 02, 2013 at 03:55:48PM +0800, Jingchang Lu wrote:
> Add Freescale enhanced direct memory(eDMA) controller support.
> The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
> to eDMA channels.
> This module can be found on Vybrid and LS-1 SoCs.
>
> Signed-off-by: Alison Wang
> Signed-off-by: Xiaochun Li
> Signed-off-by: Jingchang Lu
> ---
> .../devicetree/bindings/dma/fsl-vf610-edma.txt | 84 +++
> drivers/dma/Kconfig| 10 +
> drivers/dma/Makefile | 1 +
> drivers/dma/fsl-edma.c | 826
> +
> 4 files changed, 921 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
> create mode 100644 drivers/dma/fsl-edma.c
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
> b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
> new file mode 100644
> index 000..e6dc5cd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
> @@ -0,0 +1,84 @@
> +* Freescale enhanced direct memory access(eDMA) Controller
> +
> +The eDMA engine deploys DMAMUXs routing request sources(slot) to
> +eDMA controller channels.
> +
> +* eDMA Controller
> +Required properties:
> +- compatible : Should be "fsl,-edma"
> +- reg : Should contain eDMA registers location and length
> +- interrupts : Should contain eDMA interrupt
> +- interrupt-names : Should be "edma-tx" for tx interrupt and
> + "edma-err" for err interrupt
> +- #dma-cells : Must be <2>.
> + The first cell specifies the DMAMUX ID. Specific request source
> + can only be routed by specific DMAMUXs.
> + the second cell specifies the request source(slot) ID.
> + See include/dt-bindings/dma/-edma.h for all the supported
> + request source IDs.
> +- fsl,dma-channels : Number of channels supported by the controller
The generic dma bindings Documentation/devicetree/bindings/dma/dma.txt
defines property dma-channels. You shouldn't need a vendor specific
definition.
> +- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
> +
> +
> +* DMAMUX
> +Required properties:
> +- reg : Should contain DMAMUX registers location and length
> +- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
> + inside one eDMA controller, specific request source can only be routed by
> + one of its DMAMUXs.
> + However Specific request source may be routed to different eDMA controller,
> + thus all the DMAMUXs sharing a the same request sources have the same ID.
> +- clocks : Phandle of the clock used by the DMAMUX
> +- clock-names : The clock names
> +
> +Below is the eDMA controller and DMAMUX association, and DMAMUX IDs
> assignment
> +On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
> +and DMAMUX1 and DMAMU2 share the same request source group.
> +
> +eDMA controller DMAMUXs DMAMUX ID
> +-
> +eDMA0DMAMUX0 0
> + DMAMUX1 1
> +
> +eDMA1DMAMUX2 1
> + DMAMUX3 0
> +
> +Examples:
> +
> +edma0: edma@40018000 {
> + #dma-cells = <2>;
> + compatible = "fsl,vf610-edma";
> + reg = <0x40018000 0x2000>;
> + interrupts = <0 8 0x04>, <0 9 0x04>;
> + interrupt-names = "edma-tx", "edma-err";
> + fsl,edma-channels = <32>;
> + fsl,edma-mux = <>, <>;
> + };
Broken indentation.
> +
> +dmamux0: dmamux@40024000 {
> + reg = <0x40024000 0x1000>;
> + fsl,dmamux-id = <0>;
> + clocks = < VF610_CLK_DMAMUX0>;
> + clock-names = "dmamux";
> +};
> +
> +
> +* DMA clients
> +DMA client drivers that uses the DMA function must use the format described
> +in the dma.txt file, using a three-cell specifier for each channel: a phandle
> +plus two integer cells as described above.
> +
> +Examples:
> +
> +sai2: sai@40031000 {
> + compatible = "fsl,vf610-sai";
> + reg = <0x40031000 0x1000>;
> + interrupts = <0 86 0x04>;
> + clocks = < VF610_CLK_SAI2>;
> + clock-names = "sai";
> + fsl,sai-dma-events = <21 20>;
This should be dropped, right?
Shawn
> + dma-names = "tx", "rx";
> + dmas = < 0 DMA_MUXID0_SAI2_TX>,
> + < 0 DMA_MUXID0_SAI2_RX>;
> + status = "disabled";
> +};
--
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Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 3/3] dma: Add Freescale eDMA engine driver support
On Fri, Aug 02, 2013 at 03:55:48PM +0800, Jingchang Lu wrote:
Add Freescale enhanced direct memory(eDMA) controller support.
The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
to eDMA channels.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Xiaochun Li b41...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
---
.../devicetree/bindings/dma/fsl-vf610-edma.txt | 84 +++
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-edma.c | 826
+
4 files changed, 921 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
create mode 100644 drivers/dma/fsl-edma.c
diff --git a/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
new file mode 100644
index 000..e6dc5cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
@@ -0,0 +1,84 @@
+* Freescale enhanced direct memory access(eDMA) Controller
+
+The eDMA engine deploys DMAMUXs routing request sources(slot) to
+eDMA controller channels.
+
+* eDMA Controller
+Required properties:
+- compatible : Should be fsl,chip-edma
+- reg : Should contain eDMA registers location and length
+- interrupts : Should contain eDMA interrupt
+- interrupt-names : Should be edma-tx for tx interrupt and
+ edma-err for err interrupt
+- #dma-cells : Must be 2.
+ The first cell specifies the DMAMUX ID. Specific request source
+ can only be routed by specific DMAMUXs.
+ the second cell specifies the request source(slot) ID.
+ See include/dt-bindings/dma/soc-edma.h for all the supported
+ request source IDs.
+- fsl,dma-channels : Number of channels supported by the controller
The generic dma bindings Documentation/devicetree/bindings/dma/dma.txt
defines property dma-channels. You shouldn't need a vendor specific
definition.
+- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
+
+
+* DMAMUX
+Required properties:
+- reg : Should contain DMAMUX registers location and length
+- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
+ inside one eDMA controller, specific request source can only be routed by
+ one of its DMAMUXs.
+ However Specific request source may be routed to different eDMA controller,
+ thus all the DMAMUXs sharing a the same request sources have the same ID.
+- clocks : Phandle of the clock used by the DMAMUX
+- clock-names : The clock names
+
+Below is the eDMA controller and DMAMUX association, and DMAMUX IDs
assignment
+On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
+and DMAMUX1 and DMAMU2 share the same request source group.
+
+eDMA controller DMAMUXs DMAMUX ID
+-
+eDMA0DMAMUX0 0
+ DMAMUX1 1
+
+eDMA1DMAMUX2 1
+ DMAMUX3 0
+
+Examples:
+
+edma0: edma@40018000 {
+ #dma-cells = 2;
+ compatible = fsl,vf610-edma;
+ reg = 0x40018000 0x2000;
+ interrupts = 0 8 0x04, 0 9 0x04;
+ interrupt-names = edma-tx, edma-err;
+ fsl,edma-channels = 32;
+ fsl,edma-mux = dmamux0, dmamux1;
+ };
Broken indentation.
+
+dmamux0: dmamux@40024000 {
+ reg = 0x40024000 0x1000;
+ fsl,dmamux-id = 0;
+ clocks = clks VF610_CLK_DMAMUX0;
+ clock-names = dmamux;
+};
+
+
+* DMA clients
+DMA client drivers that uses the DMA function must use the format described
+in the dma.txt file, using a three-cell specifier for each channel: a phandle
+plus two integer cells as described above.
+
+Examples:
+
+sai2: sai@40031000 {
+ compatible = fsl,vf610-sai;
+ reg = 0x40031000 0x1000;
+ interrupts = 0 86 0x04;
+ clocks = clks VF610_CLK_SAI2;
+ clock-names = sai;
+ fsl,sai-dma-events = 21 20;
This should be dropped, right?
Shawn
+ dma-names = tx, rx;
+ dmas = edma0 0 DMA_MUXID0_SAI2_TX,
+ edma0 0 DMA_MUXID0_SAI2_RX;
+ status = disabled;
+};
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
[PATCH 3/3] dma: Add Freescale eDMA engine driver support
Add Freescale enhanced direct memory(eDMA) controller support.
The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
to eDMA channels.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang
Signed-off-by: Xiaochun Li
Signed-off-by: Jingchang Lu
---
.../devicetree/bindings/dma/fsl-vf610-edma.txt | 84 +++
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-edma.c | 826 +
4 files changed, 921 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
create mode 100644 drivers/dma/fsl-edma.c
diff --git a/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
new file mode 100644
index 000..e6dc5cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
@@ -0,0 +1,84 @@
+* Freescale enhanced direct memory access(eDMA) Controller
+
+The eDMA engine deploys DMAMUXs routing request sources(slot) to
+eDMA controller channels.
+
+* eDMA Controller
+Required properties:
+- compatible : Should be "fsl,-edma"
+- reg : Should contain eDMA registers location and length
+- interrupts : Should contain eDMA interrupt
+- interrupt-names : Should be "edma-tx" for tx interrupt and
+ "edma-err" for err interrupt
+- #dma-cells : Must be <2>.
+ The first cell specifies the DMAMUX ID. Specific request source
+ can only be routed by specific DMAMUXs.
+ the second cell specifies the request source(slot) ID.
+ See include/dt-bindings/dma/-edma.h for all the supported
+ request source IDs.
+- fsl,dma-channels : Number of channels supported by the controller
+- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
+
+
+* DMAMUX
+Required properties:
+- reg : Should contain DMAMUX registers location and length
+- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
+ inside one eDMA controller, specific request source can only be routed by
+ one of its DMAMUXs.
+ However Specific request source may be routed to different eDMA controller,
+ thus all the DMAMUXs sharing a the same request sources have the same ID.
+- clocks : Phandle of the clock used by the DMAMUX
+- clock-names : The clock names
+
+Below is the eDMA controller and DMAMUX association, and DMAMUX IDs assignment
+On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
+and DMAMUX1 and DMAMU2 share the same request source group.
+
+eDMA controllerDMAMUXs DMAMUX ID
+-
+eDMA0 DMAMUX0 0
+ DMAMUX1 1
+
+eDMA1 DMAMUX2 1
+ DMAMUX3 0
+
+Examples:
+
+edma0: edma@40018000 {
+ #dma-cells = <2>;
+ compatible = "fsl,vf610-edma";
+ reg = <0x40018000 0x2000>;
+ interrupts = <0 8 0x04>, <0 9 0x04>;
+ interrupt-names = "edma-tx", "edma-err";
+ fsl,edma-channels = <32>;
+ fsl,edma-mux = <>, <>;
+ };
+
+dmamux0: dmamux@40024000 {
+ reg = <0x40024000 0x1000>;
+ fsl,dmamux-id = <0>;
+ clocks = < VF610_CLK_DMAMUX0>;
+ clock-names = "dmamux";
+};
+
+
+* DMA clients
+DMA client drivers that uses the DMA function must use the format described
+in the dma.txt file, using a three-cell specifier for each channel: a phandle
+plus two integer cells as described above.
+
+Examples:
+
+sai2: sai@40031000 {
+ compatible = "fsl,vf610-sai";
+ reg = <0x40031000 0x1000>;
+ interrupts = <0 86 0x04>;
+ clocks = < VF610_CLK_SAI2>;
+ clock-names = "sai";
+ fsl,sai-dma-events = <21 20>;
+ dma-names = "tx", "rx";
+ dmas = < 0 DMA_MUXID0_SAI2_TX>,
+ < 0 DMA_MUXID0_SAI2_RX>;
+ status = "disabled";
+};
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..f9a6e06 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -300,6 +300,16 @@ config DMA_JZ4740
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
+config FSL_EDMA
+ tristate "Freescale eDMA engine support"
+ depends on OF
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+ help
+ Support the Freescale eDMA engine with DMAMUXs managing route
+ between request sources(slot) and eDMA engine channels.
+ This module can be found on Freescale Vybrid and LS-1 SoCs.
+
config DMA_ENGINE
bool
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 5e0f2ef..fcbbac9 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
obj-$(CONFIG_DMA_OMAP) += omap-dma.o
obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o
obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
+obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
diff --git a/drivers/dma/fsl-edma.c b/drivers/dma/fsl-edma.c
[PATCH 3/3] dma: Add Freescale eDMA engine driver support
Add Freescale enhanced direct memory(eDMA) controller support.
The eDMA controller deploys DMAMUXs routing DMA request sources(slot)
to eDMA channels.
This module can be found on Vybrid and LS-1 SoCs.
Signed-off-by: Alison Wang b18...@freescale.com
Signed-off-by: Xiaochun Li b41...@freescale.com
Signed-off-by: Jingchang Lu b35...@freescale.com
---
.../devicetree/bindings/dma/fsl-vf610-edma.txt | 84 +++
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile | 1 +
drivers/dma/fsl-edma.c | 826 +
4 files changed, 921 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
create mode 100644 drivers/dma/fsl-edma.c
diff --git a/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
new file mode 100644
index 000..e6dc5cd
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/fsl-vf610-edma.txt
@@ -0,0 +1,84 @@
+* Freescale enhanced direct memory access(eDMA) Controller
+
+The eDMA engine deploys DMAMUXs routing request sources(slot) to
+eDMA controller channels.
+
+* eDMA Controller
+Required properties:
+- compatible : Should be fsl,chip-edma
+- reg : Should contain eDMA registers location and length
+- interrupts : Should contain eDMA interrupt
+- interrupt-names : Should be edma-tx for tx interrupt and
+ edma-err for err interrupt
+- #dma-cells : Must be 2.
+ The first cell specifies the DMAMUX ID. Specific request source
+ can only be routed by specific DMAMUXs.
+ the second cell specifies the request source(slot) ID.
+ See include/dt-bindings/dma/soc-edma.h for all the supported
+ request source IDs.
+- fsl,dma-channels : Number of channels supported by the controller
+- fsl,dma-mux : Phandle of the DMAMUXs deployed by the controller
+
+
+* DMAMUX
+Required properties:
+- reg : Should contain DMAMUX registers location and length
+- fsl,dmamux-id : DMAMUX ID. DMAMUX IDs are unique in each eDMA controller.
+ inside one eDMA controller, specific request source can only be routed by
+ one of its DMAMUXs.
+ However Specific request source may be routed to different eDMA controller,
+ thus all the DMAMUXs sharing a the same request sources have the same ID.
+- clocks : Phandle of the clock used by the DMAMUX
+- clock-names : The clock names
+
+Below is the eDMA controller and DMAMUX association, and DMAMUX IDs assignment
+On Vybrid vf610 SoC, DMAMUX0 and DMAMU3 share the same request source group,
+and DMAMUX1 and DMAMU2 share the same request source group.
+
+eDMA controllerDMAMUXs DMAMUX ID
+-
+eDMA0 DMAMUX0 0
+ DMAMUX1 1
+
+eDMA1 DMAMUX2 1
+ DMAMUX3 0
+
+Examples:
+
+edma0: edma@40018000 {
+ #dma-cells = 2;
+ compatible = fsl,vf610-edma;
+ reg = 0x40018000 0x2000;
+ interrupts = 0 8 0x04, 0 9 0x04;
+ interrupt-names = edma-tx, edma-err;
+ fsl,edma-channels = 32;
+ fsl,edma-mux = dmamux0, dmamux1;
+ };
+
+dmamux0: dmamux@40024000 {
+ reg = 0x40024000 0x1000;
+ fsl,dmamux-id = 0;
+ clocks = clks VF610_CLK_DMAMUX0;
+ clock-names = dmamux;
+};
+
+
+* DMA clients
+DMA client drivers that uses the DMA function must use the format described
+in the dma.txt file, using a three-cell specifier for each channel: a phandle
+plus two integer cells as described above.
+
+Examples:
+
+sai2: sai@40031000 {
+ compatible = fsl,vf610-sai;
+ reg = 0x40031000 0x1000;
+ interrupts = 0 86 0x04;
+ clocks = clks VF610_CLK_SAI2;
+ clock-names = sai;
+ fsl,sai-dma-events = 21 20;
+ dma-names = tx, rx;
+ dmas = edma0 0 DMA_MUXID0_SAI2_TX,
+ edma0 0 DMA_MUXID0_SAI2_RX;
+ status = disabled;
+};
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..f9a6e06 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -300,6 +300,16 @@ config DMA_JZ4740
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
+config FSL_EDMA
+ tristate Freescale eDMA engine support
+ depends on OF
+ select DMA_ENGINE
+ select DMA_VIRTUAL_CHANNELS
+ help
+ Support the Freescale eDMA engine with DMAMUXs managing route
+ between request sources(slot) and eDMA engine channels.
+ This module can be found on Freescale Vybrid and LS-1 SoCs.
+
config DMA_ENGINE
bool
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 5e0f2ef..fcbbac9 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
obj-$(CONFIG_DMA_OMAP) += omap-dma.o
obj-$(CONFIG_MMP_PDMA) += mmp_pdma.o
obj-$(CONFIG_DMA_JZ4740) += dma-jz4740.o
+obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
diff --git
