Re: [PATCH 3/5] arm64: dts: hisilicon: Add initial dts for Hip07 D05 board

[Wei Xu]

Hi Kefeng,

On 2016/9/24 10:14, Kefeng Wang wrote:
> Adding initial dt file for Hip07 D05 board, it is with dual socket
> and each socket has two SCCLs(supper cpu cluster), one SCCL contains
> four clusters and each cluster has quard Cortex-A72.
> 
> Since each SCCL has their own DDR controller, it could be treated as
> a separate numa node. Thus, there are four numa nodes(one node with
> sixteen core) on Hip07 SoC.
> 
> Signed-off-by: Kefeng Wang 
> ---

Applied to the hisilicon soc tree.
Thanks!

Best Regards,
Wei

>  arch/arm64/boot/dts/hisilicon/Makefile  |1 +
>  arch/arm64/boot/dts/hisilicon/hip07-d05.dts |   66 ++
>  arch/arm64/boot/dts/hisilicon/hip07.dtsi| 1059 
> +++
>  3 files changed, 1126 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hip07-d05.dts
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hip07.dtsi
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
> b/arch/arm64/boot/dts/hisilicon/Makefile
> index d5f43a0..c8b8f80 100644
> --- a/arch/arm64/boot/dts/hisilicon/Makefile
> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
> @@ -1,6 +1,7 @@
>  dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
> +dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
>  
>  always   := $(dtb-y)
>  subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts 
> b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
> new file mode 100644
> index 000..e058442
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
> @@ -0,0 +1,66 @@
> +/**
> + * dts file for Hisilicon D05 Development Board
> + *
> + * Copyright (C) 2016 Hisilicon Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * publishhed by the Free Software Foundation.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "hip07.dtsi"
> +
> +/ {
> + model = "Hisilicon Hip07 D05 Development Board";
> + compatible = "hisilicon,hip07-d05";
> +
> + /* the mem node will be updated by UEFI. */
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x 0x0 0x4000>;
> + numa-node-id = <0>;
> + };
> +
> + distance-map {
> + compatible = "numa-distance-map-v1";
> + distance-matrix = <0 0 10>,
> +   <0 1 15>,
> +   <0 2 20>,
> +   <0 3 25>,
> +   <1 0 15>,
> +   <1 1 10>,
> +   <1 2 25>,
> +   <1 3 30>,
> +   <2 0 20>,
> +   <2 1 25>,
> +   <2 2 10>,
> +   <2 3 15>,
> +   <3 0 25>,
> +   <3 1 30>,
> +   <3 2 15>,
> +   <3 3 10>;
> + };
> +
> + aliases {
> + serial0 = 
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> + {
> + status = "ok";
> +};
> +
> +_ohci {
> + status = "ok";
> +};
> +
> +_ehci {
> + status = "ok";
> +};
> diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
> b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
> new file mode 100644
> index 000..5144eb1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
> @@ -0,0 +1,1059 @@
> +/**
> + * dts file for Hisilicon D05 Development Board
> + *
> + * Copyright (C) 2016 Hisilicon Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * publishhed by the Free Software Foundation.
> + *
> + */
> +
> +#include 
> +
> +/ {
> + compatible = "hisilicon,hip07-d05";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <>;
> + };
> + core1 {
> + cpu = <>;
> + };
> + core2 {
> + cpu = <>;
> + };
> + core3 {
> + cpu = <>;
> + };
> + };
> +
> + cluster1 {
> + 

Re: [PATCH 3/5] arm64: dts: hisilicon: Add initial dts for Hip07 D05 board

[Wei Xu]

Hi Kefeng,

On 2016/9/24 10:14, Kefeng Wang wrote:
> Adding initial dt file for Hip07 D05 board, it is with dual socket
> and each socket has two SCCLs(supper cpu cluster), one SCCL contains
> four clusters and each cluster has quard Cortex-A72.
> 
> Since each SCCL has their own DDR controller, it could be treated as
> a separate numa node. Thus, there are four numa nodes(one node with
> sixteen core) on Hip07 SoC.
> 
> Signed-off-by: Kefeng Wang 
> ---

Applied to the hisilicon soc tree.
Thanks!

Best Regards,
Wei

>  arch/arm64/boot/dts/hisilicon/Makefile  |1 +
>  arch/arm64/boot/dts/hisilicon/hip07-d05.dts |   66 ++
>  arch/arm64/boot/dts/hisilicon/hip07.dtsi| 1059 
> +++
>  3 files changed, 1126 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hip07-d05.dts
>  create mode 100644 arch/arm64/boot/dts/hisilicon/hip07.dtsi
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
> b/arch/arm64/boot/dts/hisilicon/Makefile
> index d5f43a0..c8b8f80 100644
> --- a/arch/arm64/boot/dts/hisilicon/Makefile
> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
> @@ -1,6 +1,7 @@
>  dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>  dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
> +dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
>  
>  always   := $(dtb-y)
>  subdir-y := $(dts-dirs)
> diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts 
> b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
> new file mode 100644
> index 000..e058442
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
> @@ -0,0 +1,66 @@
> +/**
> + * dts file for Hisilicon D05 Development Board
> + *
> + * Copyright (C) 2016 Hisilicon Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * publishhed by the Free Software Foundation.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "hip07.dtsi"
> +
> +/ {
> + model = "Hisilicon Hip07 D05 Development Board";
> + compatible = "hisilicon,hip07-d05";
> +
> + /* the mem node will be updated by UEFI. */
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x 0x0 0x4000>;
> + numa-node-id = <0>;
> + };
> +
> + distance-map {
> + compatible = "numa-distance-map-v1";
> + distance-matrix = <0 0 10>,
> +   <0 1 15>,
> +   <0 2 20>,
> +   <0 3 25>,
> +   <1 0 15>,
> +   <1 1 10>,
> +   <1 2 25>,
> +   <1 3 30>,
> +   <2 0 20>,
> +   <2 1 25>,
> +   <2 2 10>,
> +   <2 3 15>,
> +   <3 0 25>,
> +   <3 1 30>,
> +   <3 2 15>,
> +   <3 3 10>;
> + };
> +
> + aliases {
> + serial0 = 
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +};
> +
> + {
> + status = "ok";
> +};
> +
> +_ohci {
> + status = "ok";
> +};
> +
> +_ehci {
> + status = "ok";
> +};
> diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
> b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
> new file mode 100644
> index 000..5144eb1
> --- /dev/null
> +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
> @@ -0,0 +1,1059 @@
> +/**
> + * dts file for Hisilicon D05 Development Board
> + *
> + * Copyright (C) 2016 Hisilicon Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * publishhed by the Free Software Foundation.
> + *
> + */
> +
> +#include 
> +
> +/ {
> + compatible = "hisilicon,hip07-d05";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <>;
> + };
> + core1 {
> + cpu = <>;
> + };
> + core2 {
> + cpu = <>;
> + };
> + core3 {
> + cpu = <>;
> + };
> + };
> +
> + cluster1 {
> + core0 {
> +  

[PATCH 3/5] arm64: dts: hisilicon: Add initial dts for Hip07 D05 board

[Kefeng Wang]

Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.

Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.

Signed-off-by: Kefeng Wang 
---
 arch/arm64/boot/dts/hisilicon/Makefile  |1 +
 arch/arm64/boot/dts/hisilicon/hip07-d05.dts |   66 ++
 arch/arm64/boot/dts/hisilicon/hip07.dtsi| 1059 +++
 3 files changed, 1126 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hip07-d05.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hip07.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index d5f43a0..c8b8f80 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,6 +1,7 @@
 dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
+dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts 
b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
new file mode 100644
index 000..e058442
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
@@ -0,0 +1,66 @@
+/**
+ * dts file for Hisilicon D05 Development Board
+ *
+ * Copyright (C) 2016 Hisilicon Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ *
+ */
+
+/dts-v1/;
+
+#include "hip07.dtsi"
+
+/ {
+   model = "Hisilicon Hip07 D05 Development Board";
+   compatible = "hisilicon,hip07-d05";
+
+   /* the mem node will be updated by UEFI. */
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x 0x0 0x4000>;
+   numa-node-id = <0>;
+   };
+
+   distance-map {
+   compatible = "numa-distance-map-v1";
+   distance-matrix = <0 0 10>,
+ <0 1 15>,
+ <0 2 20>,
+ <0 3 25>,
+ <1 0 15>,
+ <1 1 10>,
+ <1 2 25>,
+ <1 3 30>,
+ <2 0 20>,
+ <2 1 25>,
+ <2 2 10>,
+ <2 3 15>,
+ <3 0 25>,
+ <3 1 30>,
+ <3 2 15>,
+ <3 3 10>;
+   };
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "ok";
+};
+
+_ohci {
+   status = "ok";
+};
+
+_ehci {
+   status = "ok";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
new file mode 100644
index 000..5144eb1
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -0,0 +1,1059 @@
+/**
+ * dts file for Hisilicon D05 Development Board
+ *
+ * Copyright (C) 2016 Hisilicon Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ *
+ */
+
+#include 
+
+/ {
+   compatible = "hisilicon,hip07-d05";
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   psci {
+   compatible = "arm,psci-0.2";
+   method = "smc";
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu-map {
+   cluster0 {
+   core0 {
+   cpu = <>;
+   };
+   core1 {
+   cpu = <>;
+   };
+   core2 {
+   cpu = <>;
+   };
+   core3 {
+   cpu = <>;
+   };
+   };
+
+   cluster1 {
+   core0 {
+   cpu = <>;
+   };
+   core1 {
+   cpu = <>;
+   };
+   core2 {
+   cpu = 

[PATCH 3/5] arm64: dts: hisilicon: Add initial dts for Hip07 D05 board

[Kefeng Wang]

Adding initial dt file for Hip07 D05 board, it is with dual socket
and each socket has two SCCLs(supper cpu cluster), one SCCL contains
four clusters and each cluster has quard Cortex-A72.

Since each SCCL has their own DDR controller, it could be treated as
a separate numa node. Thus, there are four numa nodes(one node with
sixteen core) on Hip07 SoC.

Signed-off-by: Kefeng Wang 
---
 arch/arm64/boot/dts/hisilicon/Makefile  |1 +
 arch/arm64/boot/dts/hisilicon/hip07-d05.dts |   66 ++
 arch/arm64/boot/dts/hisilicon/hip07.dtsi| 1059 +++
 3 files changed, 1126 insertions(+)
 create mode 100644 arch/arm64/boot/dts/hisilicon/hip07-d05.dts
 create mode 100644 arch/arm64/boot/dts/hisilicon/hip07.dtsi

diff --git a/arch/arm64/boot/dts/hisilicon/Makefile 
b/arch/arm64/boot/dts/hisilicon/Makefile
index d5f43a0..c8b8f80 100644
--- a/arch/arm64/boot/dts/hisilicon/Makefile
+++ b/arch/arm64/boot/dts/hisilicon/Makefile
@@ -1,6 +1,7 @@
 dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
 dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
+dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
 
 always := $(dtb-y)
 subdir-y   := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/hisilicon/hip07-d05.dts 
b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
new file mode 100644
index 000..e058442
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
@@ -0,0 +1,66 @@
+/**
+ * dts file for Hisilicon D05 Development Board
+ *
+ * Copyright (C) 2016 Hisilicon Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ *
+ */
+
+/dts-v1/;
+
+#include "hip07.dtsi"
+
+/ {
+   model = "Hisilicon Hip07 D05 Development Board";
+   compatible = "hisilicon,hip07-d05";
+
+   /* the mem node will be updated by UEFI. */
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x 0x0 0x4000>;
+   numa-node-id = <0>;
+   };
+
+   distance-map {
+   compatible = "numa-distance-map-v1";
+   distance-matrix = <0 0 10>,
+ <0 1 15>,
+ <0 2 20>,
+ <0 3 25>,
+ <1 0 15>,
+ <1 1 10>,
+ <1 2 25>,
+ <1 3 30>,
+ <2 0 20>,
+ <2 1 25>,
+ <2 2 10>,
+ <2 3 15>,
+ <3 0 25>,
+ <3 1 30>,
+ <3 2 15>,
+ <3 3 10>;
+   };
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+};
+
+ {
+   status = "ok";
+};
+
+_ohci {
+   status = "ok";
+};
+
+_ehci {
+   status = "ok";
+};
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi 
b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
new file mode 100644
index 000..5144eb1
--- /dev/null
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -0,0 +1,1059 @@
+/**
+ * dts file for Hisilicon D05 Development Board
+ *
+ * Copyright (C) 2016 Hisilicon Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ *
+ */
+
+#include 
+
+/ {
+   compatible = "hisilicon,hip07-d05";
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   psci {
+   compatible = "arm,psci-0.2";
+   method = "smc";
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu-map {
+   cluster0 {
+   core0 {
+   cpu = <>;
+   };
+   core1 {
+   cpu = <>;
+   };
+   core2 {
+   cpu = <>;
+   };
+   core3 {
+   cpu = <>;
+   };
+   };
+
+   cluster1 {
+   core0 {
+   cpu = <>;
+   };
+   core1 {
+   cpu = <>;
+   };
+   core2 {
+   cpu = <>;
+