Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
On Tue, Oct 15, 2019 at 09:14:00AM +, Xiaowei Bao wrote: > > -Original Message- > > From: Russell King - ARM Linux admin > > Sent: 2019年10月15日 17:08 > > To: Xiaowei Bao > > Cc: Z.q. Hou ; bhelg...@google.com; > > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li > > ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. Lian > > ; andrew.mur...@arm.com; Mingkai Hu > > ; linux-...@vger.kernel.org; > > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; > > linux-kernel@vger.kernel.org > > Subject: Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP > > Layerscape SoCs > > > > On Tue, Oct 15, 2019 at 07:46:12AM +, Xiaowei Bao wrote: > > > > > > > > > > -Original Message- > > > > From: Russell King - ARM Linux admin > > > > Sent: 2019年9月25日 0:39 > > > > To: Xiaowei Bao > > > > Cc: Z.q. Hou ; bhelg...@google.com; > > > > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo > > > > robh+Li > > > > ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. > > > > Lian ; andrew.mur...@arm.com; Mingkai Hu > > > > ; linux-...@vger.kernel.org; > > > > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; > > > > linux-kernel@vger.kernel.org > > > > Subject: Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for > > > > NXP Layerscape SoCs > > > > > > > > On Mon, Sep 16, 2019 at 10:17:39AM +0800, Xiaowei Bao wrote: > > > > > This PCIe controller is based on the Mobiveil GPEX IP, it work in > > > > > EP mode if select this config opteration. > > > > > > > > > > Signed-off-by: Xiaowei Bao > > > > > --- > > > > > MAINTAINERS| 2 > > + > > > > > drivers/pci/controller/mobiveil/Kconfig| 17 ++- > > > > > drivers/pci/controller/mobiveil/Makefile | 1 + > > > > > .../controller/mobiveil/pcie-layerscape-gen4-ep.c | 156 > > > > > + > > > > > 4 files changed, 173 insertions(+), 3 deletions(-) create mode > > > > > 100644 drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > > > > > > > diff --git a/MAINTAINERS b/MAINTAINERS index b997056..0858b54 > > > > > 100644 > > > > > --- a/MAINTAINERS > > > > > +++ b/MAINTAINERS > > > > > @@ -12363,11 +12363,13 @@ F: > > > > drivers/pci/controller/dwc/*layerscape* > > > > > > > > > > PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER > > > > > M: Hou Zhiqiang > > > > > +M: Xiaowei Bao > > > > > L: linux-...@vger.kernel.org > > > > > L: linux-arm-ker...@lists.infradead.org > > > > > S: Maintained > > > > > F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > > > > > F: drivers/pci/controller/mobibeil/pcie-layerscape-gen4.c > > > > > +F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > > > > > > > PCI DRIVER FOR GENERIC OF HOSTS > > > > > M: Will Deacon > > > > > diff --git a/drivers/pci/controller/mobiveil/Kconfig > > > > > b/drivers/pci/controller/mobiveil/Kconfig > > > > > index 2054950..0696b6e 100644 > > > > > --- a/drivers/pci/controller/mobiveil/Kconfig > > > > > +++ b/drivers/pci/controller/mobiveil/Kconfig > > > > > @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT > > > > > for address translation and it is a PCIe Gen4 IP. > > > > > > > > > > config PCIE_LAYERSCAPE_GEN4 > > > > > - bool "Freescale Layerscape PCIe Gen4 controller" > > > > > + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" > > > > > depends on PCI > > > > > depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > > > > depends on PCI_MSI_IRQ_DOMAIN > > > > > select PCIE_MOBIVEIL_HOST > > > > > help > > > > > Say Y here if you want PCIe Gen4 controller support on > > > > > - Layerscape SoCs. The PCIe controller can work in RC or > > > > > - EP mode according to RCW[HOST_AGT_PEX] setting. > > > > >
RE: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
> -Original Message- > From: Russell King - ARM Linux admin > Sent: 2019年10月15日 17:08 > To: Xiaowei Bao > Cc: Z.q. Hou ; bhelg...@google.com; > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li > ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. Lian > ; andrew.mur...@arm.com; Mingkai Hu > ; linux-...@vger.kernel.org; > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; > linux-kernel@vger.kernel.org > Subject: Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP > Layerscape SoCs > > On Tue, Oct 15, 2019 at 07:46:12AM +, Xiaowei Bao wrote: > > > > > > > -Original Message- > > > From: Russell King - ARM Linux admin > > > Sent: 2019年9月25日 0:39 > > > To: Xiaowei Bao > > > Cc: Z.q. Hou ; bhelg...@google.com; > > > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo > > > robh+Li > > > ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. > > > Lian ; andrew.mur...@arm.com; Mingkai Hu > > > ; linux-...@vger.kernel.org; > > > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; > > > linux-kernel@vger.kernel.org > > > Subject: Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for > > > NXP Layerscape SoCs > > > > > > On Mon, Sep 16, 2019 at 10:17:39AM +0800, Xiaowei Bao wrote: > > > > This PCIe controller is based on the Mobiveil GPEX IP, it work in > > > > EP mode if select this config opteration. > > > > > > > > Signed-off-by: Xiaowei Bao > > > > --- > > > > MAINTAINERS| 2 > + > > > > drivers/pci/controller/mobiveil/Kconfig| 17 ++- > > > > drivers/pci/controller/mobiveil/Makefile | 1 + > > > > .../controller/mobiveil/pcie-layerscape-gen4-ep.c | 156 > > > > + > > > > 4 files changed, 173 insertions(+), 3 deletions(-) create mode > > > > 100644 drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > > > > > diff --git a/MAINTAINERS b/MAINTAINERS index b997056..0858b54 > > > > 100644 > > > > --- a/MAINTAINERS > > > > +++ b/MAINTAINERS > > > > @@ -12363,11 +12363,13 @@ F: > > > drivers/pci/controller/dwc/*layerscape* > > > > > > > > PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER > > > > M: Hou Zhiqiang > > > > +M: Xiaowei Bao > > > > L: linux-...@vger.kernel.org > > > > L: linux-arm-ker...@lists.infradead.org > > > > S: Maintained > > > > F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > > > > F: drivers/pci/controller/mobibeil/pcie-layerscape-gen4.c > > > > +F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > > > > > PCI DRIVER FOR GENERIC OF HOSTS > > > > M: Will Deacon > > > > diff --git a/drivers/pci/controller/mobiveil/Kconfig > > > > b/drivers/pci/controller/mobiveil/Kconfig > > > > index 2054950..0696b6e 100644 > > > > --- a/drivers/pci/controller/mobiveil/Kconfig > > > > +++ b/drivers/pci/controller/mobiveil/Kconfig > > > > @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT > > > > for address translation and it is a PCIe Gen4 IP. > > > > > > > > config PCIE_LAYERSCAPE_GEN4 > > > > - bool "Freescale Layerscape PCIe Gen4 controller" > > > > + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" > > > > depends on PCI > > > > depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > > > depends on PCI_MSI_IRQ_DOMAIN > > > > select PCIE_MOBIVEIL_HOST > > > > help > > > > Say Y here if you want PCIe Gen4 controller support on > > > > - Layerscape SoCs. The PCIe controller can work in RC or > > > > - EP mode according to RCW[HOST_AGT_PEX] setting. > > > > + Layerscape SoCs. And the PCIe controller work in RC mode > > > > + by setting the RCW[HOST_AGT_PEX] to 0. > > > > + > > > > +config PCIE_LAYERSCAPE_GEN4_EP > > > > + bool "Freescale Layerscpe PCIe Gen4 controller in EP mode" > > > > + depends on PCI > > > > + depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > > > +
Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
On Tue, Oct 15, 2019 at 07:46:12AM +, Xiaowei Bao wrote: > > > > -Original Message- > > From: Russell King - ARM Linux admin > > Sent: 2019年9月25日 0:39 > > To: Xiaowei Bao > > Cc: Z.q. Hou ; bhelg...@google.com; > > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li > > ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. Lian > > ; andrew.mur...@arm.com; Mingkai Hu > > ; linux-...@vger.kernel.org; > > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; > > linux-kernel@vger.kernel.org > > Subject: Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP > > Layerscape SoCs > > > > On Mon, Sep 16, 2019 at 10:17:39AM +0800, Xiaowei Bao wrote: > > > This PCIe controller is based on the Mobiveil GPEX IP, it work in EP > > > mode if select this config opteration. > > > > > > Signed-off-by: Xiaowei Bao > > > --- > > > MAINTAINERS| 2 + > > > drivers/pci/controller/mobiveil/Kconfig| 17 ++- > > > drivers/pci/controller/mobiveil/Makefile | 1 + > > > .../controller/mobiveil/pcie-layerscape-gen4-ep.c | 156 > > > + > > > 4 files changed, 173 insertions(+), 3 deletions(-) create mode > > > 100644 drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > > > diff --git a/MAINTAINERS b/MAINTAINERS index b997056..0858b54 100644 > > > --- a/MAINTAINERS > > > +++ b/MAINTAINERS > > > @@ -12363,11 +12363,13 @@ F: > > drivers/pci/controller/dwc/*layerscape* > > > > > > PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER > > > M: Hou Zhiqiang > > > +M: Xiaowei Bao > > > L: linux-...@vger.kernel.org > > > L: linux-arm-ker...@lists.infradead.org > > > S: Maintained > > > F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > > > F: drivers/pci/controller/mobibeil/pcie-layerscape-gen4.c > > > +F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > > > PCI DRIVER FOR GENERIC OF HOSTS > > > M: Will Deacon > > > diff --git a/drivers/pci/controller/mobiveil/Kconfig > > > b/drivers/pci/controller/mobiveil/Kconfig > > > index 2054950..0696b6e 100644 > > > --- a/drivers/pci/controller/mobiveil/Kconfig > > > +++ b/drivers/pci/controller/mobiveil/Kconfig > > > @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT > > > for address translation and it is a PCIe Gen4 IP. > > > > > > config PCIE_LAYERSCAPE_GEN4 > > > - bool "Freescale Layerscape PCIe Gen4 controller" > > > + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" > > > depends on PCI > > > depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > > depends on PCI_MSI_IRQ_DOMAIN > > > select PCIE_MOBIVEIL_HOST > > > help > > > Say Y here if you want PCIe Gen4 controller support on > > > - Layerscape SoCs. The PCIe controller can work in RC or > > > - EP mode according to RCW[HOST_AGT_PEX] setting. > > > + Layerscape SoCs. And the PCIe controller work in RC mode > > > + by setting the RCW[HOST_AGT_PEX] to 0. > > > + > > > +config PCIE_LAYERSCAPE_GEN4_EP > > > + bool "Freescale Layerscpe PCIe Gen4 controller in EP mode" > > > + depends on PCI > > > + depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > > + depends on PCI_ENDPOINT > > > + select PCIE_MOBIVEIL_EP > > > + help > > > + Say Y here if you want PCIe Gen4 controller support on > > > + Layerscape SoCs. And the PCIe controller work in EP mode > > > + by setting the RCW[HOST_AGT_PEX] to 1. > > > endmenu > > > diff --git a/drivers/pci/controller/mobiveil/Makefile > > > b/drivers/pci/controller/mobiveil/Makefile > > > index 686d41f..6f54856 100644 > > > --- a/drivers/pci/controller/mobiveil/Makefile > > > +++ b/drivers/pci/controller/mobiveil/Makefile > > > @@ -4,3 +4,4 @@ obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += > > > pcie-mobiveil-host.o > > > obj-$(CONFIG_PCIE_MOBIVEIL_EP) += pcie-mobiveil-ep.o > > > obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o > > > obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie-layerscape-gen4.o > > > +obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4_EP) += > > pcie-layerscape-gen4-ep.o > > > diff --git a/drivers/pci/controller/m
RE: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
> -Original Message- > From: Russell King - ARM Linux admin > Sent: 2019年9月25日 0:39 > To: Xiaowei Bao > Cc: Z.q. Hou ; bhelg...@google.com; > robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo Li > ; kis...@ti.com; lorenzo.pieral...@arm.com; M.h. Lian > ; andrew.mur...@arm.com; Mingkai Hu > ; linux-...@vger.kernel.org; > linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org; > linux-kernel@vger.kernel.org > Subject: Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP > Layerscape SoCs > > On Mon, Sep 16, 2019 at 10:17:39AM +0800, Xiaowei Bao wrote: > > This PCIe controller is based on the Mobiveil GPEX IP, it work in EP > > mode if select this config opteration. > > > > Signed-off-by: Xiaowei Bao > > --- > > MAINTAINERS| 2 + > > drivers/pci/controller/mobiveil/Kconfig| 17 ++- > > drivers/pci/controller/mobiveil/Makefile | 1 + > > .../controller/mobiveil/pcie-layerscape-gen4-ep.c | 156 > > + > > 4 files changed, 173 insertions(+), 3 deletions(-) create mode > > 100644 drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > diff --git a/MAINTAINERS b/MAINTAINERS index b997056..0858b54 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -12363,11 +12363,13 @@ F: > drivers/pci/controller/dwc/*layerscape* > > > > PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER > > M: Hou Zhiqiang > > +M: Xiaowei Bao > > L: linux-...@vger.kernel.org > > L: linux-arm-ker...@lists.infradead.org > > S: Maintained > > F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > > F: drivers/pci/controller/mobibeil/pcie-layerscape-gen4.c > > +F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > > > PCI DRIVER FOR GENERIC OF HOSTS > > M: Will Deacon > > diff --git a/drivers/pci/controller/mobiveil/Kconfig > > b/drivers/pci/controller/mobiveil/Kconfig > > index 2054950..0696b6e 100644 > > --- a/drivers/pci/controller/mobiveil/Kconfig > > +++ b/drivers/pci/controller/mobiveil/Kconfig > > @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT > > for address translation and it is a PCIe Gen4 IP. > > > > config PCIE_LAYERSCAPE_GEN4 > > - bool "Freescale Layerscape PCIe Gen4 controller" > > + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" > > depends on PCI > > depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > depends on PCI_MSI_IRQ_DOMAIN > > select PCIE_MOBIVEIL_HOST > > help > > Say Y here if you want PCIe Gen4 controller support on > > - Layerscape SoCs. The PCIe controller can work in RC or > > - EP mode according to RCW[HOST_AGT_PEX] setting. > > + Layerscape SoCs. And the PCIe controller work in RC mode > > + by setting the RCW[HOST_AGT_PEX] to 0. > > + > > +config PCIE_LAYERSCAPE_GEN4_EP > > + bool "Freescale Layerscpe PCIe Gen4 controller in EP mode" > > + depends on PCI > > + depends on OF && (ARM64 || ARCH_LAYERSCAPE) > > + depends on PCI_ENDPOINT > > + select PCIE_MOBIVEIL_EP > > + help > > + Say Y here if you want PCIe Gen4 controller support on > > + Layerscape SoCs. And the PCIe controller work in EP mode > > + by setting the RCW[HOST_AGT_PEX] to 1. > > endmenu > > diff --git a/drivers/pci/controller/mobiveil/Makefile > > b/drivers/pci/controller/mobiveil/Makefile > > index 686d41f..6f54856 100644 > > --- a/drivers/pci/controller/mobiveil/Makefile > > +++ b/drivers/pci/controller/mobiveil/Makefile > > @@ -4,3 +4,4 @@ obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += > > pcie-mobiveil-host.o > > obj-$(CONFIG_PCIE_MOBIVEIL_EP) += pcie-mobiveil-ep.o > > obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o > > obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie-layerscape-gen4.o > > +obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4_EP) += > pcie-layerscape-gen4-ep.o > > diff --git a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > new file mode 100644 > > index 000..7bfec51 > > --- /dev/null > > +++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > @@ -0,0 +1,156 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * PCIe controller EP driver for Freescale Layerscape SoCs > > + * > > + * Copyright (C) 2019 NXP Semiconductor. > > + * > > + * Author: Xiaowei Ba
Re: [PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
On Mon, Sep 16, 2019 at 10:17:39AM +0800, Xiaowei Bao wrote: > This PCIe controller is based on the Mobiveil GPEX IP, it work in EP > mode if select this config opteration. > > Signed-off-by: Xiaowei Bao > --- > MAINTAINERS| 2 + > drivers/pci/controller/mobiveil/Kconfig| 17 ++- > drivers/pci/controller/mobiveil/Makefile | 1 + > .../controller/mobiveil/pcie-layerscape-gen4-ep.c | 156 > + > 4 files changed, 173 insertions(+), 3 deletions(-) > create mode 100644 drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index b997056..0858b54 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -12363,11 +12363,13 @@ F: drivers/pci/controller/dwc/*layerscape* > > PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER > M: Hou Zhiqiang > +M: Xiaowei Bao > L: linux-...@vger.kernel.org > L: linux-arm-ker...@lists.infradead.org > S: Maintained > F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > F: drivers/pci/controller/mobibeil/pcie-layerscape-gen4.c > +F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > > PCI DRIVER FOR GENERIC OF HOSTS > M: Will Deacon > diff --git a/drivers/pci/controller/mobiveil/Kconfig > b/drivers/pci/controller/mobiveil/Kconfig > index 2054950..0696b6e 100644 > --- a/drivers/pci/controller/mobiveil/Kconfig > +++ b/drivers/pci/controller/mobiveil/Kconfig > @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT > for address translation and it is a PCIe Gen4 IP. > > config PCIE_LAYERSCAPE_GEN4 > - bool "Freescale Layerscape PCIe Gen4 controller" > + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" > depends on PCI > depends on OF && (ARM64 || ARCH_LAYERSCAPE) > depends on PCI_MSI_IRQ_DOMAIN > select PCIE_MOBIVEIL_HOST > help > Say Y here if you want PCIe Gen4 controller support on > - Layerscape SoCs. The PCIe controller can work in RC or > - EP mode according to RCW[HOST_AGT_PEX] setting. > + Layerscape SoCs. And the PCIe controller work in RC mode > + by setting the RCW[HOST_AGT_PEX] to 0. > + > +config PCIE_LAYERSCAPE_GEN4_EP > + bool "Freescale Layerscpe PCIe Gen4 controller in EP mode" > + depends on PCI > + depends on OF && (ARM64 || ARCH_LAYERSCAPE) > + depends on PCI_ENDPOINT > + select PCIE_MOBIVEIL_EP > + help > + Say Y here if you want PCIe Gen4 controller support on > + Layerscape SoCs. And the PCIe controller work in EP mode > + by setting the RCW[HOST_AGT_PEX] to 1. > endmenu > diff --git a/drivers/pci/controller/mobiveil/Makefile > b/drivers/pci/controller/mobiveil/Makefile > index 686d41f..6f54856 100644 > --- a/drivers/pci/controller/mobiveil/Makefile > +++ b/drivers/pci/controller/mobiveil/Makefile > @@ -4,3 +4,4 @@ obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o > obj-$(CONFIG_PCIE_MOBIVEIL_EP) += pcie-mobiveil-ep.o > obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o > obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie-layerscape-gen4.o > +obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4_EP) += pcie-layerscape-gen4-ep.o > diff --git a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > new file mode 100644 > index 000..7bfec51 > --- /dev/null > +++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c > @@ -0,0 +1,156 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * PCIe controller EP driver for Freescale Layerscape SoCs > + * > + * Copyright (C) 2019 NXP Semiconductor. > + * > + * Author: Xiaowei Bao > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "pcie-mobiveil.h" > + > +#define PCIE_LX2_BAR_NUM 4 > + > +#define to_ls_pcie_g4_ep(x) dev_get_drvdata((x)->dev) > + > +struct ls_pcie_g4_ep { > + struct mobiveil_pcie*mv_pci; > +}; > + > +static const struct of_device_id ls_pcie_g4_ep_of_match[] = { > + { .compatible = "fsl,lx2160a-pcie-ep",}, > + { }, > +}; > + > +static const struct pci_epc_features ls_pcie_g4_epc_features = { > + .linkup_notifier = false, > + .msi_capable = true, > + .msix_capable = true, > + .reserved_bar = (1 << BAR_4) | (1 << BAR_5), BIT(BAR_4) | BIT(BAR_5) ? > +}; > + > +static const struct pci_epc_features* > +ls_pcie_g4_ep_get_features(struct mobiveil_pcie_ep *ep) > +{ > + return &ls_pcie_g4_epc_features; > +} > + > +static void ls_pcie_g4_ep_init(struct mobiveil_pcie_ep *ep) > +{ > + struct mobiveil_pcie *mv_pci = to_mobiveil_pcie_from_ep(ep); > + int win_idx; > + u8 bar; > + > + ep->bar_num = PCIE_LX2_BAR_NUM; > + > + for (bar = BAR_0; bar < ep->epc->max_functions * ep->bar_num; bar++) > + mobiveil_pcie_ep_reset_bar(mv_pci, bar); > + > + for (win_idx = 0; win_i
[PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
This PCIe controller is based on the Mobiveil GPEX IP, it work in EP mode if select this config opteration. Signed-off-by: Xiaowei Bao --- MAINTAINERS| 2 + drivers/pci/controller/mobiveil/Kconfig| 17 ++- drivers/pci/controller/mobiveil/Makefile | 1 + .../controller/mobiveil/pcie-layerscape-gen4-ep.c | 156 + 4 files changed, 173 insertions(+), 3 deletions(-) create mode 100644 drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c diff --git a/MAINTAINERS b/MAINTAINERS index b997056..0858b54 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12363,11 +12363,13 @@ F:drivers/pci/controller/dwc/*layerscape* PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER M: Hou Zhiqiang +M: Xiaowei Bao L: linux-...@vger.kernel.org L: linux-arm-ker...@lists.infradead.org S: Maintained F: Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt F: drivers/pci/controller/mobibeil/pcie-layerscape-gen4.c +F: drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c PCI DRIVER FOR GENERIC OF HOSTS M: Will Deacon diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controller/mobiveil/Kconfig index 2054950..0696b6e 100644 --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT for address translation and it is a PCIe Gen4 IP. config PCIE_LAYERSCAPE_GEN4 - bool "Freescale Layerscape PCIe Gen4 controller" + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" depends on PCI depends on OF && (ARM64 || ARCH_LAYERSCAPE) depends on PCI_MSI_IRQ_DOMAIN select PCIE_MOBIVEIL_HOST help Say Y here if you want PCIe Gen4 controller support on - Layerscape SoCs. The PCIe controller can work in RC or - EP mode according to RCW[HOST_AGT_PEX] setting. + Layerscape SoCs. And the PCIe controller work in RC mode + by setting the RCW[HOST_AGT_PEX] to 0. + +config PCIE_LAYERSCAPE_GEN4_EP + bool "Freescale Layerscpe PCIe Gen4 controller in EP mode" + depends on PCI + depends on OF && (ARM64 || ARCH_LAYERSCAPE) + depends on PCI_ENDPOINT + select PCIE_MOBIVEIL_EP + help + Say Y here if you want PCIe Gen4 controller support on + Layerscape SoCs. And the PCIe controller work in EP mode + by setting the RCW[HOST_AGT_PEX] to 1. endmenu diff --git a/drivers/pci/controller/mobiveil/Makefile b/drivers/pci/controller/mobiveil/Makefile index 686d41f..6f54856 100644 --- a/drivers/pci/controller/mobiveil/Makefile +++ b/drivers/pci/controller/mobiveil/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o obj-$(CONFIG_PCIE_MOBIVEIL_EP) += pcie-mobiveil-ep.o obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4) += pcie-layerscape-gen4.o +obj-$(CONFIG_PCIE_LAYERSCAPE_GEN4_EP) += pcie-layerscape-gen4-ep.o diff --git a/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c new file mode 100644 index 000..7bfec51 --- /dev/null +++ b/drivers/pci/controller/mobiveil/pcie-layerscape-gen4-ep.c @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCIe controller EP driver for Freescale Layerscape SoCs + * + * Copyright (C) 2019 NXP Semiconductor. + * + * Author: Xiaowei Bao + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pcie-mobiveil.h" + +#define PCIE_LX2_BAR_NUM 4 + +#define to_ls_pcie_g4_ep(x)dev_get_drvdata((x)->dev) + +struct ls_pcie_g4_ep { + struct mobiveil_pcie*mv_pci; +}; + +static const struct of_device_id ls_pcie_g4_ep_of_match[] = { + { .compatible = "fsl,lx2160a-pcie-ep",}, + { }, +}; + +static const struct pci_epc_features ls_pcie_g4_epc_features = { + .linkup_notifier = false, + .msi_capable = true, + .msix_capable = true, + .reserved_bar = (1 << BAR_4) | (1 << BAR_5), +}; + +static const struct pci_epc_features* +ls_pcie_g4_ep_get_features(struct mobiveil_pcie_ep *ep) +{ + return &ls_pcie_g4_epc_features; +} + +static void ls_pcie_g4_ep_init(struct mobiveil_pcie_ep *ep) +{ + struct mobiveil_pcie *mv_pci = to_mobiveil_pcie_from_ep(ep); + int win_idx; + u8 bar; + + ep->bar_num = PCIE_LX2_BAR_NUM; + + for (bar = BAR_0; bar < ep->epc->max_functions * ep->bar_num; bar++) + mobiveil_pcie_ep_reset_bar(mv_pci, bar); + + for (win_idx = 0; win_idx < ep->apio_wins; win_idx++) + mobiveil_pcie_disable_ob_win(mv_pci, win_idx); +} + +static int ls_pcie_g4_ep_raise_irq(struct mobiveil_pcie_ep *ep, u8 func_no, + enum pci_epc_irq_type type, + u16 interrupt_num) +
[PATCH 3/6] PCI: mobiveil: Add PCIe Gen4 EP driver for NXP Layerscape SoCs
This PCIe controller is based on the Mobiveil GPEX IP, it work in EP mode if select this config opteration. Signed-off-by: Xiaowei Bao --- depends on: http://patchwork.ozlabs.org/project/linux-pci/list/?series=88754 drivers/pci/controller/mobiveil/Kconfig| 17 ++- drivers/pci/controller/mobiveil/Makefile |1 + .../controller/mobiveil/pci-layerscape-gen4-ep.c | 166 3 files changed, 181 insertions(+), 3 deletions(-) create mode 100644 drivers/pci/controller/mobiveil/pci-layerscape-gen4-ep.c diff --git a/drivers/pci/controller/mobiveil/Kconfig b/drivers/pci/controller/mobiveil/Kconfig index c037db6..16ee617 100644 --- a/drivers/pci/controller/mobiveil/Kconfig +++ b/drivers/pci/controller/mobiveil/Kconfig @@ -27,13 +27,24 @@ config PCIE_MOBIVEIL_PLAT for address translation and it is a PCIe Gen4 IP. config PCI_LAYERSCAPE_GEN4 - bool "Freescale Layerscpe PCIe Gen4 controller" + bool "Freescale Layerscpe PCIe Gen4 controller in RC mode" depends on PCI depends on OF && (ARM64 || ARCH_LAYERSCAPE) depends on PCI_MSI_IRQ_DOMAIN select PCIE_MOBIVEIL_HOST help Say Y here if you want PCIe Gen4 controller support on - Layerscape SoCs. The PCIe controller can work in RC or - EP mode according to RCW[HOST_AGT_PEX] setting. + Layerscape SoCs. And the PCIe controller work in RC mode + by setting the RCW[HOST_AGT_PEX] to 0. + +config PCI_LAYERSCAPE_GEN4_EP + bool "Freescale Layerscpe PCIe Gen4 controller in EP mode" + depends on PCI + depends on OF && (ARM64 || ARCH_LAYERSCAPE) + depends on PCI_ENDPOINT + select PCIE_MOBIVEIL_EP + help + Say Y here if you want PCIe Gen4 controller support on + Layerscape SoCs. And the PCIe controller work in EP mode + by setting the RCW[HOST_AGT_PEX] to 1. endmenu diff --git a/drivers/pci/controller/mobiveil/Makefile b/drivers/pci/controller/mobiveil/Makefile index 4f520b7..cd907a7 100644 --- a/drivers/pci/controller/mobiveil/Makefile +++ b/drivers/pci/controller/mobiveil/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o obj-$(CONFIG_PCIE_MOBIVEIL_EP) += pcie-mobiveil-ep.o obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o obj-$(CONFIG_PCI_LAYERSCAPE_GEN4) += pci-layerscape-gen4.o +obj-$(CONFIG_PCI_LAYERSCAPE_GEN4_EP) += pci-layerscape-gen4-ep.o diff --git a/drivers/pci/controller/mobiveil/pci-layerscape-gen4-ep.c b/drivers/pci/controller/mobiveil/pci-layerscape-gen4-ep.c new file mode 100644 index 000..dc3589d --- /dev/null +++ b/drivers/pci/controller/mobiveil/pci-layerscape-gen4-ep.c @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCIe controller EP driver for Freescale Layerscape SoCs + * + * Copyright (C) 2018 NXP Semiconductor. + * + * Author: Xiaowei Bao + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pcie-mobiveil.h" + +struct ls_pcie_g4_ep { + struct mobiveil_pcie*mv_pci; +}; + +#define to_ls_pcie_g4_ep(x)dev_get_drvdata((x)->dev) + +static const struct of_device_id ls_pcie_g4_ep_of_match[] = { + { .compatible = "fsl,lx2160a-pcie-ep",}, + { }, +}; + +static void ls_pcie_g4_get_bar_num(struct mobiveil_pcie_ep *ep) +{ + struct mobiveil_pcie *mv_pci = to_mobiveil_pcie_from_ep(ep); + u32 type, reg; + u8 bar; + + ep->bar_num = BAR_5 + 1; + + for (bar = BAR_0; bar <= BAR_5; bar++) { + reg = PCI_BASE_ADDRESS_0 + (4 * bar); + type = csr_readl(mv_pci, reg) & + PCI_BASE_ADDRESS_MEM_TYPE_MASK; + if (type & PCI_BASE_ADDRESS_MEM_TYPE_64) + ep->bar_num--; + } +} + +static void ls_pcie_g4_ep_init(struct mobiveil_pcie_ep *ep) +{ + struct mobiveil_pcie *mv_pci = to_mobiveil_pcie_from_ep(ep); + struct pci_epc *epc = ep->epc; + enum pci_barno bar; + int win_idx; + + ls_pcie_g4_get_bar_num(ep); + + for (bar = BAR_0; bar < (ep->bar_num * ep->pf_num); bar++) + mobiveil_pcie_ep_reset_bar(mv_pci, bar); + + for (win_idx = 0; win_idx < MAX_IATU_OUT; win_idx++) + mobiveil_pcie_disable_ob_win(mv_pci, win_idx); + + epc->features |= EPC_FEATURE_NO_LINKUP_NOTIFIER; + epc->features |= EPC_FEATURE_MSIX_AVAILABLE; +} + +static int ls_pcie_g4_ep_raise_irq(struct mobiveil_pcie_ep *ep, u8 func_no, + enum pci_epc_irq_type type, + u16 interrupt_num) +{ + struct mobiveil_pcie *mv_pci = to_mobiveil_pcie_from_ep(ep); + + switch (type) { + case PCI_EPC_IRQ_LEGACY: + return mobiveil_pcie_ep_raise_legacy_irq(ep, func_no); + case PCI_EPC_IRQ_MSI: + return mobiveil_pcie_ep_raise_msi_irq(ep, func_no, +