Add bindings for Qualcomm MSM8937 Network-On-Chip interconnect devices.
Signed-off-by: Adam Skladowski
---
.../bindings/interconnect/qcom,msm8937.yaml | 81
.../dt-bindings/interconnect/qcom,msm8937.h | 93 +++
2 files changed, 174 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interconnect/qcom,msm8937.yaml
create mode 100644 include/dt-bindings/interconnect/qcom,msm8937.h
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8937.yaml
b/Documentation/devicetree/bindings/interconnect/qcom,msm8937.yaml
new file mode 100644
index ..39a1ca441bb2
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8937.yaml
@@ -0,0 +1,81 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,msm8937.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm MSM8937 Network-On-Chip interconnect
+
+maintainers:
+ - Konrad Dybcio
+
+description: |
+ The Qualcomm MSM8937 interconnect providers support adjusting the
+ bandwidth requirements between the various NoC fabrics.
+
+allOf:
+ - $ref: qcom,rpm-common.yaml#
+
+properties:
+ compatible:
+enum:
+ - qcom,msm8937-bimc
+ - qcom,msm8937-pcnoc
+ - qcom,msm8937-snoc
+
+ reg:
+maxItems: 1
+
+patternProperties:
+ '^interconnect-[a-z0-9\-]+$':
+type: object
+$ref: qcom,rpm-common.yaml#
+description:
+ The interconnect providers do not have a separate QoS register space,
+ but share parent's space.
+
+allOf:
+ - $ref: qcom,rpm-common.yaml#
+
+properties:
+ compatible:
+const: qcom,msm8937-snoc-mm
+
+required:
+ - compatible
+
+unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+
+bimc: interconnect@40 {
+compatible = "qcom,msm8937-bimc";
+reg = <0x0040 0x5a000>;
+#interconnect-cells = <2>;
+};
+
+pcnoc: interconnect@50 {
+compatible = "qcom,msm8937-pcnoc";
+reg = <0x0050 0x13080>;
+#interconnect-cells = <2>;
+};
+
+snoc: interconnect@58 {
+compatible = "qcom,msm8937-bimc";
+reg = <0x0058 0x16080>;
+#interconnect-cells = <2>;
+
+ snoc_mm: interconnect-snoc {
+ compatible = "qcom,msm8937-snoc-mm";
+ #interconnect-cells = <2>;
+ };
+};
diff --git a/include/dt-bindings/interconnect/qcom,msm8937.h
b/include/dt-bindings/interconnect/qcom,msm8937.h
new file mode 100644
index ..98b8a4637aab
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,msm8937.h
@@ -0,0 +1,93 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Qualcomm MSM8937 interconnect IDs
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8937_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8937_H
+
+/* BIMC fabric */
+#define MAS_APPS_PROC 0
+#define MAS_OXILI 1
+#define MAS_SNOC_BIMC_02
+#define MAS_SNOC_BIMC_23
+#define MAS_SNOC_BIMC_14
+#define MAS_TCU_0 5
+#define SLV_EBI6
+#define SLV_BIMC_SNOC 7
+
+/* PCNOC fabric */
+#define MAS_SPDM 0
+#define MAS_BLSP_1 1
+#define MAS_BLSP_2 2
+#define MAS_USB_HS13
+#define MAS_XI_USB_HS1 4
+#define MAS_CRYPTO 5
+#define MAS_SDCC_1 6
+#define MAS_SDCC_2 7
+#define MAS_SNOC_PCNOC 8
+#define PCNOC_M_0 9
+#define PCNOC_M_1 10
+#define PCNOC_INT_011
+#define PCNOC_INT_112
+#define PCNOC_INT_213
+#define PCNOC_INT_314
+#define PCNOC_S_0 15
+#define PCNOC_S_1 16
+#define PCNOC_S_2 17
+#define PCNOC_S_3 18
+#define PCNOC_S_4 19
+#define PCNOC_S_6 20
+#define PCNOC_S_7 21
+#define PCNOC_S_8 22
+#define SLV_SDCC_2 23
+#define SLV_SPDM 24
+#define SLV_PDM25
+#define SLV_PRNG 26
+#define SLV_TCSR 27
+#define SLV_SNOC_CFG 28
+#define SLV_MESSAGE_RAM29
+#define SLV_CAMERA_SS_CFG 30
+#define SLV_DISP_SS_CFG31
+#define SLV_VENUS_CFG 32
+#define SLV_GPU_CFG33
+#define SLV_TLMM 34
+#define SLV_BLSP_1 35
+#define SLV_BLSP_2 36
+#define SLV_PMIC_ARB 37
+#define SLV_SDCC_1 38
+#define SLV_CRYPTO_0_CFG 39
+#define SLV_USB_HS 40
+#define SLV_TCU41
+#define SLV_PCNOC_SNOC 42
+
+/* SNOC fabric */
+#define MAS_QDSS_BAM 0
+#define MAS_BIMC_SNOC 1
+#define
