Re: [PATCH 4/4] arm64: dts: qcom: sm8150: Add Coresight support

[Mathieu Poirier]

On Tue, Jun 09, 2020 at 07:00:31PM +0530, Sai Prakash Ranjan wrote:
> Add coresight components found on Qualcomm SM8150 SoC.
> 
> Signed-off-by: Sai Prakash Ranjan 
> ---
> 
> Depends on following coresight driver and SM8150 SMMU support:
>  - 
> https://git.linaro.org/kernel/coresight.git/commit/?h=next-v5.8-rc1&id=159e248e75b1b548276b6571d7740a35cab1f5be
>  - 
> https://git.linaro.org/kernel/coresight.git/commit/?h=next-v5.8-rc1&id=1b6cddfb7ebb5ed293124698f147e914b15315a1
>  - https://lore.kernel.org/lkml/20200524023815.21789-2-jonat...@marek.ca/
> 
> ---
>  arch/arm64/boot/dts/qcom/sm8150.dtsi | 591 +++
>  1 file changed, 591 insertions(+)

Reviewed-by: Mathieu Poirier 

> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi 
> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> index 141c21dfa68c..a2fc77211cc3 100644
> --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
> @@ -538,6 +538,597 @@
>   };
>   };
>  
> + stm@6002000 {
> + compatible = "arm,coresight-stm", "arm,primecell";
> + reg = <0 0x06002000 0 0x1000>,
> +   <0 0x1628 0 0x18>;
> + reg-names = "stm-base", "stm-stimulus-base";
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + stm_out: endpoint {
> + remote-endpoint = 
> <&funnel0_in7>;
> + };
> + };
> + };
> + };
> +
> + funnel@6041000 {
> + compatible = "arm,coresight-dynamic-funnel", 
> "arm,primecell";
> + reg = <0 0x06041000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + funnel0_out: endpoint {
> + remote-endpoint = 
> <&merge_funnel_in0>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@7 {
> + reg = <7>;
> + funnel0_in7: endpoint {
> + remote-endpoint = <&stm_out>;
> + };
> + };
> + };
> + };
> +
> + funnel@6042000 {
> + compatible = "arm,coresight-dynamic-funnel", 
> "arm,primecell";
> + reg = <0 0x06042000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + funnel1_out: endpoint {
> + remote-endpoint = 
> <&merge_funnel_in1>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@4 {
> + reg = <4>;
> + funnel1_in4: endpoint {
> + remote-endpoint = 
> <&swao_replicator_out>;
> + };
> + };
> + };
> + };
> +
> + funnel@6043000 {
> + compatible = "arm,coresight-dynamic-funnel", 
> "arm,primecell";
> + reg = <0 0x06043000 0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + out-ports {
> + port {
> + funnel2_out: endpoint {
> + remote-endpoint = 
> <&merge_funnel_in2>;
> + };
> + };
> + };
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@2 {
> + reg = <2>;
> + funnel2_in2: endpoint {
> + remote-endpoint = 

[PATCH 4/4] arm64: dts: qcom: sm8150: Add Coresight support

[Sai Prakash Ranjan]

Add coresight components found on Qualcomm SM8150 SoC.

Signed-off-by: Sai Prakash Ranjan 
---

Depends on following coresight driver and SM8150 SMMU support:
 - 
https://git.linaro.org/kernel/coresight.git/commit/?h=next-v5.8-rc1&id=159e248e75b1b548276b6571d7740a35cab1f5be
 - 
https://git.linaro.org/kernel/coresight.git/commit/?h=next-v5.8-rc1&id=1b6cddfb7ebb5ed293124698f147e914b15315a1
 - https://lore.kernel.org/lkml/20200524023815.21789-2-jonat...@marek.ca/

---
 arch/arm64/boot/dts/qcom/sm8150.dtsi | 591 +++
 1 file changed, 591 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi 
b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 141c21dfa68c..a2fc77211cc3 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -538,6 +538,597 @@
};
};
 
+   stm@6002000 {
+   compatible = "arm,coresight-stm", "arm,primecell";
+   reg = <0 0x06002000 0 0x1000>,
+ <0 0x1628 0 0x18>;
+   reg-names = "stm-base", "stm-stimulus-base";
+
+   clocks = <&aoss_qmp>;
+   clock-names = "apb_pclk";
+
+   out-ports {
+   port {
+   stm_out: endpoint {
+   remote-endpoint = 
<&funnel0_in7>;
+   };
+   };
+   };
+   };
+
+   funnel@6041000 {
+   compatible = "arm,coresight-dynamic-funnel", 
"arm,primecell";
+   reg = <0 0x06041000 0 0x1000>;
+
+   clocks = <&aoss_qmp>;
+   clock-names = "apb_pclk";
+
+   out-ports {
+   port {
+   funnel0_out: endpoint {
+   remote-endpoint = 
<&merge_funnel_in0>;
+   };
+   };
+   };
+
+   in-ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@7 {
+   reg = <7>;
+   funnel0_in7: endpoint {
+   remote-endpoint = <&stm_out>;
+   };
+   };
+   };
+   };
+
+   funnel@6042000 {
+   compatible = "arm,coresight-dynamic-funnel", 
"arm,primecell";
+   reg = <0 0x06042000 0 0x1000>;
+
+   clocks = <&aoss_qmp>;
+   clock-names = "apb_pclk";
+
+   out-ports {
+   port {
+   funnel1_out: endpoint {
+   remote-endpoint = 
<&merge_funnel_in1>;
+   };
+   };
+   };
+
+   in-ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@4 {
+   reg = <4>;
+   funnel1_in4: endpoint {
+   remote-endpoint = 
<&swao_replicator_out>;
+   };
+   };
+   };
+   };
+
+   funnel@6043000 {
+   compatible = "arm,coresight-dynamic-funnel", 
"arm,primecell";
+   reg = <0 0x06043000 0 0x1000>;
+
+   clocks = <&aoss_qmp>;
+   clock-names = "apb_pclk";
+
+   out-ports {
+   port {
+   funnel2_out: endpoint {
+   remote-endpoint = 
<&merge_funnel_in2>;
+   };
+   };
+   };
+
+   in-ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@2 {
+   reg = <2>;
+   funnel2_in2: endpoint {
+   remote-endpoint = 
<&apss_merge_funnel_out>;
+   };
+   };
+   };
+   };
+
+   funnel@6045000 {
+