[PATCH 4.2 033/134] arm64: head.S: initialise mdcr_el2 in el2_setup

[Greg Kroah-Hartman]

4.2-stable review patch.  If anyone has any objections, please let me know.

--

From: Will Deacon 

commit d10bcd473301888f957ec4b6b12aa3621be78d59 upstream.

When entering the kernel at EL2, we fail to initialise the MDCR_EL2
register which controls debug access and PMU capabilities at EL1.

This patch ensures that the register is initialised so that all traps
are disabled and all the PMU counters are available to the host. When a
guest is scheduled, KVM takes care to configure trapping appropriately.

Acked-by: Marc Zyngier 
Signed-off-by: Will Deacon 
Signed-off-by: Greg Kroah-Hartman 

---
 arch/arm64/kernel/head.S |5 +
 1 file changed, 5 insertions(+)

--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -528,6 +528,11 @@ CPU_LE(movkx0, #0x30d0, lsl #16)   // C
msr hstr_el2, xzr   // Disable CP15 traps to EL2
 #endif
 
+   /* EL2 debug */
+   mrs x0, pmcr_el0// Disable debug access traps
+   ubfxx0, x0, #11, #5 // to EL2 and allow access to
+   msr mdcr_el2, x0// all PMU counters from EL1
+
/* Stage-2 translation */
msr vttbr_el2, xzr
 


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[PATCH 4.2 033/134] arm64: head.S: initialise mdcr_el2 in el2_setup

[Greg Kroah-Hartman]

4.2-stable review patch.  If anyone has any objections, please let me know.

--

From: Will Deacon 

commit d10bcd473301888f957ec4b6b12aa3621be78d59 upstream.

When entering the kernel at EL2, we fail to initialise the MDCR_EL2
register which controls debug access and PMU capabilities at EL1.

This patch ensures that the register is initialised so that all traps
are disabled and all the PMU counters are available to the host. When a
guest is scheduled, KVM takes care to configure trapping appropriately.

Acked-by: Marc Zyngier 
Signed-off-by: Will Deacon 
Signed-off-by: Greg Kroah-Hartman 

---
 arch/arm64/kernel/head.S |5 +
 1 file changed, 5 insertions(+)

--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -528,6 +528,11 @@ CPU_LE(movkx0, #0x30d0, lsl #16)   // C
msr hstr_el2, xzr   // Disable CP15 traps to EL2
 #endif
 
+   /* EL2 debug */
+   mrs x0, pmcr_el0// Disable debug access traps
+   ubfxx0, x0, #11, #5 // to EL2 and allow access to
+   msr mdcr_el2, x0// all PMU counters from EL1
+
/* Stage-2 translation */
msr vttbr_el2, xzr
 


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More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/