Re: [PATCH 7/8] serial: xilinx_uartps: get clock rate info from dts

2012-11-02 Thread Josh Cartwright
On Fri, Nov 02, 2012 at 10:20:33AM +0100, Lars-Peter Clausen wrote:
> On 10/31/2012 08:28 PM, Josh Cartwright wrote:
> > Add support for specifying clock information for the uart clk via the
> > device tree.  This eliminates the need to hardcode rates in the device
> > tree.
> > 
> > Signed-off-by: Josh Cartwright 
> > ---
> >  arch/arm/boot/dts/zynq-7000.dtsi   |  4 ++--
> >  drivers/tty/serial/xilinx_uartps.c | 30 +-
> >  2 files changed, 19 insertions(+), 15 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/zynq-7000.dtsi 
> > b/arch/arm/boot/dts/zynq-7000.dtsi
> > index bb3085c..5fb763f 100644
> > --- a/arch/arm/boot/dts/zynq-7000.dtsi
> > +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> > @@ -44,14 +44,14 @@
> > compatible = "xlnx,xuartps";
> > reg = <0xE000 0x1000>;
> > interrupts = <0 27 4>;
> > -   clock = <5000>;
> > +   clocks = <&uart_clk 0>;
> > };
> >  
> > uart1: uart@e0001000 {
> > compatible = "xlnx,xuartps";
> > reg = <0xE0001000 0x1000>;
> > interrupts = <0 50 4>;
> > -   clock = <5000>;
> > +   clocks = <&uart_clk 0>;
> 
> Shouldn't this be <&uart_clk 1>?

Yes, indeed.

Thanks,
  Josh


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Re: [PATCH 7/8] serial: xilinx_uartps: get clock rate info from dts

2012-11-02 Thread Lars-Peter Clausen
On 10/31/2012 08:28 PM, Josh Cartwright wrote:
> Add support for specifying clock information for the uart clk via the
> device tree.  This eliminates the need to hardcode rates in the device
> tree.
> 
> Signed-off-by: Josh Cartwright 
> ---
>  arch/arm/boot/dts/zynq-7000.dtsi   |  4 ++--
>  drivers/tty/serial/xilinx_uartps.c | 30 +-
>  2 files changed, 19 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi 
> b/arch/arm/boot/dts/zynq-7000.dtsi
> index bb3085c..5fb763f 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -44,14 +44,14 @@
>   compatible = "xlnx,xuartps";
>   reg = <0xE000 0x1000>;
>   interrupts = <0 27 4>;
> - clock = <5000>;
> + clocks = <&uart_clk 0>;
>   };
>  
>   uart1: uart@e0001000 {
>   compatible = "xlnx,xuartps";
>   reg = <0xE0001000 0x1000>;
>   interrupts = <0 50 4>;
> - clock = <5000>;
> + clocks = <&uart_clk 0>;

Shouldn't this be <&uart_clk 1>?

>   };
>  
>   slcr: slcr@f800 {

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[PATCH 7/8] serial: xilinx_uartps: get clock rate info from dts

2012-10-31 Thread Josh Cartwright
Add support for specifying clock information for the uart clk via the
device tree.  This eliminates the need to hardcode rates in the device
tree.

Signed-off-by: Josh Cartwright 
---
 arch/arm/boot/dts/zynq-7000.dtsi   |  4 ++--
 drivers/tty/serial/xilinx_uartps.c | 30 +-
 2 files changed, 19 insertions(+), 15 deletions(-)

diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index bb3085c..5fb763f 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -44,14 +44,14 @@
compatible = "xlnx,xuartps";
reg = <0xE000 0x1000>;
interrupts = <0 27 4>;
-   clock = <5000>;
+   clocks = <&uart_clk 0>;
};
 
uart1: uart@e0001000 {
compatible = "xlnx,xuartps";
reg = <0xE0001000 0x1000>;
interrupts = <0 50 4>;
-   clock = <5000>;
+   clocks = <&uart_clk 0>;
};
 
slcr: slcr@f800 {
diff --git a/drivers/tty/serial/xilinx_uartps.c 
b/drivers/tty/serial/xilinx_uartps.c
index 23efe17..adfecbc 100644
--- a/drivers/tty/serial/xilinx_uartps.c
+++ b/drivers/tty/serial/xilinx_uartps.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -944,18 +945,20 @@ static int __devinit xuartps_probe(struct platform_device 
*pdev)
int rc;
struct uart_port *port;
struct resource *res, *res2;
-   int clk = 0;
+   struct clk *clk;
 
-   const unsigned int *prop;
-
-   prop = of_get_property(pdev->dev.of_node, "clock", NULL);
-   if (prop)
-   clk = be32_to_cpup(prop);
+   clk = of_clk_get(pdev->dev.of_node, 0);
if (!clk) {
dev_err(&pdev->dev, "no clock specified\n");
return -ENODEV;
}
 
+   rc = clk_prepare_enable(clk);
+   if (rc) {
+   dev_err(&pdev->dev, "could not enable clock\n");
+   return -EBUSY;
+   }
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res)
return -ENODEV;
@@ -978,7 +981,8 @@ static int __devinit xuartps_probe(struct platform_device 
*pdev)
port->mapbase = res->start;
port->irq = res2->start;
port->dev = &pdev->dev;
-   port->uartclk = clk;
+   port->uartclk = clk_get_rate(clk);
+   port->private_data = clk;
dev_set_drvdata(&pdev->dev, port);
rc = uart_add_one_port(&xuartps_uart_driver, port);
if (rc) {
@@ -1000,14 +1004,14 @@ static int __devinit xuartps_probe(struct 
platform_device *pdev)
 static int __devexit xuartps_remove(struct platform_device *pdev)
 {
struct uart_port *port = dev_get_drvdata(&pdev->dev);
-   int rc = 0;
+   struct clk *clk = port->private_data;
+   int rc;
 
/* Remove the xuartps port from the serial core */
-   if (port) {
-   rc = uart_remove_one_port(&xuartps_uart_driver, port);
-   dev_set_drvdata(&pdev->dev, NULL);
-   port->mapbase = 0;
-   }
+   rc = uart_remove_one_port(&xuartps_uart_driver, port);
+   dev_set_drvdata(&pdev->dev, NULL);
+   port->mapbase = 0;
+   clk_disable_unprepare(clk);
return rc;
 }
 
-- 
1.8.0


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