Re: [PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
On 21/08/18 00:19, Bjorn Andersson wrote:
> On Fri 17 Aug 12:10 PDT 2018, Lina Iyer wrote:
>> diff --git
>> a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
>> b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> [..]
>> @@ -155,11 +166,52 @@ Example:
>> tlmm: pinctrl@340 {
>> compatible = "qcom,sdm845-pinctrl";
>> reg = <0x0340 0xc0>;
>> -interrupts = ;
>> gpio-controller;
>> #gpio-cells = <2>;
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> +interrupts-extended = < GIC_SPI 208 0>,
>> +< 510 0>, < 511 0>, < 512 0>, < 513 0>,
>> +< 514 0>, < 515 0>, < 516 0>, < 517 0>,
>> +< 518 0>, < 519 0>, < 632 0>, < 639 0>,
>> +< 521 0>, < 522 0>, < 523 0>, < 524 0>,
>> +< 525 0>, < 526 0>, < 527 0>, < 630 0>,
>> +< 637 0>, < 529 0>, < 530 0>, < 531 0>,
>> +< 532 0>, < 633 0>, < 640 0>, < 534 0>,
>> +< 535 0>, < 536 0>, < 537 0>, < 538 0>,
>> +< 539 0>, < 540 0>, < 541 0>, < 542 0>,
>> +< 543 0>, < 544 0>, < 545 0>, < 546 0>,
>> +< 547 0>, < 548 0>, < 549 0>, < 550 0>,
>> +< 551 0>, < 552 0>, < 553 0>, < 554 0>,
>> +< 555 0>, < 556 0>, < 557 0>, < 631 0>,
>> +< 638 0>, < 559 0>, < 560 0>, < 561 0>,
>> +< 562 0>, < 563 0>, < 564 0>, < 565 0>,
>> +< 566 0>, < 570 0>, < 571 0>, < 572 0>,
>> +< 573 0>, < 609 0>, < 610 0>, < 611 0>,
>> +< 612 0>, < 613 0>, < 614 0>, < 615 0>,
>> +< 617 0>, < 618 0>, < 619 0>, < 620 0>,
>> +< 621 0>, < 622 0>, < 623 0>;
>
> I would expect that there are about 80 WARN_ON() hit in the irq code
> when you boot mainline with this. Have you tried that?
Dunno about the ones pointing to the PDC, but the one pointing to the
GIC is definitely a howler.
Another reason for this code to be developed and tested with mainline.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
Re: [PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
On 21/08/18 00:19, Bjorn Andersson wrote:
> On Fri 17 Aug 12:10 PDT 2018, Lina Iyer wrote:
>> diff --git
>> a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
>> b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> [..]
>> @@ -155,11 +166,52 @@ Example:
>> tlmm: pinctrl@340 {
>> compatible = "qcom,sdm845-pinctrl";
>> reg = <0x0340 0xc0>;
>> -interrupts = ;
>> gpio-controller;
>> #gpio-cells = <2>;
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> +interrupts-extended = < GIC_SPI 208 0>,
>> +< 510 0>, < 511 0>, < 512 0>, < 513 0>,
>> +< 514 0>, < 515 0>, < 516 0>, < 517 0>,
>> +< 518 0>, < 519 0>, < 632 0>, < 639 0>,
>> +< 521 0>, < 522 0>, < 523 0>, < 524 0>,
>> +< 525 0>, < 526 0>, < 527 0>, < 630 0>,
>> +< 637 0>, < 529 0>, < 530 0>, < 531 0>,
>> +< 532 0>, < 633 0>, < 640 0>, < 534 0>,
>> +< 535 0>, < 536 0>, < 537 0>, < 538 0>,
>> +< 539 0>, < 540 0>, < 541 0>, < 542 0>,
>> +< 543 0>, < 544 0>, < 545 0>, < 546 0>,
>> +< 547 0>, < 548 0>, < 549 0>, < 550 0>,
>> +< 551 0>, < 552 0>, < 553 0>, < 554 0>,
>> +< 555 0>, < 556 0>, < 557 0>, < 631 0>,
>> +< 638 0>, < 559 0>, < 560 0>, < 561 0>,
>> +< 562 0>, < 563 0>, < 564 0>, < 565 0>,
>> +< 566 0>, < 570 0>, < 571 0>, < 572 0>,
>> +< 573 0>, < 609 0>, < 610 0>, < 611 0>,
>> +< 612 0>, < 613 0>, < 614 0>, < 615 0>,
>> +< 617 0>, < 618 0>, < 619 0>, < 620 0>,
>> +< 621 0>, < 622 0>, < 623 0>;
>
> I would expect that there are about 80 WARN_ON() hit in the irq code
> when you boot mainline with this. Have you tried that?
Dunno about the ones pointing to the PDC, but the one pointing to the
GIC is definitely a howler.
Another reason for this code to be developed and tested with mainline.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
Re: [PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
On Fri 17 Aug 12:10 PDT 2018, Lina Iyer wrote:
> diff --git
> a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
[..]
> @@ -155,11 +166,52 @@ Example:
> tlmm: pinctrl@340 {
> compatible = "qcom,sdm845-pinctrl";
> reg = <0x0340 0xc0>;
> - interrupts = ;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> + interrupts-extended = < GIC_SPI 208 0>,
> + < 510 0>, < 511 0>, < 512 0>, < 513 0>,
> + < 514 0>, < 515 0>, < 516 0>, < 517 0>,
> + < 518 0>, < 519 0>, < 632 0>, < 639 0>,
> + < 521 0>, < 522 0>, < 523 0>, < 524 0>,
> + < 525 0>, < 526 0>, < 527 0>, < 630 0>,
> + < 637 0>, < 529 0>, < 530 0>, < 531 0>,
> + < 532 0>, < 633 0>, < 640 0>, < 534 0>,
> + < 535 0>, < 536 0>, < 537 0>, < 538 0>,
> + < 539 0>, < 540 0>, < 541 0>, < 542 0>,
> + < 543 0>, < 544 0>, < 545 0>, < 546 0>,
> + < 547 0>, < 548 0>, < 549 0>, < 550 0>,
> + < 551 0>, < 552 0>, < 553 0>, < 554 0>,
> + < 555 0>, < 556 0>, < 557 0>, < 631 0>,
> + < 638 0>, < 559 0>, < 560 0>, < 561 0>,
> + < 562 0>, < 563 0>, < 564 0>, < 565 0>,
> + < 566 0>, < 570 0>, < 571 0>, < 572 0>,
> + < 573 0>, < 609 0>, < 610 0>, < 611 0>,
> + < 612 0>, < 613 0>, < 614 0>, < 615 0>,
> + < 617 0>, < 618 0>, < 619 0>, < 620 0>,
> + < 621 0>, < 622 0>, < 623 0>;
I would expect that there are about 80 WARN_ON() hit in the irq code
when you boot mainline with this. Have you tried that?
Looks reasonable otherwise.
Regards,
Bjorn
Re: [PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
On Fri 17 Aug 12:10 PDT 2018, Lina Iyer wrote:
> diff --git
> a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
> b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
[..]
> @@ -155,11 +166,52 @@ Example:
> tlmm: pinctrl@340 {
> compatible = "qcom,sdm845-pinctrl";
> reg = <0x0340 0xc0>;
> - interrupts = ;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> + interrupts-extended = < GIC_SPI 208 0>,
> + < 510 0>, < 511 0>, < 512 0>, < 513 0>,
> + < 514 0>, < 515 0>, < 516 0>, < 517 0>,
> + < 518 0>, < 519 0>, < 632 0>, < 639 0>,
> + < 521 0>, < 522 0>, < 523 0>, < 524 0>,
> + < 525 0>, < 526 0>, < 527 0>, < 630 0>,
> + < 637 0>, < 529 0>, < 530 0>, < 531 0>,
> + < 532 0>, < 633 0>, < 640 0>, < 534 0>,
> + < 535 0>, < 536 0>, < 537 0>, < 538 0>,
> + < 539 0>, < 540 0>, < 541 0>, < 542 0>,
> + < 543 0>, < 544 0>, < 545 0>, < 546 0>,
> + < 547 0>, < 548 0>, < 549 0>, < 550 0>,
> + < 551 0>, < 552 0>, < 553 0>, < 554 0>,
> + < 555 0>, < 556 0>, < 557 0>, < 631 0>,
> + < 638 0>, < 559 0>, < 560 0>, < 561 0>,
> + < 562 0>, < 563 0>, < 564 0>, < 565 0>,
> + < 566 0>, < 570 0>, < 571 0>, < 572 0>,
> + < 573 0>, < 609 0>, < 610 0>, < 611 0>,
> + < 612 0>, < 613 0>, < 614 0>, < 615 0>,
> + < 617 0>, < 618 0>, < 619 0>, < 620 0>,
> + < 621 0>, < 622 0>, < 623 0>;
I would expect that there are about 80 WARN_ON() hit in the irq code
when you boot mainline with this. Have you tried that?
Looks reasonable otherwise.
Regards,
Bjorn
Re: [PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
On Fri, 17 Aug 2018 13:10:22 -0600, Lina Iyer wrote: > Update the documentation to use interrupts-extended format for > specifying the TLMM summary IRQ line that is requested from GIC and the > PDC interrupts corresponding to the wakeup capable GPIOs. > > Update the example to show PDC interrupts for the wakeup capable GPIOs > for SDM845. > > Cc: devicet...@vger.kernel.org > Signed-off-by: Lina Iyer > --- > .../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 58 ++- > 1 file changed, 55 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring
Re: [PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
On Fri, 17 Aug 2018 13:10:22 -0600, Lina Iyer wrote: > Update the documentation to use interrupts-extended format for > specifying the TLMM summary IRQ line that is requested from GIC and the > PDC interrupts corresponding to the wakeup capable GPIOs. > > Update the example to show PDC interrupts for the wakeup capable GPIOs > for SDM845. > > Cc: devicet...@vger.kernel.org > Signed-off-by: Lina Iyer > --- > .../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 58 ++- > 1 file changed, 55 insertions(+), 3 deletions(-) > Reviewed-by: Rob Herring
[PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
Update the documentation to use interrupts-extended format for
specifying the TLMM summary IRQ line that is requested from GIC and the
PDC interrupts corresponding to the wakeup capable GPIOs.
Update the example to show PDC interrupts for the wakeup capable GPIOs
for SDM845.
Cc: devicet...@vger.kernel.org
Signed-off-by: Lina Iyer
---
.../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 58 ++-
1 file changed, 55 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
index 665aadb5ea28..d7408cc74e01 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
@@ -13,10 +13,21 @@ SDM845 platform.
Value type:
Definition: the base address and size of the TLMM register space.
-- interrupts:
+- interrupts-extended:
Usage: required
Value type:
- Definition: should specify the TLMM summary IRQ.
+ Definition: should specify the TLMM summary IRQ as the first
+ interrupt. Optionally, wake up capable GPIOs may list
+ their corresponding PDC interrupts here.
+
+- interrupt-names:
+ Usage: required
+ Value type:
+ Definition: the names matching the interrupt definition in the
+ interrupts-extended property. The first interrupt name
+ must be "summary-irq" for the TLMM summary IRQ. PDC
+ interrupts must be described by "gpioN", where N is the
+ GPIO line corresponding to the PDC IRQ.
- interrupt-controller:
Usage: required
@@ -155,11 +166,52 @@ Example:
tlmm: pinctrl@340 {
compatible = "qcom,sdm845-pinctrl";
reg = <0x0340 0xc0>;
- interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ interrupts-extended = < GIC_SPI 208 0>,
+ < 510 0>, < 511 0>, < 512 0>, < 513 0>,
+ < 514 0>, < 515 0>, < 516 0>, < 517 0>,
+ < 518 0>, < 519 0>, < 632 0>, < 639 0>,
+ < 521 0>, < 522 0>, < 523 0>, < 524 0>,
+ < 525 0>, < 526 0>, < 527 0>, < 630 0>,
+ < 637 0>, < 529 0>, < 530 0>, < 531 0>,
+ < 532 0>, < 633 0>, < 640 0>, < 534 0>,
+ < 535 0>, < 536 0>, < 537 0>, < 538 0>,
+ < 539 0>, < 540 0>, < 541 0>, < 542 0>,
+ < 543 0>, < 544 0>, < 545 0>, < 546 0>,
+ < 547 0>, < 548 0>, < 549 0>, < 550 0>,
+ < 551 0>, < 552 0>, < 553 0>, < 554 0>,
+ < 555 0>, < 556 0>, < 557 0>, < 631 0>,
+ < 638 0>, < 559 0>, < 560 0>, < 561 0>,
+ < 562 0>, < 563 0>, < 564 0>, < 565 0>,
+ < 566 0>, < 570 0>, < 571 0>, < 572 0>,
+ < 573 0>, < 609 0>, < 610 0>, < 611 0>,
+ < 612 0>, < 613 0>, < 614 0>, < 615 0>,
+ < 617 0>, < 618 0>, < 619 0>, < 620 0>,
+ < 621 0>, < 622 0>, < 623 0>;
+ interrupt-names = "summary-irq",
+ "gpio1", "gpio3", "gpio5", "gpio10",
+ "gpio11", "gpio20", "gpio22", "gpio24",
+ "gpio26", "gpio30", "gpio31", "gpio31",
+ "gpio32", "gpio34", "gpio36", "gpio37",
+ "gpio38", "gpio39", "gpio40", "gpio41",
+ "gpio41", "gpio43", "gpio44", "gpio46",
+ "gpio48", "gpio49", "gpio49", "gpio52",
+ "gpio53", "gpio54", "gpio56", "gpio57",
+ "gpio58", "gpio59", "gpio60", "gpio61",
+ "gpio62", "gpio63", "gpio64", "gpio66",
+ "gpio68", "gpio71", "gpio73", "gpio77",
+ "gpio78", "gpio79", "gpio80", "gpio84",
+ "gpio85", "gpio86", "gpio88", "gpio89",
+ "gpio89", "gpio91", "gpio92", "gpio95",
+ "gpio96", "gpio97", "gpio101", "gpio103",
+ "gpio104", "gpio115", "gpio116", "gpio117",
+ "gpio118", "gpio119", "gpio120", "gpio121",
+ "gpio122", "gpio123", "gpio124", "gpio125",
+ "gpio127", "gpio128", "gpio129", "gpio130",
+ "gpio132", "gpio133", "gpio145";
qup9_active: qup9-active {
mux {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
[PATCH RESEND v1 1/5] dt-bindings: pinctrl: add wakeup capable GPIOs for SDM845
Update the documentation to use interrupts-extended format for
specifying the TLMM summary IRQ line that is requested from GIC and the
PDC interrupts corresponding to the wakeup capable GPIOs.
Update the example to show PDC interrupts for the wakeup capable GPIOs
for SDM845.
Cc: devicet...@vger.kernel.org
Signed-off-by: Lina Iyer
---
.../bindings/pinctrl/qcom,sdm845-pinctrl.txt | 58 ++-
1 file changed, 55 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
index 665aadb5ea28..d7408cc74e01 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt
@@ -13,10 +13,21 @@ SDM845 platform.
Value type:
Definition: the base address and size of the TLMM register space.
-- interrupts:
+- interrupts-extended:
Usage: required
Value type:
- Definition: should specify the TLMM summary IRQ.
+ Definition: should specify the TLMM summary IRQ as the first
+ interrupt. Optionally, wake up capable GPIOs may list
+ their corresponding PDC interrupts here.
+
+- interrupt-names:
+ Usage: required
+ Value type:
+ Definition: the names matching the interrupt definition in the
+ interrupts-extended property. The first interrupt name
+ must be "summary-irq" for the TLMM summary IRQ. PDC
+ interrupts must be described by "gpioN", where N is the
+ GPIO line corresponding to the PDC IRQ.
- interrupt-controller:
Usage: required
@@ -155,11 +166,52 @@ Example:
tlmm: pinctrl@340 {
compatible = "qcom,sdm845-pinctrl";
reg = <0x0340 0xc0>;
- interrupts = ;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ interrupts-extended = < GIC_SPI 208 0>,
+ < 510 0>, < 511 0>, < 512 0>, < 513 0>,
+ < 514 0>, < 515 0>, < 516 0>, < 517 0>,
+ < 518 0>, < 519 0>, < 632 0>, < 639 0>,
+ < 521 0>, < 522 0>, < 523 0>, < 524 0>,
+ < 525 0>, < 526 0>, < 527 0>, < 630 0>,
+ < 637 0>, < 529 0>, < 530 0>, < 531 0>,
+ < 532 0>, < 633 0>, < 640 0>, < 534 0>,
+ < 535 0>, < 536 0>, < 537 0>, < 538 0>,
+ < 539 0>, < 540 0>, < 541 0>, < 542 0>,
+ < 543 0>, < 544 0>, < 545 0>, < 546 0>,
+ < 547 0>, < 548 0>, < 549 0>, < 550 0>,
+ < 551 0>, < 552 0>, < 553 0>, < 554 0>,
+ < 555 0>, < 556 0>, < 557 0>, < 631 0>,
+ < 638 0>, < 559 0>, < 560 0>, < 561 0>,
+ < 562 0>, < 563 0>, < 564 0>, < 565 0>,
+ < 566 0>, < 570 0>, < 571 0>, < 572 0>,
+ < 573 0>, < 609 0>, < 610 0>, < 611 0>,
+ < 612 0>, < 613 0>, < 614 0>, < 615 0>,
+ < 617 0>, < 618 0>, < 619 0>, < 620 0>,
+ < 621 0>, < 622 0>, < 623 0>;
+ interrupt-names = "summary-irq",
+ "gpio1", "gpio3", "gpio5", "gpio10",
+ "gpio11", "gpio20", "gpio22", "gpio24",
+ "gpio26", "gpio30", "gpio31", "gpio31",
+ "gpio32", "gpio34", "gpio36", "gpio37",
+ "gpio38", "gpio39", "gpio40", "gpio41",
+ "gpio41", "gpio43", "gpio44", "gpio46",
+ "gpio48", "gpio49", "gpio49", "gpio52",
+ "gpio53", "gpio54", "gpio56", "gpio57",
+ "gpio58", "gpio59", "gpio60", "gpio61",
+ "gpio62", "gpio63", "gpio64", "gpio66",
+ "gpio68", "gpio71", "gpio73", "gpio77",
+ "gpio78", "gpio79", "gpio80", "gpio84",
+ "gpio85", "gpio86", "gpio88", "gpio89",
+ "gpio89", "gpio91", "gpio92", "gpio95",
+ "gpio96", "gpio97", "gpio101", "gpio103",
+ "gpio104", "gpio115", "gpio116", "gpio117",
+ "gpio118", "gpio119", "gpio120", "gpio121",
+ "gpio122", "gpio123", "gpio124", "gpio125",
+ "gpio127", "gpio128", "gpio129", "gpio130",
+ "gpio132", "gpio133", "gpio145";
qup9_active: qup9-active {
mux {
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
