Re: [PATCH RFC 1/2] dt-bindings: interconnect: qcom: add msm8974 bindings
On Wed 04 Sep 03:20 PDT 2019, Brian Masney wrote:
> On Tue, Sep 03, 2019 at 10:01:03PM -0700, Bjorn Andersson wrote:
> > On Mon 02 Sep 14:19 PDT 2019, Brian Masney wrote:
> > > + mmssnoc: interconnect@fc478000 {
> > > + reg = <0xfc478000 0x4000>;
> > > + compatible = "qcom,msm8974-mmssnoc";
> > > + #interconnect-cells = <1>;
> > > + clock-names = "bus", "bus_a";
> > > + clocks = < RPM_SMD_MMSSNOC_AHB_CLK>,
> > > + < RPM_SMD_MMSSNOC_AHB_A_CLK>;
> >
> > Isn't MMSS_S0_AXI_CLK the bus clock of the mmssnoc (which somehow seems
> > to depend on mmssnoc_ahb_clk)?
>
> I'll give that a try. Do you know which clock I should use for bus_a
> here? On the mmcc, I see the following mmss clocks available:
>
> MMSS_AHB_CLK_SRC
> MMSS_AXI_CLK_SRC
> MMSS_RBCPR_CLK_SRC
> MMSS_MISC_AHB_CLK
> MMSS_MMSSNOC_AHB_CLK
> MMSS_MMSSNOC_BTO_AHB_CLK
> MMSS_MMSSNOC_AXI_CLK
> MMSS_S0_AXI_CLK
>
> I'm also unsure of what's going on at the hardware level that the second
> clock (bus_a) is needed.
>
In msm-3.4 clock-8974.c both bus and bus_a is defined as
mmss_s0_axi_clk. But iirc I also needed mmssnoc_axi_clk to get DSI
working on my devices, which is listed as .depends of the s0_axi clock.
So that probably needs some more investigation...But easiest would
probably be to just have the mmss_noc use them both listed as bus
clocks?
Regards,
Bjorn
> > > + mdss: mdss@fd90 {
> >
> > I think you can omit the client, as this adheres to the standard binding
> > for interconnect clients. And you don't need to have an example that
> > covers all compatibles either...
>
> OK, I'll drop some of these.
>
> > > diff --git a/include/dt-bindings/interconnect/qcom,msm8974.h
> > > b/include/dt-bindings/interconnect/qcom,msm8974.h
> > > new file mode 100644
> > > index ..58acf7196410
> > > --- /dev/null
> > > +++ b/include/dt-bindings/interconnect/qcom,msm8974.h
> > > @@ -0,0 +1,146 @@
> > > +/* SPDX-License-Identifier: GPL-2.0 */
> >
> > Would you mind dual licensing this part as well?
>
> Sure, that was an oversight on my part.
>
> > Apart from that, I think this binding looks good.
>
> Thanks,
>
> Brian
Re: [PATCH RFC 1/2] dt-bindings: interconnect: qcom: add msm8974 bindings
On Tue, Sep 03, 2019 at 10:01:03PM -0700, Bjorn Andersson wrote:
> On Mon 02 Sep 14:19 PDT 2019, Brian Masney wrote:
> > + mmssnoc: interconnect@fc478000 {
> > + reg = <0xfc478000 0x4000>;
> > + compatible = "qcom,msm8974-mmssnoc";
> > + #interconnect-cells = <1>;
> > + clock-names = "bus", "bus_a";
> > + clocks = < RPM_SMD_MMSSNOC_AHB_CLK>,
> > + < RPM_SMD_MMSSNOC_AHB_A_CLK>;
>
> Isn't MMSS_S0_AXI_CLK the bus clock of the mmssnoc (which somehow seems
> to depend on mmssnoc_ahb_clk)?
I'll give that a try. Do you know which clock I should use for bus_a
here? On the mmcc, I see the following mmss clocks available:
MMSS_AHB_CLK_SRC
MMSS_AXI_CLK_SRC
MMSS_RBCPR_CLK_SRC
MMSS_MISC_AHB_CLK
MMSS_MMSSNOC_AHB_CLK
MMSS_MMSSNOC_BTO_AHB_CLK
MMSS_MMSSNOC_AXI_CLK
MMSS_S0_AXI_CLK
I'm also unsure of what's going on at the hardware level that the second
clock (bus_a) is needed.
> > + mdss: mdss@fd90 {
>
> I think you can omit the client, as this adheres to the standard binding
> for interconnect clients. And you don't need to have an example that
> covers all compatibles either...
OK, I'll drop some of these.
> > diff --git a/include/dt-bindings/interconnect/qcom,msm8974.h
> > b/include/dt-bindings/interconnect/qcom,msm8974.h
> > new file mode 100644
> > index ..58acf7196410
> > --- /dev/null
> > +++ b/include/dt-bindings/interconnect/qcom,msm8974.h
> > @@ -0,0 +1,146 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
>
> Would you mind dual licensing this part as well?
Sure, that was an oversight on my part.
> Apart from that, I think this binding looks good.
Thanks,
Brian
Re: [PATCH RFC 1/2] dt-bindings: interconnect: qcom: add msm8974 bindings
On Mon 02 Sep 14:19 PDT 2019, Brian Masney wrote:
> Add device tree bindings for the Qualcomm MSM8974 interconnect providers
> that support setting system bandwidth requirements between various
> network-on-chip fabrics.
>
> Signed-off-by: Brian Masney
> ---
> .../bindings/interconnect/qcom,msm8974.yaml | 163 ++
> .../dt-bindings/interconnect/qcom,msm8974.h | 146
> 2 files changed, 309 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
> create mode 100644 include/dt-bindings/interconnect/qcom,msm8974.h
>
> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
> b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
> new file mode 100644
> index ..fbf440f5ffe0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
> @@ -0,0 +1,163 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interconnect/qcom,msm8974.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm MSM8974 Network-On-Chip Interconnect
> +
> +maintainers:
> + - Brian Masney
> +
> +description: |
> + The Qualcomm MSM8974 interconnect providers support setting system
> + bandwidth requirements between various network-on-chip fabrics.
> +
> +properties:
> + reg:
> +maxItems: 1
> +
> + compatible:
> +enum:
> + - qcom,msm8974-bimc
> + - qcom,msm8974-cnoc
> + - qcom,msm8974-mmssnoc
> + - qcom,msm8974-ocmemnoc
> + - qcom,msm8974-pnoc
> + - qcom,msm8974-snoc
> +
> + '#interconnect-cells':
> +const: 1
> +
> + clock-names:
> +items:
> + - const: bus
> + - const: bus_a
> +
> + clocks:
> +items:
> + - description: Bus Clock
> + - description: Bus A Clock
> +
> +required:
> + - compatible
> + - reg
> + - '#interconnect-cells'
> + - clock-names
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include
> + #include
> + #include
> + #include
> +
> + bimc: interconnect@fc38 {
> + reg = <0xfc38 0x6a000>;
> + compatible = "qcom,msm8974-bimc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = < RPM_SMD_BIMC_CLK>,
> + < RPM_SMD_BIMC_A_CLK>;
> + };
> +
> + cnoc: interconnect@fc48 {
> + reg = <0xfc48 0x4000>;
> + compatible = "qcom,msm8974-cnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = < RPM_SMD_CNOC_CLK>,
> + < RPM_SMD_CNOC_A_CLK>;
> + };
> +
> + mmssnoc: interconnect@fc478000 {
> + reg = <0xfc478000 0x4000>;
> + compatible = "qcom,msm8974-mmssnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = < RPM_SMD_MMSSNOC_AHB_CLK>,
> + < RPM_SMD_MMSSNOC_AHB_A_CLK>;
Isn't MMSS_S0_AXI_CLK the bus clock of the mmssnoc (which somehow seems
to depend on mmssnoc_ahb_clk)?
> + };
> +
> + ocmemnoc: interconnect@fc47 {
> + reg = <0xfc47 0x4000>;
> + compatible = "qcom,msm8974-ocmemnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = < RPM_SMD_OCMEMGX_CLK>,
> + < RPM_SMD_OCMEMGX_A_CLK>;
> + };
> +
> + pnoc: interconnect@fc468000 {
> + reg = <0xfc468000 0x4000>;
> + compatible = "qcom,msm8974-pnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = < RPM_SMD_PNOC_CLK>,
> + < RPM_SMD_PNOC_A_CLK>;
> + };
> +
> + snoc: interconnect@fc46 {
> + reg = <0xfc46 0x4000>;
> + compatible = "qcom,msm8974-snoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = < RPM_SMD_SNOC_CLK>,
> + < RPM_SMD_SNOC_A_CLK>;
> + };
> +
> + mdss: mdss@fd90 {
I think you can omit the client, as this adheres to the standard binding
for interconnect clients. And you don't need to have an example that
covers all compatibles either...
> + compatible = "qcom,mdss";
> + reg = <0xfd90 0x100>, <0xfd924000 0x1000>;
> + reg-names = "mdss_phys", "vbif_phys";
> +
> + power-domains = < MDSS_GDSC>;
> +
> + clocks = < MDSS_AHB_CLK>,
> + < MDSS_AXI_CLK>,
> + < MDSS_VSYNC_CLK>;
> + clock-names = "iface", "bus", "vsync";
> +
> + interrupts = ;
> +
> + interrupt-controller;
> +
[PATCH RFC 1/2] dt-bindings: interconnect: qcom: add msm8974 bindings
Add device tree bindings for the Qualcomm MSM8974 interconnect providers
that support setting system bandwidth requirements between various
network-on-chip fabrics.
Signed-off-by: Brian Masney
---
.../bindings/interconnect/qcom,msm8974.yaml | 163 ++
.../dt-bindings/interconnect/qcom,msm8974.h | 146
2 files changed, 309 insertions(+)
create mode 100644
Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
create mode 100644 include/dt-bindings/interconnect/qcom,msm8974.h
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
new file mode 100644
index ..fbf440f5ffe0
--- /dev/null
+++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8974.yaml
@@ -0,0 +1,163 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interconnect/qcom,msm8974.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm MSM8974 Network-On-Chip Interconnect
+
+maintainers:
+ - Brian Masney
+
+description: |
+ The Qualcomm MSM8974 interconnect providers support setting system
+ bandwidth requirements between various network-on-chip fabrics.
+
+properties:
+ reg:
+maxItems: 1
+
+ compatible:
+enum:
+ - qcom,msm8974-bimc
+ - qcom,msm8974-cnoc
+ - qcom,msm8974-mmssnoc
+ - qcom,msm8974-ocmemnoc
+ - qcom,msm8974-pnoc
+ - qcom,msm8974-snoc
+
+ '#interconnect-cells':
+const: 1
+
+ clock-names:
+items:
+ - const: bus
+ - const: bus_a
+
+ clocks:
+items:
+ - description: Bus Clock
+ - description: Bus A Clock
+
+required:
+ - compatible
+ - reg
+ - '#interconnect-cells'
+ - clock-names
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include
+ #include
+ #include
+ #include
+
+ bimc: interconnect@fc38 {
+ reg = <0xfc38 0x6a000>;
+ compatible = "qcom,msm8974-bimc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = < RPM_SMD_BIMC_CLK>,
+ < RPM_SMD_BIMC_A_CLK>;
+ };
+
+ cnoc: interconnect@fc48 {
+ reg = <0xfc48 0x4000>;
+ compatible = "qcom,msm8974-cnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = < RPM_SMD_CNOC_CLK>,
+ < RPM_SMD_CNOC_A_CLK>;
+ };
+
+ mmssnoc: interconnect@fc478000 {
+ reg = <0xfc478000 0x4000>;
+ compatible = "qcom,msm8974-mmssnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = < RPM_SMD_MMSSNOC_AHB_CLK>,
+ < RPM_SMD_MMSSNOC_AHB_A_CLK>;
+ };
+
+ ocmemnoc: interconnect@fc47 {
+ reg = <0xfc47 0x4000>;
+ compatible = "qcom,msm8974-ocmemnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = < RPM_SMD_OCMEMGX_CLK>,
+ < RPM_SMD_OCMEMGX_A_CLK>;
+ };
+
+ pnoc: interconnect@fc468000 {
+ reg = <0xfc468000 0x4000>;
+ compatible = "qcom,msm8974-pnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = < RPM_SMD_PNOC_CLK>,
+ < RPM_SMD_PNOC_A_CLK>;
+ };
+
+ snoc: interconnect@fc46 {
+ reg = <0xfc46 0x4000>;
+ compatible = "qcom,msm8974-snoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = < RPM_SMD_SNOC_CLK>,
+ < RPM_SMD_SNOC_A_CLK>;
+ };
+
+ mdss: mdss@fd90 {
+ compatible = "qcom,mdss";
+ reg = <0xfd90 0x100>, <0xfd924000 0x1000>;
+ reg-names = "mdss_phys", "vbif_phys";
+
+ power-domains = < MDSS_GDSC>;
+
+ clocks = < MDSS_AHB_CLK>,
+ < MDSS_AXI_CLK>,
+ < MDSS_VSYNC_CLK>;
+ clock-names = "iface", "bus", "vsync";
+
+ interrupts = ;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ mdp: mdp@fd90 {
+ compatible = "qcom,mdp5";
+ reg = <0xfd900100 0x22000>;
+ reg-names = "mdp_phys";
+
+ interrupt-parent = <>;
+ interrupts = <0 0>;
+
+ clocks = < MDSS_AHB_CLK>,
+ < MDSS_AXI_CLK>,
+ < MDSS_MDP_CLK>,
+ < MDSS_VSYNC_CLK>;
+
