Re: [PATCH V2 01/14] MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
I'm sorry, this is the only patch, please ignore [01/14]. On Tue, Mar 5, 2013 at 12:37 PM, Huacai Chen wrote: > Currently, clear_page()/copy_page() are generated by Micro-assembler > dynamically. But they are unavailable until uasm_resolve_relocs() has > finished because jump labels are illegal before that. Since these > functions are shared by every CPU, we only call build_clear_page()/ > build_copy_page() only once at boot time. Without this patch, programs > will get random memory corruption (segmentation fault, bus error, etc.) > while CPU Hotplug (e.g. one CPU is using clear_page() while another is > generating it in cpu_cache_init()). > > For similar reasons we modify build_tlb_refill_handler()'s invocation. > > V2: > 1, Rework the code to make CPU#0 can be online/offline. > 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU > need a per-CPU tlb_refill_handler(). > > Signed-off-by: Huacai Chen > Signed-off-by: Hongbing Hu > --- > arch/mips/include/asm/cpu-features.h |3 +++ > .../asm/mach-loongson/cpu-feature-overrides.h |1 + > arch/mips/mm/page.c| 10 ++ > arch/mips/mm/tlbex.c | 10 -- > 4 files changed, 22 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/include/asm/cpu-features.h > b/arch/mips/include/asm/cpu-features.h > index c507b93..1204408 100644 > --- a/arch/mips/include/asm/cpu-features.h > +++ b/arch/mips/include/asm/cpu-features.h > @@ -110,6 +110,9 @@ > #ifndef cpu_has_pindexed_dcache > #define cpu_has_pindexed_dcache(cpu_data[0].dcache.flags & > MIPS_CACHE_PINDEX) > #endif > +#ifndef cpu_has_local_ebase > +#define cpu_has_local_ebase1 > +#endif > > /* > * I-Cache snoops remote store. This only matters on SMP. Some > multiprocessors > diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > index 1a05d85..8eec8e2 100644 > --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > @@ -57,5 +57,6 @@ > #define cpu_has_vint 0 > #define cpu_has_vtag_icache0 > #define cpu_has_watch 1 > +#define cpu_has_local_ebase0 > > #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ > diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c > index 8e666c5..6a39c01 100644 > --- a/arch/mips/mm/page.c > +++ b/arch/mips/mm/page.c > @@ -247,6 +247,11 @@ void __cpuinit build_clear_page(void) > struct uasm_label *l = labels; > struct uasm_reloc *r = relocs; > int i; > + static atomic_t run_once = ATOMIC_INIT(0); > + > + if (atomic_xchg(_once, 1)) { > + return; > + } > > memset(labels, 0, sizeof(labels)); > memset(relocs, 0, sizeof(relocs)); > @@ -389,6 +394,11 @@ void __cpuinit build_copy_page(void) > struct uasm_label *l = labels; > struct uasm_reloc *r = relocs; > int i; > + static atomic_t run_once = ATOMIC_INIT(0); > + > + if (atomic_xchg(_once, 1)) { > + return; > + } > > memset(labels, 0, sizeof(labels)); > memset(relocs, 0, sizeof(relocs)); > diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c > index 1c8ac49..4a8b294 100644 > --- a/arch/mips/mm/tlbex.c > +++ b/arch/mips/mm/tlbex.c > @@ -2161,8 +2161,11 @@ void __cpuinit build_tlb_refill_handler(void) > case CPU_TX3922: > case CPU_TX3927: > #ifndef CONFIG_MIPS_PGD_C0_CONTEXT > - build_r3000_tlb_refill_handler(); > + if (cpu_has_local_ebase) > + build_r3000_tlb_refill_handler(); > if (!run_once) { > + if (!cpu_has_local_ebase) > + build_r3000_tlb_refill_handler(); > build_r3000_tlb_load_handler(); > build_r3000_tlb_store_handler(); > build_r3000_tlb_modify_handler(); > @@ -2191,9 +2194,12 @@ void __cpuinit build_tlb_refill_handler(void) > build_r4000_tlb_load_handler(); > build_r4000_tlb_store_handler(); > build_r4000_tlb_modify_handler(); > + if (!cpu_has_local_ebase) > + build_r4000_tlb_refill_handler(); > run_once++; > } > - build_r4000_tlb_refill_handler(); > + if (cpu_has_local_ebase) > + build_r4000_tlb_refill_handler(); > } > } > > -- > 1.7.7.3 > -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH V2 01/14] MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
I'm sorry, this is the only patch, please ignore [01/14]. > Currently, clear_page()/copy_page() are generated by Micro-assembler > dynamically. But they are unavailable until uasm_resolve_relocs() has > finished because jump labels are illegal before that. Since these > functions are shared by every CPU, we only call build_clear_page()/ > build_copy_page() only once at boot time. Without this patch, programs > will get random memory corruption (segmentation fault, bus error, etc.) > while CPU Hotplug (e.g. one CPU is using clear_page() while another is > generating it in cpu_cache_init()). > > For similar reasons we modify build_tlb_refill_handler()'s invocation. > > V2: > 1, Rework the code to make CPU#0 can be online/offline. > 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU > need a per-CPU tlb_refill_handler(). > > Signed-off-by: Huacai Chen > Signed-off-by: Hongbing Hu > --- > arch/mips/include/asm/cpu-features.h |3 +++ > .../asm/mach-loongson/cpu-feature-overrides.h |1 + > arch/mips/mm/page.c| 10 ++ > arch/mips/mm/tlbex.c | 10 -- > 4 files changed, 22 insertions(+), 2 deletions(-) > > diff --git a/arch/mips/include/asm/cpu-features.h > b/arch/mips/include/asm/cpu-features.h > index c507b93..1204408 100644 > --- a/arch/mips/include/asm/cpu-features.h > +++ b/arch/mips/include/asm/cpu-features.h > @@ -110,6 +110,9 @@ > #ifndef cpu_has_pindexed_dcache > #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & > MIPS_CACHE_PINDEX) > #endif > +#ifndef cpu_has_local_ebase > +#define cpu_has_local_ebase 1 > +#endif > > /* > * I-Cache snoops remote store. This only matters on SMP. Some > multiprocessors > diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > index 1a05d85..8eec8e2 100644 > --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h > @@ -57,5 +57,6 @@ > #define cpu_has_vint 0 > #define cpu_has_vtag_icache 0 > #define cpu_has_watch1 > +#define cpu_has_local_ebase 0 > > #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ > diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c > index 8e666c5..6a39c01 100644 > --- a/arch/mips/mm/page.c > +++ b/arch/mips/mm/page.c > @@ -247,6 +247,11 @@ void __cpuinit build_clear_page(void) > struct uasm_label *l = labels; > struct uasm_reloc *r = relocs; > int i; > + static atomic_t run_once = ATOMIC_INIT(0); > + > + if (atomic_xchg(_once, 1)) { > + return; > + } > > memset(labels, 0, sizeof(labels)); > memset(relocs, 0, sizeof(relocs)); > @@ -389,6 +394,11 @@ void __cpuinit build_copy_page(void) > struct uasm_label *l = labels; > struct uasm_reloc *r = relocs; > int i; > + static atomic_t run_once = ATOMIC_INIT(0); > + > + if (atomic_xchg(_once, 1)) { > + return; > + } > > memset(labels, 0, sizeof(labels)); > memset(relocs, 0, sizeof(relocs)); > diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c > index 1c8ac49..4a8b294 100644 > --- a/arch/mips/mm/tlbex.c > +++ b/arch/mips/mm/tlbex.c > @@ -2161,8 +2161,11 @@ void __cpuinit build_tlb_refill_handler(void) > case CPU_TX3922: > case CPU_TX3927: > #ifndef CONFIG_MIPS_PGD_C0_CONTEXT > - build_r3000_tlb_refill_handler(); > + if (cpu_has_local_ebase) > + build_r3000_tlb_refill_handler(); > if (!run_once) { > + if (!cpu_has_local_ebase) > + build_r3000_tlb_refill_handler(); > build_r3000_tlb_load_handler(); > build_r3000_tlb_store_handler(); > build_r3000_tlb_modify_handler(); > @@ -2191,9 +2194,12 @@ void __cpuinit build_tlb_refill_handler(void) > build_r4000_tlb_load_handler(); > build_r4000_tlb_store_handler(); > build_r4000_tlb_modify_handler(); > + if (!cpu_has_local_ebase) > + build_r4000_tlb_refill_handler(); > run_once++; > } > - build_r4000_tlb_refill_handler(); > + if (cpu_has_local_ebase) > + build_r4000_tlb_refill_handler(); > } > } > > -- > 1.7.7.3 > > -- 江苏中科梦兰电子科技有限公司 软件部 陈华才 E-mail: che...@lemote.com Web: http://www.lemote.com/ Add: 江苏省常熟市虞山镇梦兰工业园 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V2 01/14] MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen Signed-off-by: Hongbing Hu --- arch/mips/include/asm/cpu-features.h |3 +++ .../asm/mach-loongson/cpu-feature-overrides.h |1 + arch/mips/mm/page.c| 10 ++ arch/mips/mm/tlbex.c | 10 -- 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index c507b93..1204408 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -110,6 +110,9 @@ #ifndef cpu_has_pindexed_dcache #define cpu_has_pindexed_dcache(cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) #endif +#ifndef cpu_has_local_ebase +#define cpu_has_local_ebase1 +#endif /* * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 1a05d85..8eec8e2 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -57,5 +57,6 @@ #define cpu_has_vint 0 #define cpu_has_vtag_icache0 #define cpu_has_watch 1 +#define cpu_has_local_ebase0 #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index 8e666c5..6a39c01 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c @@ -247,6 +247,11 @@ void __cpuinit build_clear_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); @@ -389,6 +394,11 @@ void __cpuinit build_copy_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 1c8ac49..4a8b294 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -2161,8 +2161,11 @@ void __cpuinit build_tlb_refill_handler(void) case CPU_TX3922: case CPU_TX3927: #ifndef CONFIG_MIPS_PGD_C0_CONTEXT - build_r3000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); if (!run_once) { + if (!cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); build_r3000_tlb_load_handler(); build_r3000_tlb_store_handler(); build_r3000_tlb_modify_handler(); @@ -2191,9 +2194,12 @@ void __cpuinit build_tlb_refill_handler(void) build_r4000_tlb_load_handler(); build_r4000_tlb_store_handler(); build_r4000_tlb_modify_handler(); + if (!cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); run_once++; } - build_r4000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); } } -- 1.7.7.3 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH V2 01/14] MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen che...@lemote.com Signed-off-by: Hongbing Hu h...@lemote.com --- arch/mips/include/asm/cpu-features.h |3 +++ .../asm/mach-loongson/cpu-feature-overrides.h |1 + arch/mips/mm/page.c| 10 ++ arch/mips/mm/tlbex.c | 10 -- 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index c507b93..1204408 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -110,6 +110,9 @@ #ifndef cpu_has_pindexed_dcache #define cpu_has_pindexed_dcache(cpu_data[0].dcache.flags MIPS_CACHE_PINDEX) #endif +#ifndef cpu_has_local_ebase +#define cpu_has_local_ebase1 +#endif /* * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 1a05d85..8eec8e2 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -57,5 +57,6 @@ #define cpu_has_vint 0 #define cpu_has_vtag_icache0 #define cpu_has_watch 1 +#define cpu_has_local_ebase0 #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index 8e666c5..6a39c01 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c @@ -247,6 +247,11 @@ void __cpuinit build_clear_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(run_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); @@ -389,6 +394,11 @@ void __cpuinit build_copy_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(run_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 1c8ac49..4a8b294 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -2161,8 +2161,11 @@ void __cpuinit build_tlb_refill_handler(void) case CPU_TX3922: case CPU_TX3927: #ifndef CONFIG_MIPS_PGD_C0_CONTEXT - build_r3000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); if (!run_once) { + if (!cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); build_r3000_tlb_load_handler(); build_r3000_tlb_store_handler(); build_r3000_tlb_modify_handler(); @@ -2191,9 +2194,12 @@ void __cpuinit build_tlb_refill_handler(void) build_r4000_tlb_load_handler(); build_r4000_tlb_store_handler(); build_r4000_tlb_modify_handler(); + if (!cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); run_once++; } - build_r4000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); } } -- 1.7.7.3 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH V2 01/14] MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
I'm sorry, this is the only patch, please ignore [01/14]. Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen che...@lemote.com Signed-off-by: Hongbing Hu h...@lemote.com --- arch/mips/include/asm/cpu-features.h |3 +++ .../asm/mach-loongson/cpu-feature-overrides.h |1 + arch/mips/mm/page.c| 10 ++ arch/mips/mm/tlbex.c | 10 -- 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index c507b93..1204408 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -110,6 +110,9 @@ #ifndef cpu_has_pindexed_dcache #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags MIPS_CACHE_PINDEX) #endif +#ifndef cpu_has_local_ebase +#define cpu_has_local_ebase 1 +#endif /* * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 1a05d85..8eec8e2 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -57,5 +57,6 @@ #define cpu_has_vint 0 #define cpu_has_vtag_icache 0 #define cpu_has_watch1 +#define cpu_has_local_ebase 0 #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index 8e666c5..6a39c01 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c @@ -247,6 +247,11 @@ void __cpuinit build_clear_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(run_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); @@ -389,6 +394,11 @@ void __cpuinit build_copy_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(run_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 1c8ac49..4a8b294 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -2161,8 +2161,11 @@ void __cpuinit build_tlb_refill_handler(void) case CPU_TX3922: case CPU_TX3927: #ifndef CONFIG_MIPS_PGD_C0_CONTEXT - build_r3000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); if (!run_once) { + if (!cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); build_r3000_tlb_load_handler(); build_r3000_tlb_store_handler(); build_r3000_tlb_modify_handler(); @@ -2191,9 +2194,12 @@ void __cpuinit build_tlb_refill_handler(void) build_r4000_tlb_load_handler(); build_r4000_tlb_store_handler(); build_r4000_tlb_modify_handler(); + if (!cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); run_once++; } - build_r4000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); } } -- 1.7.7.3 -- 江苏中科梦兰电子科技有限公司 软件部 陈华才 E-mail: che...@lemote.com Web: http://www.lemote.com/ Add: 江苏省常熟市虞山镇梦兰工业园 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH V2 01/14] MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
I'm sorry, this is the only patch, please ignore [01/14]. On Tue, Mar 5, 2013 at 12:37 PM, Huacai Chen che...@lemote.com wrote: Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen che...@lemote.com Signed-off-by: Hongbing Hu h...@lemote.com --- arch/mips/include/asm/cpu-features.h |3 +++ .../asm/mach-loongson/cpu-feature-overrides.h |1 + arch/mips/mm/page.c| 10 ++ arch/mips/mm/tlbex.c | 10 -- 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index c507b93..1204408 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -110,6 +110,9 @@ #ifndef cpu_has_pindexed_dcache #define cpu_has_pindexed_dcache(cpu_data[0].dcache.flags MIPS_CACHE_PINDEX) #endif +#ifndef cpu_has_local_ebase +#define cpu_has_local_ebase1 +#endif /* * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 1a05d85..8eec8e2 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -57,5 +57,6 @@ #define cpu_has_vint 0 #define cpu_has_vtag_icache0 #define cpu_has_watch 1 +#define cpu_has_local_ebase0 #endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c index 8e666c5..6a39c01 100644 --- a/arch/mips/mm/page.c +++ b/arch/mips/mm/page.c @@ -247,6 +247,11 @@ void __cpuinit build_clear_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(run_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); @@ -389,6 +394,11 @@ void __cpuinit build_copy_page(void) struct uasm_label *l = labels; struct uasm_reloc *r = relocs; int i; + static atomic_t run_once = ATOMIC_INIT(0); + + if (atomic_xchg(run_once, 1)) { + return; + } memset(labels, 0, sizeof(labels)); memset(relocs, 0, sizeof(relocs)); diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 1c8ac49..4a8b294 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -2161,8 +2161,11 @@ void __cpuinit build_tlb_refill_handler(void) case CPU_TX3922: case CPU_TX3927: #ifndef CONFIG_MIPS_PGD_C0_CONTEXT - build_r3000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); if (!run_once) { + if (!cpu_has_local_ebase) + build_r3000_tlb_refill_handler(); build_r3000_tlb_load_handler(); build_r3000_tlb_store_handler(); build_r3000_tlb_modify_handler(); @@ -2191,9 +2194,12 @@ void __cpuinit build_tlb_refill_handler(void) build_r4000_tlb_load_handler(); build_r4000_tlb_store_handler(); build_r4000_tlb_modify_handler(); + if (!cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); run_once++; } - build_r4000_tlb_refill_handler(); + if (cpu_has_local_ebase) + build_r4000_tlb_refill_handler(); } } -- 1.7.7.3 -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/