Re: [PATCH again 2] [libata] libata driver for bf548 on chip ATAPI controller.

2007-08-13 Thread Mike Frysinger
On 8/13/07, Sonic Zhang <[EMAIL PROTECTED]> wrote:
> Sorry, word wrap in my last email. So, send again.

i think this too got word wrapped ... pasting into gmail will word
wrap things (even though it looks like it wont in the edit window), so
you'll probably have to send the patch "from" your gmail.com address
using the git commandline ...
-mike
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[PATCH again 2] [libata] libata driver for bf548 on chip ATAPI controller.

2007-08-13 Thread Sonic Zhang
Sorry, word wrap in my last email. So, send again.

This driver is for bf548 on chip ATAPI controller. 
Both PIO 4 and UDMA5 mode are enabled.


Signed-off-by: Sonic Zhang <[EMAIL PROTECTED]>
---
 drivers/ata/Kconfig  |   28 +
 drivers/ata/Makefile |1 +
 drivers/ata/pata_bf54x.c | 1585
++
 3 files changed, 1614 insertions(+), 0 deletions(-)
 create mode 100644 drivers/ata/pata_bf54x.c

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index b4a8d60..e679f04 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -583,4 +583,32 @@ config PATA_SCC
 
  If unsure, say N.
 
+config PATA_BF54X
+   tristate "Blackfin 54x ATAPI support"
+   depends on BF542 || BF548 || BF549
+   help
+ This option enables support for the built-in ATAPI controller
on
+ Blackfin 54x family chips.
+
+ If unsure, say N.
+
+choice
+   prompt "Blackfin 54x ATAPI mode"
+   depends on PATA_BF54X
+   default PATA_BF54X_DMA
+   help
+ This option selects bf54x ATAPI controller working mode.
+
+config PATA_BF54X_PIO
+   bool "PIO mode"
+   help
+ Blackfin ATAPI controller works under PIO mode.
+
+config PATA_BF54X_DMA
+   bool "DMA mode"
+   help
+ Blackfin ATAPI controller works under DMA mode.
+
+endchoice
+
 endif # ATA
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 8149c68..c2ecba5 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_PATA_SIS)+= pata_sis.o
 obj-$(CONFIG_PATA_TRIFLEX) += pata_triflex.o
 obj-$(CONFIG_PATA_IXP4XX_CF)   += pata_ixp4xx_cf.o
 obj-$(CONFIG_PATA_SCC) += pata_scc.o
+obj-$(CONFIG_PATA_BF54X)   += pata_bf54x.o
 obj-$(CONFIG_PATA_PLATFORM)+= pata_platform.o
 obj-$(CONFIG_PATA_ICSIDE)  += pata_icside.o
 # Should be last but one libata driver
diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
new file mode 100644
index 000..e1236ea
--- /dev/null
+++ b/drivers/ata/pata_bf54x.c
@@ -0,0 +1,1585 @@
+/*
+ * File: drivers/ata/pata_bf54x.c
+ * Author:   Sonic Zhang <[EMAIL PROTECTED]>
+ *
+ * Created:
+ * Description:  ATAPI Driver for blackfin 54x
+ *
+ * Modified:
+ *   Copyright 2007 Analog Devices Inc.
+ *
+ * Bugs: Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRV_NAME   "bf54x-atapi"
+#define DRV_VERSION"0.6"
+
+#define ATA_REG_CTRL   0x0E
+#define ATA_REG_ALTSTATUS  ATA_REG_CTRL
+
+#define ATAPI_OFFSET_CONTROL   0x00
+#define ATAPI_OFFSET_STATUS0x04
+#define ATAPI_OFFSET_DEV_ADDR  0x08
+#define ATAPI_OFFSET_DEV_TXBUF 0x0c
+#define ATAPI_OFFSET_DEV_RXBUF 0x10
+#define ATAPI_OFFSET_INT_MASK  0x14
+#define ATAPI_OFFSET_INT_STATUS0x18
+#define ATAPI_OFFSET_XFER_LEN  0x1c
+#define ATAPI_OFFSET_LINE_STATUS   0x20
+#define ATAPI_OFFSET_SM_STATE  0x24
+#define ATAPI_OFFSET_TERMINATE 0x28
+#define ATAPI_OFFSET_PIO_TFRCNT0x2c
+#define ATAPI_OFFSET_DMA_TFRCNT0x30
+#define ATAPI_OFFSET_UMAIN_TFRCNT  0x34
+#define ATAPI_OFFSET_UDMAOUT_TFRCNT0x38
+#define ATAPI_OFFSET_REG_TIM_0 0x40
+#define ATAPI_OFFSET_PIO_TIM_0 0x44
+#define ATAPI_OFFSET_PIO_TIM_1 0x48
+#define ATAPI_OFFSET_MULTI_TIM_0   0x50
+#define ATAPI_OFFSET_MULTI_TIM_1   0x54
+#define ATAPI_OFFSET_MULTI_TIM_2   0x58
+#define ATAPI_OFFSET_ULTRA_TIM_0   0x60
+#define ATAPI_OFFSET_ULTRA_TIM_1   0x64
+#define ATAPI_OFFSET_ULTRA_TIM_2   0x68
+#define ATAPI_OFFSET_ULTRA_TIM_3   0x6c
+
+
+#define ATAPI_GET_CONTROL(base)\
+   bfin_read16(base + ATAPI_OFFSET_CONTROL)
+#define ATAPI_SET_CONTROL(base, val)\
+   bfin_write16(base + ATAPI_OFFSET_CONTROL, val)
+#define ATAPI_GET_STATUS(base)\
+   bfin_read16(base + ATAPI_OFFSET_STATUS)
+#define ATAPI_GET_DEV_ADDR(base)\
+   bfin_read16(base + ATAPI_OFFSET_DEV_ADDR)
+#define ATAPI_SET_DEV_ADDR(b