[PATCH linux v8 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2017-02-14 Thread Eddie James
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing
that data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  42 +
 MAINTAINERS|   7 +
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  13 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 440 +
 drivers/hwmon/occ/occ.h|  77 
 drivers/hwmon/occ/scom.h   |  42 +
 9 files changed, 625 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..d1c863b
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,42 @@
+=
+Kernel driver occ
+=
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Please note that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f10c28..e765b0a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9128,6 +9128,13 @@ T:   git git://linuxtv.org/media_tree.git
 S: Maintained
 F: drivers/media/i2c/ov7670.c
 
+ON-CHIP CONTROLLER HWMON POWER8/POWER9 DRIVER
+M: Eddie James 
+L: open...@lists.ozlabs.org
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
 ONENAND FLASH DRIVER
 M: Kyungmin Park 
 L: linux-...@lists.infradead.org
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..2b7edbb 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_IBM_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..61be588
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,13 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_IBM_OCC
+   bool "IBM On-Chip Controller"
+   help
+ If you say yes here you get support to monitor IBM Power CPU
+ sensors via the On-Chip Controller (OCC), from a service
+ processor.
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..3ed79a5
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o
diff --git 

[PATCH linux v8 1/6] hwmon: Add core On-Chip Controller support for POWER CPUs

2017-02-14 Thread Eddie James
From: "Edward A. James" 

Add core support for polling the OCC for it's sensor data and parsing
that data into sensor-specific information.

Signed-off-by: Edward A. James 
Signed-off-by: Andrew Jeffery 
---
 Documentation/hwmon/occ|  42 +
 MAINTAINERS|   7 +
 drivers/hwmon/Kconfig  |   2 +
 drivers/hwmon/Makefile |   1 +
 drivers/hwmon/occ/Kconfig  |  13 ++
 drivers/hwmon/occ/Makefile |   1 +
 drivers/hwmon/occ/occ.c| 440 +
 drivers/hwmon/occ/occ.h|  77 
 drivers/hwmon/occ/scom.h   |  42 +
 9 files changed, 625 insertions(+)
 create mode 100644 Documentation/hwmon/occ
 create mode 100644 drivers/hwmon/occ/Kconfig
 create mode 100644 drivers/hwmon/occ/Makefile
 create mode 100644 drivers/hwmon/occ/occ.c
 create mode 100644 drivers/hwmon/occ/occ.h
 create mode 100644 drivers/hwmon/occ/scom.h

diff --git a/Documentation/hwmon/occ b/Documentation/hwmon/occ
new file mode 100644
index 000..d1c863b
--- /dev/null
+++ b/Documentation/hwmon/occ
@@ -0,0 +1,42 @@
+=
+Kernel driver occ
+=
+
+Supported chips:
+ * POWER8
+ * POWER9
+
+Please note that the driver does not run on these processors. Instead, the
+driver runs on a connected service processor, such as an AST2400. (see the
+BMC - Host Communications section).
+
+Author: Eddie James 
+
+Description
+---
+
+This driver implements support for the OCC (On-Chip Controller) on the IBM
+POWER8 and POWER9 processors, from a BMC (Baseboard Management Controller). The
+OCC is an embedded processor that provides real time power and thermal
+monitoring.
+
+This driver provides an interface on a BMC to poll OCC sensor data, set user
+power caps, and perform some basic OCC error handling.
+
+Currently, all versions of the OCC support four types of sensor data: power,
+temperature, frequency, and "caps," which indicate limits and thresholds used
+internally on the OCC.
+
+BMC - Host Communications
+-
+
+For the POWER8 application, the BMC can communicate with the P8 over I2C bus.
+However, to access the OCC register space, any data transfer must use a SCOM
+operation. SCOM is a procedure to initiate a data transfer, typically of 8
+bytes. SCOMs consist of writing a 32-bit command register and then
+reading/writing two 32-bit data registers. This driver implements these
+SCOM operations over I2C bus in order to communicate with the OCC.
+
+For the POWER9 application, the BMC can communicate with the P9 over FSI bus
+and SBE engine. Once again, SCOM operations are required. This driver will
+implement SCOM ops over FSI/SBE. This will require the FSI driver.
diff --git a/MAINTAINERS b/MAINTAINERS
index 5f10c28..e765b0a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9128,6 +9128,13 @@ T:   git git://linuxtv.org/media_tree.git
 S: Maintained
 F: drivers/media/i2c/ov7670.c
 
+ON-CHIP CONTROLLER HWMON POWER8/POWER9 DRIVER
+M: Eddie James 
+L: open...@lists.ozlabs.org
+S: Maintained
+F: Documentation/hwmon/occ
+F: drivers/hwmon/occ/
+
 ONENAND FLASH DRIVER
 M: Kyungmin Park 
 L: linux-...@lists.infradead.org
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 190d270..e80ca81 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -1240,6 +1240,8 @@ config SENSORS_NSA320
  This driver can also be built as a module. If so, the module
  will be called nsa320-hwmon.
 
+source drivers/hwmon/occ/Kconfig
+
 config SENSORS_PCF8591
tristate "Philips PCF8591 ADC/DAC"
depends on I2C
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index d2cb7e8..2b7edbb 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -169,6 +169,7 @@ obj-$(CONFIG_SENSORS_WM831X)+= wm831x-hwmon.o
 obj-$(CONFIG_SENSORS_WM8350)   += wm8350-hwmon.o
 obj-$(CONFIG_SENSORS_XGENE)+= xgene-hwmon.o
 
+obj-$(CONFIG_SENSORS_IBM_OCC)  += occ/
 obj-$(CONFIG_PMBUS)+= pmbus/
 
 ccflags-$(CONFIG_HWMON_DEBUG_CHIP) := -DDEBUG
diff --git a/drivers/hwmon/occ/Kconfig b/drivers/hwmon/occ/Kconfig
new file mode 100644
index 000..61be588
--- /dev/null
+++ b/drivers/hwmon/occ/Kconfig
@@ -0,0 +1,13 @@
+#
+# On Chip Controller configuration
+#
+
+menuconfig SENSORS_IBM_OCC
+   bool "IBM On-Chip Controller"
+   help
+ If you say yes here you get support to monitor IBM Power CPU
+ sensors via the On-Chip Controller (OCC), from a service
+ processor.
+
+ Generally this is used by management controllers such as a BMC
+ on an OpenPower system.
diff --git a/drivers/hwmon/occ/Makefile b/drivers/hwmon/occ/Makefile
new file mode 100644
index 000..3ed79a5
--- /dev/null
+++ b/drivers/hwmon/occ/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SENSORS_IBM_OCC) += occ.o
diff --git a/drivers/hwmon/occ/occ.c b/drivers/hwmon/occ/occ.c
new file mode 100644
index 000..afc21f8
--- /dev/null
+++