Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
On Tue, 31 Jul 2018 11:29:24 +0800 Jisheng Zhang wrote: > Hi Robin, > > On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote: > > > Hi Jisheng, > > > > On 26/07/18 08:14, Jisheng Zhang wrote: > > > When using DMA, if the DMA addr spans 128MB boundary, we have to split > > > the DMA transfer into two so that each one doesn't exceed the boundary. > > > > > > > Out of interest, is the driver already setting its segment boundary mask > > appropriately? This sounds like the exact kind of hardware restriction > > that dma_parms is intended to describe, which scatterlist-generating > > code is *supposed* to already respect. > > Thanks for the nice input. It may provide an elegant solution for this > limitation. > > To simplify the situation, let's assume no iommu, only swiotlb. And > the DDR is less than 4GB so swiotlb on arm64 doesn't init. > > There's no dma range limitation with the HW, the only limitation > is boundary, while dma_capable() doesn't check the boundary mask, so if > we taking this solution, we need to teach dma_capable() about the boundary > mask, I'm not sure whether this is acceptable. > > Another problem is swiotlb initialization. When to init swiotlb, we dunno > there's such boundary limitation HW. Is there any elegant solution for > this problem? > One more problem is: swiotlb isn't available on all platforms, e.g arm? How to solve this SDHCI HW's limitation on arm soc w/o iommu? Thanks
Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
Hi Robin,
On Mon, 30 Jul 2018 12:06:08 +0100 Robin Murphy wrote:
> Hi Jisheng,
>
> On 26/07/18 08:14, Jisheng Zhang wrote:
> > When using DMA, if the DMA addr spans 128MB boundary, we have to split
> > the DMA transfer into two so that each one doesn't exceed the boundary.
>
> Out of interest, is the driver already setting its segment boundary mask
> appropriately? This sounds like the exact kind of hardware restriction
> that dma_parms is intended to describe, which scatterlist-generating
> code is *supposed* to already respect.
Thanks for the nice input. It may provide an elegant solution for this
limitation.
To simplify the situation, let's assume no iommu, only swiotlb. And
the DDR is less than 4GB so swiotlb on arm64 doesn't init.
There's no dma range limitation with the HW, the only limitation
is boundary, while dma_capable() doesn't check the boundary mask, so if
we taking this solution, we need to teach dma_capable() about the boundary
mask, I'm not sure whether this is acceptable.
Another problem is swiotlb initialization. When to init swiotlb, we dunno
there's such boundary limitation HW. Is there any elegant solution for
this problem?
Thanks
>
> Robin.
>
> > Signed-off-by: Jisheng Zhang
> > ---
> > drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +
> > 1 file changed, 42 insertions(+)
> >
> > diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > index 1b7cd144fb01..7e189514bc83 100644
> > --- a/drivers/mmc/host/sdhci-of-dwcmshc.c
> > +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
> > @@ -8,21 +8,51 @@
> >*/
> >
> > #include
> > +#include
> > #include
> > #include
> >
> > #include "sdhci-pltfm.h"
> >
> > +#define BOUNDARY_OK(addr, len) \
> > + ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
> > +
> > struct dwcmshc_priv {
> > struct clk *bus_clk;
> > };
> >
> > +/*
> > + * if DMA addr spans 128MB boundary, we split the DMA transfer into two
> > + * so that the DMA transfer doesn't exceed the boundary.
> > + */
> > +static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
> > + void *desc, dma_addr_t addr,
> > + int len, unsigned int cmd)
> > +{
> > + int tmplen, offset;
> > +
> > + if (BOUNDARY_OK(addr, len) || !len)
> > + return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > + offset = addr & (SZ_128M - 1);
> > + tmplen = SZ_128M - offset;
> > + _sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
> > +
> > + addr += tmplen;
> > + len -= tmplen;
> > + desc += host->desc_sz;
> > + _sdhci_adma_write_desc(host, desc, addr, len, cmd);
> > +
> > + return host->desc_sz * 2;
> > +}
> > +
> > static const struct sdhci_ops sdhci_dwcmshc_ops = {
> > .set_clock = sdhci_set_clock,
> > .set_bus_width = sdhci_set_bus_width,
> > .set_uhs_signaling = sdhci_set_uhs_signaling,
> > .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> > .reset = sdhci_reset,
> > + .adma_write_desc= dwcmshc_adma_write_desc,
> > };
> >
> > static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
> > @@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
> > struct sdhci_host *host;
> > struct dwcmshc_priv *priv;
> > int err;
> > + u32 extra;
> >
> > host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
> > sizeof(struct dwcmshc_priv));
> > if (IS_ERR(host))
> > return PTR_ERR(host);
> >
> > + /*
> > +* The DMA descriptor table number is calculated as the maximum
> > +* number of segments times 2, to allow for an alignment
> > +* descriptor for each segment, plus 1 for a nop end descriptor,
> > +* plus extra number for cross 128M boundary handling.
> > +*/
> > + extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
> > + if (extra > SDHCI_MAX_SEGS)
> > + extra = SDHCI_MAX_SEGS;
> > + host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
> > +
> > pltfm_host = sdhci_priv(host);
> > priv = sdhci_pltfm_priv(pltfm_host);
> >
> >
Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
Hi Jisheng,
On 26/07/18 08:14, Jisheng Zhang wrote:
When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.
Out of interest, is the driver already setting its segment boundary mask
appropriately? This sounds like the exact kind of hardware restriction
that dma_parms is intended to describe, which scatterlist-generating
code is *supposed* to already respect.
Robin.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +
1 file changed, 42 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 1b7cd144fb01..7e189514bc83 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -8,21 +8,51 @@
*/
#include
+#include
#include
#include
#include "sdhci-pltfm.h"
+#define BOUNDARY_OK(addr, len) \
+ ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
+
struct dwcmshc_priv {
struct clk *bus_clk;
};
+/*
+ * if DMA addr spans 128MB boundary, we split the DMA transfer into two
+ * so that the DMA transfer doesn't exceed the boundary.
+ */
+static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
+ void *desc, dma_addr_t addr,
+ int len, unsigned int cmd)
+{
+ int tmplen, offset;
+
+ if (BOUNDARY_OK(addr, len) || !len)
+ return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+ offset = addr & (SZ_128M - 1);
+ tmplen = SZ_128M - offset;
+ _sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
+
+ addr += tmplen;
+ len -= tmplen;
+ desc += host->desc_sz;
+ _sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+ return host->desc_sz * 2;
+}
+
static const struct sdhci_ops sdhci_dwcmshc_ops = {
.set_clock = sdhci_set_clock,
.set_bus_width = sdhci_set_bus_width,
.set_uhs_signaling = sdhci_set_uhs_signaling,
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
.reset = sdhci_reset,
+ .adma_write_desc= dwcmshc_adma_write_desc,
};
static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
@@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
struct sdhci_host *host;
struct dwcmshc_priv *priv;
int err;
+ u32 extra;
host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
sizeof(struct dwcmshc_priv));
if (IS_ERR(host))
return PTR_ERR(host);
+ /*
+* The DMA descriptor table number is calculated as the maximum
+* number of segments times 2, to allow for an alignment
+* descriptor for each segment, plus 1 for a nop end descriptor,
+* plus extra number for cross 128M boundary handling.
+*/
+ extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
+ if (extra > SDHCI_MAX_SEGS)
+ extra = SDHCI_MAX_SEGS;
+ host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
+
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
Hi Jisheng, I love your patch! Yet something to improve: [auto build test ERROR on ulf.hansson-mmc/next] [also build test ERROR on next-20180727] [cannot apply to v4.18-rc6] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Jisheng-Zhang/solve-SDHCI-DWC-MSHC-128MB-DMA-boundary-limitation/20180728-234650 base: git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next config: mips-allmodconfig (attached as .config) compiler: mips-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=mips All errors (new ones prefixed by >>): drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_adma_write_desc': >> drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: error: 'SZ_128M' undeclared >> (first use in this function); did you mean 'PM_128K'? ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1))) ^ drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK' if (BOUNDARY_OK(addr, len) || !len) ^~~ drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: note: each undeclared identifier is reported only once for each function it appears in ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1))) ^ drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro 'BOUNDARY_OK' if (BOUNDARY_OK(addr, len) || !len) ^~~ In file included from include/linux/cache.h:5:0, from arch/mips/include/asm/cpu-info.h:15, from arch/mips/include/asm/cpu-features.h:13, from arch/mips/include/asm/bitops.h:21, from include/linux/bitops.h:38, from include/linux/kernel.h:11, from include/linux/clk.h:16, from drivers/mmc/host/sdhci-of-dwcmshc.c:10: drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_probe': drivers/mmc/host/sdhci-of-dwcmshc.c:82:39: error: 'SZ_128M' undeclared (first use in this function); did you mean 'PM_128K'? extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE); ^ include/uapi/linux/kernel.h:13:46: note: in definition of macro '__KERNEL_DIV_ROUND_UP' #define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) ^ drivers/mmc/host/sdhci-of-dwcmshc.c:82:10: note: in expansion of macro 'DIV_ROUND_UP' extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE); ^~~~ vim +18 drivers/mmc/host/sdhci-of-dwcmshc.c 16 17 #define BOUNDARY_OK(addr, len) \ > 18 ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1))) 19 --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: application/gzip
Re: [PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
Hi Jisheng,
I love your patch! Yet something to improve:
[auto build test ERROR on ulf.hansson-mmc/next]
[also build test ERROR on next-20180727]
[cannot apply to v4.18-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Jisheng-Zhang/solve-SDHCI-DWC-MSHC-128MB-DMA-boundary-limitation/20180728-234650
base: git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All error/warnings (new ones prefixed by >>):
drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_adma_write_desc':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: error: 'SZ_128M' undeclared
>> (first use in this function)
((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro
>> 'BOUNDARY_OK'
if (BOUNDARY_OK(addr, len) || !len)
^~~
drivers/mmc/host/sdhci-of-dwcmshc.c:18:12: note: each undeclared identifier
is reported only once for each function it appears in
((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:34:6: note: in expansion of macro
>> 'BOUNDARY_OK'
if (BOUNDARY_OK(addr, len) || !len)
^~~
In file included from include/linux/cache.h:5:0,
from include/linux/printk.h:9,
from include/linux/kernel.h:14,
from include/linux/clk.h:16,
from drivers/mmc/host/sdhci-of-dwcmshc.c:10:
drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_probe':
drivers/mmc/host/sdhci-of-dwcmshc.c:82:39: error: 'SZ_128M' undeclared
(first use in this function)
extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
^
include/uapi/linux/kernel.h:13:46: note: in definition of macro
'__KERNEL_DIV_ROUND_UP'
#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
^
>> drivers/mmc/host/sdhci-of-dwcmshc.c:82:10: note: in expansion of macro
>> 'DIV_ROUND_UP'
extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
^~~~
vim +/SZ_128M +18 drivers/mmc/host/sdhci-of-dwcmshc.c
> 10 #include
11 #include
12 #include
13 #include
14
15 #include "sdhci-pltfm.h"
16
17 #define BOUNDARY_OK(addr, len) \
> 18 ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
19
20 struct dwcmshc_priv {
21 struct clk *bus_clk;
22 };
23
24 /*
25 * if DMA addr spans 128MB boundary, we split the DMA transfer into two
26 * so that the DMA transfer doesn't exceed the boundary.
27 */
28 static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
29 void *desc, dma_addr_t addr,
30 int len, unsigned int cmd)
31 {
32 int tmplen, offset;
33
> 34 if (BOUNDARY_OK(addr, len) || !len)
35 return _sdhci_adma_write_desc(host, desc, addr, len,
cmd);
36
37 offset = addr & (SZ_128M - 1);
38 tmplen = SZ_128M - offset;
39 _sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
40
41 addr += tmplen;
42 len -= tmplen;
43 desc += host->desc_sz;
44 _sdhci_adma_write_desc(host, desc, addr, len, cmd);
45
46 return host->desc_sz * 2;
47 }
48
49 static const struct sdhci_ops sdhci_dwcmshc_ops = {
50 .set_clock = sdhci_set_clock,
51 .set_bus_width = sdhci_set_bus_width,
52 .set_uhs_signaling = sdhci_set_uhs_signaling,
53 .get_max_clock = sdhci_pltfm_clk_get_max_clock,
54 .reset = sdhci_reset,
55 .adma_write_desc= dwcmshc_adma_write_desc,
56 };
57
58 static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
59 .ops = &sdhci_dwcmshc_ops,
60 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
61 };
62
63 static int dwcmshc_probe(struct platform_device *pdev)
64 {
65 struct sdhci_pltfm_host *pltfm_host;
66 struct sdhci_host *host;
67 struct dwcmshc_priv *priv;
68 int err;
69 u32 extra;
70
71 host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
72 sizeof(struct dwcmshc_priv));
73 if (IS_ERR(host))
74 return PTR_ER
[PATCH mmc-next v2 3/3] mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation
When using DMA, if the DMA addr spans 128MB boundary, we have to split
the DMA transfer into two so that each one doesn't exceed the boundary.
Signed-off-by: Jisheng Zhang
---
drivers/mmc/host/sdhci-of-dwcmshc.c | 42 +
1 file changed, 42 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c
b/drivers/mmc/host/sdhci-of-dwcmshc.c
index 1b7cd144fb01..7e189514bc83 100644
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -8,21 +8,51 @@
*/
#include
+#include
#include
#include
#include "sdhci-pltfm.h"
+#define BOUNDARY_OK(addr, len) \
+ ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
+
struct dwcmshc_priv {
struct clk *bus_clk;
};
+/*
+ * if DMA addr spans 128MB boundary, we split the DMA transfer into two
+ * so that the DMA transfer doesn't exceed the boundary.
+ */
+static unsigned int dwcmshc_adma_write_desc(struct sdhci_host *host,
+ void *desc, dma_addr_t addr,
+ int len, unsigned int cmd)
+{
+ int tmplen, offset;
+
+ if (BOUNDARY_OK(addr, len) || !len)
+ return _sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+ offset = addr & (SZ_128M - 1);
+ tmplen = SZ_128M - offset;
+ _sdhci_adma_write_desc(host, desc, addr, tmplen, cmd);
+
+ addr += tmplen;
+ len -= tmplen;
+ desc += host->desc_sz;
+ _sdhci_adma_write_desc(host, desc, addr, len, cmd);
+
+ return host->desc_sz * 2;
+}
+
static const struct sdhci_ops sdhci_dwcmshc_ops = {
.set_clock = sdhci_set_clock,
.set_bus_width = sdhci_set_bus_width,
.set_uhs_signaling = sdhci_set_uhs_signaling,
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
.reset = sdhci_reset,
+ .adma_write_desc= dwcmshc_adma_write_desc,
};
static const struct sdhci_pltfm_data sdhci_dwcmshc_pdata = {
@@ -36,12 +66,24 @@ static int dwcmshc_probe(struct platform_device *pdev)
struct sdhci_host *host;
struct dwcmshc_priv *priv;
int err;
+ u32 extra;
host = sdhci_pltfm_init(pdev, &sdhci_dwcmshc_pdata,
sizeof(struct dwcmshc_priv));
if (IS_ERR(host))
return PTR_ERR(host);
+ /*
+* The DMA descriptor table number is calculated as the maximum
+* number of segments times 2, to allow for an alignment
+* descriptor for each segment, plus 1 for a nop end descriptor,
+* plus extra number for cross 128M boundary handling.
+*/
+ extra = DIV_ROUND_UP(totalram_pages, SZ_128M / PAGE_SIZE);
+ if (extra > SDHCI_MAX_SEGS)
+ extra = SDHCI_MAX_SEGS;
+ host->adma_table_num = SDHCI_MAX_SEGS * 2 + 1 + extra;
+
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
--
2.18.0
