Re: [PATCH net-next 5/7] net: hns3: add more info to hns3_dbg_bd_info()

2020-11-27 Thread tanhuazhong




On 2020/11/28 4:53, Jakub Kicinski wrote:

On Fri, 27 Nov 2020 16:47:20 +0800 Huazhong Tan wrote:

Since TX hardware checksum and RX completion checksum have been
supported now, so add related information in hns3_dbg_bd_info().

Signed-off-by: Huazhong Tan 


drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:266:22: warning: incorrect 
type in assignment (different base types)
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:266:22:expected 
restricted __sum16 [usertype] csum
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:266:22:got unsigned int
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:268:22: warning: invalid 
assignment: |=
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:268:22:left side has 
type restricted __sum16
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:268:22:right side has 
type unsigned int



Will fix it, thanks.


.





Re: [PATCH net-next 5/7] net: hns3: add more info to hns3_dbg_bd_info()

2020-11-27 Thread Jakub Kicinski
On Fri, 27 Nov 2020 16:47:20 +0800 Huazhong Tan wrote:
> Since TX hardware checksum and RX completion checksum have been
> supported now, so add related information in hns3_dbg_bd_info().
> 
> Signed-off-by: Huazhong Tan 

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:266:22: warning: incorrect 
type in assignment (different base types)
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:266:22:expected 
restricted __sum16 [usertype] csum
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:266:22:got unsigned int
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:268:22: warning: invalid 
assignment: |=
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:268:22:left side has 
type restricted __sum16
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c:268:22:right side has 
type unsigned int


[PATCH net-next 5/7] net: hns3: add more info to hns3_dbg_bd_info()

2020-11-27 Thread Huazhong Tan
Since TX hardware checksum and RX completion checksum have been
supported now, so add related information in hns3_dbg_bd_info().

Signed-off-by: Huazhong Tan 
---
 drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c | 50 +-
 1 file changed, 40 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c 
b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
index cb0cc6d..3b27cab 100644
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c
@@ -179,6 +179,7 @@ static int hns3_dbg_bd_info(struct hnae3_handle *h, const 
char *cmd_buf)
u32 q_num, value;
dma_addr_t addr;
u16 mss_hw_csum;
+   u32 l234info;
int cnt;
 
cnt = sscanf(_buf[8], "%u %u", _num, _index);
@@ -213,17 +214,35 @@ static int hns3_dbg_bd_info(struct hnae3_handle *h, const 
char *cmd_buf)
dev_info(dev, "(TX)vlan_tag: %u\n", le16_to_cpu(tx_desc->tx.vlan_tag));
dev_info(dev, "(TX)send_size: %u\n",
 le16_to_cpu(tx_desc->tx.send_size));
-   dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
-   dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
-   dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
-   dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
+
+   if (mss_hw_csum & BIT(HNS3_TXD_HW_CS_B)) {
+   u32 offset = le32_to_cpu(tx_desc->tx.ol_type_vlan_len_msec);
+   u32 start = le32_to_cpu(tx_desc->tx.type_cs_vlan_tso_len);
+
+   dev_info(dev, "(TX)csum start: %u\n",
+hnae3_get_field(start,
+HNS3_TXD_CSUM_START_M,
+HNS3_TXD_CSUM_START_S));
+   dev_info(dev, "(TX)csum offset: %u\n",
+hnae3_get_field(offset,
+HNS3_TXD_CSUM_OFFSET_M,
+HNS3_TXD_CSUM_OFFSET_S));
+   } else {
+   dev_info(dev, "(TX)vlan_tso: %u\n",
+tx_desc->tx.type_cs_vlan_tso);
+   dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
+   dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
+   dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
+   dev_info(dev, "(TX)vlan_msec: %u\n",
+tx_desc->tx.ol_type_vlan_msec);
+   dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
+   dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
+   dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
+   }
+
dev_info(dev, "(TX)vlan_tag: %u\n",
 le16_to_cpu(tx_desc->tx.outer_vlan_tag));
dev_info(dev, "(TX)tv: %u\n", le16_to_cpu(tx_desc->tx.tv));
-   dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
-   dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
-   dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
-   dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
dev_info(dev, "(TX)paylen_ol4cs: %u\n",
 le32_to_cpu(tx_desc->tx.paylen_ol4cs));
dev_info(dev, "(TX)vld_ra_ri: %u\n",
@@ -236,10 +255,21 @@ static int hns3_dbg_bd_info(struct hnae3_handle *h, const 
char *cmd_buf)
rx_desc = >desc[rx_index];
 
addr = le64_to_cpu(rx_desc->addr);
+   l234info = le32_to_cpu(rx_desc->rx.l234_info);
dev_info(dev, "RX Queue Num: %u, BD Index: %u\n", q_num, rx_index);
dev_info(dev, "(RX)addr: %pad\n", );
-   dev_info(dev, "(RX)l234_info: %u\n",
-le32_to_cpu(rx_desc->rx.l234_info));
+   dev_info(dev, "(RX)l234_info: %u\n", l234info);
+
+   if (l234info & BIT(HNS3_RXD_L2_CSUM_B)) {
+   __sum16 csum;
+
+   csum = hnae3_get_field(l234info, HNS3_RXD_L2_CSUM_L_M,
+  HNS3_RXD_L2_CSUM_L_S);
+   csum |= hnae3_get_field(l234info, HNS3_RXD_L2_CSUM_H_M,
+   HNS3_RXD_L2_CSUM_H_S) << 8;
+   dev_info(dev, "(RX)csum: %u\n", csum);
+   }
+
dev_info(dev, "(RX)pkt_len: %u\n", le16_to_cpu(rx_desc->rx.pkt_len));
dev_info(dev, "(RX)size: %u\n", le16_to_cpu(rx_desc->rx.size));
dev_info(dev, "(RX)rss_hash: %u\n", le32_to_cpu(rx_desc->rx.rss_hash));
-- 
2.7.4