Re: [PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant
On Tue, Apr 29, 2014 at 10:19 AM, wrote: > From: Srinivas Kandagatla > > Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl > register. Bit postion datactrl[16:4] hold the true block size instead of power > of 2. > > Signed-off-by: Srinivas Kandagatla This is probably something I got wrong when I attempted to use this driver on the Dragon board. Now I see what I missed... Reviewed-by: Linus Walleij Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant
On Tue, Apr 29, 2014 at 10:19 AM, srinivas.kandaga...@linaro.org wrote: From: Srinivas Kandagatla srinivas.kandaga...@linaro.org Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl register. Bit postion datactrl[16:4] hold the true block size instead of power of 2. Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org This is probably something I got wrong when I attempted to use this driver on the Dragon board. Now I see what I missed... Reviewed-by: Linus Walleij linus.wall...@linaro.org Yours, Linus Walleij -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant
From: Srinivas Kandagatla
Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit postion datactrl[16:4] hold the true block size instead of power
of 2.
Signed-off-by: Srinivas Kandagatla
---
drivers/mmc/host/mmci.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 391e8d4..19d6b6f 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -58,6 +58,8 @@ static unsigned int fmax = 515633;
* @sdio: variant supports SDIO
* @st_clkdiv: true if using a ST-specific clock divider algorithm
* @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl
register
+ * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
+ * register
* @pwrreg_powerup: power up value for MMCIPOWER register
* @signal_direction: input/out direction of bus signals can be indicated
* @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
@@ -73,6 +75,7 @@ struct variant_data {
boolsdio;
boolst_clkdiv;
boolblksz_datactrl16;
+ boolblksz_datactrl4;
u32 pwrreg_powerup;
boolsignal_direction;
boolpwrreg_clkgate;
@@ -162,6 +165,7 @@ static struct variant_data variant_qcom = {
.fifosize = 16 * 4,
.fifohalfsize = 8 * 4,
.clkreg = MCI_CLK_ENABLE,
+ .blksz_datactrl4= true,
.datalength_bits= 24,
.blksz_datactrl4= true,
.pwrreg_powerup = MCI_PWR_UP,
@@ -760,6 +764,8 @@ static void mmci_start_data(struct mmci_host *host, struct
mmc_data *data)
if (variant->blksz_datactrl16)
datactrl = MCI_DPSM_ENABLE | (data->blksz << 16);
+ else if (variant->blksz_datactrl4)
+ datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
else
datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;
--
1.7.9.5
--
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[PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant
From: Srinivas Kandagatla srinivas.kandaga...@linaro.org
Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit postion datactrl[16:4] hold the true block size instead of power
of 2.
Signed-off-by: Srinivas Kandagatla srinivas.kandaga...@linaro.org
---
drivers/mmc/host/mmci.c |6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 391e8d4..19d6b6f 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -58,6 +58,8 @@ static unsigned int fmax = 515633;
* @sdio: variant supports SDIO
* @st_clkdiv: true if using a ST-specific clock divider algorithm
* @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl
register
+ * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
+ * register
* @pwrreg_powerup: power up value for MMCIPOWER register
* @signal_direction: input/out direction of bus signals can be indicated
* @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
@@ -73,6 +75,7 @@ struct variant_data {
boolsdio;
boolst_clkdiv;
boolblksz_datactrl16;
+ boolblksz_datactrl4;
u32 pwrreg_powerup;
boolsignal_direction;
boolpwrreg_clkgate;
@@ -162,6 +165,7 @@ static struct variant_data variant_qcom = {
.fifosize = 16 * 4,
.fifohalfsize = 8 * 4,
.clkreg = MCI_CLK_ENABLE,
+ .blksz_datactrl4= true,
.datalength_bits= 24,
.blksz_datactrl4= true,
.pwrreg_powerup = MCI_PWR_UP,
@@ -760,6 +764,8 @@ static void mmci_start_data(struct mmci_host *host, struct
mmc_data *data)
if (variant-blksz_datactrl16)
datactrl = MCI_DPSM_ENABLE | (data-blksz 16);
+ else if (variant-blksz_datactrl4)
+ datactrl = MCI_DPSM_ENABLE | (data-blksz 4);
else
datactrl = MCI_DPSM_ENABLE | blksz_bits 4;
--
1.7.9.5
--
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