Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-06 Thread Heiko Stuebner 
Hi Zain,

Am Dienstag, 3. November 2015, 13:52:05 schrieb Zain Wang:
> Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
> mode.
> The names registered are:
> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> You can alloc tags above in your case.
> 
> And other algorithms and platforms will be added later on.
> 
> Signed-off-by: Zain Wang 
> ---
>  drivers/crypto/Kconfig |  11 +
>  drivers/crypto/Makefile|   1 +
>  drivers/crypto/rockchip/Makefile   |   3 +
>  drivers/crypto/rockchip/rk3288_crypto.c| 383 
>  drivers/crypto/rockchip/rk3288_crypto.h| 290 
>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 
> +
>  6 files changed, 1189 insertions(+)
>  create mode 100644 drivers/crypto/rockchip/Makefile
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
> 
> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
> index 2569e04..d1e42cf 100644
> --- a/drivers/crypto/Kconfig
> +++ b/drivers/crypto/Kconfig
> @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
> To compile this driver as a module, choose M here: the module
> will be called sun4i-ss.
>  
> +config CRYPTO_DEV_ROCKCHIP
> + tristate "Rockchip's Cryptographic Engine driver"
> +
> + select CRYPTO_AES
> + select CRYPTO_DES
> + select CRYPTO_BLKCIPHER
> +
> + help
> +   This driver interfaces with the hardware crypto accelerator.
> +   Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
> +
>  endif # CRYPTO_HW
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index c3ced6f..713de9d 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
>  obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
>  obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>  obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
> diff --git a/drivers/crypto/rockchip/Makefile 
> b/drivers/crypto/rockchip/Makefile
> new file mode 100644
> index 000..7051c6c
> --- /dev/null
> +++ b/drivers/crypto/rockchip/Makefile
> @@ -0,0 +1,3 @@
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
> +rk_crypto-objs := rk3288_crypto.o \
> +   rk3288_crypto_ablkcipher.o \
> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
> b/drivers/crypto/rockchip/rk3288_crypto.c
> new file mode 100644
> index 000..02830f2
> --- /dev/null
> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
> @@ -0,0 +1,383 @@

[...]


> +static int rk_crypto_probe(struct platform_device *pdev)
> +{
> + int err = 0;
> + struct resource *res;
> + struct device *dev = >dev;
> + struct crypto_info_t *crypto_info;
> +

rk3288 chromebooks use the crypto-engine to validate the boot images and
seem to leave it in a half-on state. This results in an irq pending
during probe and thus a null-pointer dereference in the irq-handler, as
it runs before the crypto-device is fully initialized.

resetting the crypto block, successfull fixed that issue, so I did the
following change:

---
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 121b6d5..e978fb2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -182,6 +182,8 @@
  "hclk",
  "sclk",
  "apb_pclk";
+   resets = < SRST_CRYPTO>;
+   reset-names = "crypto";
status = "okay";
};
 
diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
b/drivers/crypto/rockchip/rk3288_crypto.c
index 02830f2..2245d3d 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct crypto_info_t *crypto_p;
 
@@ -266,6 +267,15 @@ static int rk_crypto_probe(struct platform_device *pdev)
struct resource *res;
struct device *dev = >dev;
struct crypto_info_t *crypto_info;
+   struct reset_control *rst;
+
+   /* reset the block to remove any pending actions */
+   rst = devm_reset_control_get(dev, "crypto");
+   if (!IS_ERR(rst)) {
+   reset_control_assert(rst);
+   usleep_range(10, 20);
+   reset_control_deassert(rst);
+   }
 
crypto_info = devm_kzalloc(>dev,
sizeof(*crypto_info), GFP_KERNEL);
---


> + crypto_info = devm_kzalloc(>dev,
> + sizeof(*crypto_info), GFP_KERNEL);
> + if (!crypto_info)
> + return -ENOMEM;
> +
> + spin_lock_init(_info->lock);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM,

Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-06 Thread Heiko Stuebner 
Hi Zain,

Am Dienstag, 3. November 2015, 13:52:05 schrieb Zain Wang:
> Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
> mode.
> The names registered are:
> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> You can alloc tags above in your case.
> 
> And other algorithms and platforms will be added later on.
> 
> Signed-off-by: Zain Wang 
> ---
>  drivers/crypto/Kconfig |  11 +
>  drivers/crypto/Makefile|   1 +
>  drivers/crypto/rockchip/Makefile   |   3 +
>  drivers/crypto/rockchip/rk3288_crypto.c| 383 
>  drivers/crypto/rockchip/rk3288_crypto.h| 290 
>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 
> +
>  6 files changed, 1189 insertions(+)
>  create mode 100644 drivers/crypto/rockchip/Makefile
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
> 
> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
> index 2569e04..d1e42cf 100644
> --- a/drivers/crypto/Kconfig
> +++ b/drivers/crypto/Kconfig
> @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
> To compile this driver as a module, choose M here: the module
> will be called sun4i-ss.
>  
> +config CRYPTO_DEV_ROCKCHIP
> + tristate "Rockchip's Cryptographic Engine driver"
> +
> + select CRYPTO_AES
> + select CRYPTO_DES
> + select CRYPTO_BLKCIPHER
> +
> + help
> +   This driver interfaces with the hardware crypto accelerator.
> +   Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
> +
>  endif # CRYPTO_HW
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index c3ced6f..713de9d 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
>  obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
>  obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>  obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
> diff --git a/drivers/crypto/rockchip/Makefile 
> b/drivers/crypto/rockchip/Makefile
> new file mode 100644
> index 000..7051c6c
> --- /dev/null
> +++ b/drivers/crypto/rockchip/Makefile
> @@ -0,0 +1,3 @@
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
> +rk_crypto-objs := rk3288_crypto.o \
> +   rk3288_crypto_ablkcipher.o \
> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
> b/drivers/crypto/rockchip/rk3288_crypto.c
> new file mode 100644
> index 000..02830f2
> --- /dev/null
> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
> @@ -0,0 +1,383 @@

[...]


> +static int rk_crypto_probe(struct platform_device *pdev)
> +{
> + int err = 0;
> + struct resource *res;
> + struct device *dev = >dev;
> + struct crypto_info_t *crypto_info;
> +

rk3288 chromebooks use the crypto-engine to validate the boot images and
seem to leave it in a half-on state. This results in an irq pending
during probe and thus a null-pointer dereference in the irq-handler, as
it runs before the crypto-device is fully initialized.

resetting the crypto block, successfull fixed that issue, so I did the
following change:

---
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 121b6d5..e978fb2 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -182,6 +182,8 @@
  "hclk",
  "sclk",
  "apb_pclk";
+   resets = < SRST_CRYPTO>;
+   reset-names = "crypto";
status = "okay";
};
 
diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
b/drivers/crypto/rockchip/rk3288_crypto.c
index 02830f2..2245d3d 100644
--- a/drivers/crypto/rockchip/rk3288_crypto.c
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct crypto_info_t *crypto_p;
 
@@ -266,6 +267,15 @@ static int rk_crypto_probe(struct platform_device *pdev)
struct resource *res;
struct device *dev = >dev;
struct crypto_info_t *crypto_info;
+   struct reset_control *rst;
+
+   /* reset the block to remove any pending actions */
+   rst = devm_reset_control_get(dev, "crypto");
+   if (!IS_ERR(rst)) {
+   reset_control_assert(rst);
+   usleep_range(10, 20);
+   reset_control_deassert(rst);
+   }
 
crypto_info = devm_kzalloc(>dev,
sizeof(*crypto_info), GFP_KERNEL);
---


> + crypto_info = devm_kzalloc(>dev,
> + sizeof(*crypto_info), GFP_KERNEL);
> + if (!crypto_info)
> + return -ENOMEM;
> +
> + spin_lock_init(_info->lock);
> +
> + res =

Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-03 Thread Zain 
Hi LABBE,

On 2015年11月03日 16:59, LABBE Corentin wrote:
> On Tue, Nov 03, 2015 at 01:52:05PM +0800, Zain Wang wrote:
>> Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
>> mode.
>> The names registered are:
>> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
>> You can alloc tags above in your case.
>>
>> And other algorithms and platforms will be added later on.
>>
>> Signed-off-by: Zain Wang 
>> ---
>>  drivers/crypto/Kconfig |  11 +
>>  drivers/crypto/Makefile|   1 +
>>  drivers/crypto/rockchip/Makefile   |   3 +
>>  drivers/crypto/rockchip/rk3288_crypto.c| 383 
>>  drivers/crypto/rockchip/rk3288_crypto.h| 290 
>>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 
>> +
>>  6 files changed, 1189 insertions(+)
>>  create mode 100644 drivers/crypto/rockchip/Makefile
>>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
>>
>> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
>> index 2569e04..d1e42cf 100644
>> --- a/drivers/crypto/Kconfig
>> +++ b/drivers/crypto/Kconfig
>> @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
>>To compile this driver as a module, choose M here: the module
>>will be called sun4i-ss.
>>  
>> +config CRYPTO_DEV_ROCKCHIP
>> +tristate "Rockchip's Cryptographic Engine driver"
>> +
>> +select CRYPTO_AES
>> +select CRYPTO_DES
>> +select CRYPTO_BLKCIPHER
>> +
>> +help
>> +  This driver interfaces with the hardware crypto accelerator.
>> +  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
>> +
>>  endif # CRYPTO_HW
>> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
>> index c3ced6f..713de9d 100644
>> --- a/drivers/crypto/Makefile
>> +++ b/drivers/crypto/Makefile
>> @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
>>  obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
>>  obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>>  obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
>> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
>> diff --git a/drivers/crypto/rockchip/Makefile 
>> b/drivers/crypto/rockchip/Makefile
>> new file mode 100644
>> index 000..7051c6c
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/Makefile
>> @@ -0,0 +1,3 @@
>> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
>> +rk_crypto-objs := rk3288_crypto.o \
>> +  rk3288_crypto_ablkcipher.o \
>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
>> b/drivers/crypto/rockchip/rk3288_crypto.c
>> new file mode 100644
>> index 000..02830f2
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
>> @@ -0,0 +1,383 @@
>> +/*
>> + *Crypto acceleration support for Rockchip RK3288
>> + *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + *
>> + * Author: Zain Wang 
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> + *
>> + * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
>> + */
>> +
>> +#include "rk3288_crypto.h"
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +struct crypto_info_t *crypto_p;
>> +
>> +static int rk_crypto_enable_clk(struct crypto_info_t *dev)
>> +{
>> +int err;
>> +
>> +err = clk_prepare_enable(dev->sclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
>> +__func__, __LINE__);
>> +goto err_return;
>> +}
>> +err = clk_prepare_enable(dev->aclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
>> +__func__, __LINE__);
>> +goto err_aclk;
>> +}
>> +err = clk_prepare_enable(dev->hclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
>> +__func__, __LINE__);
>> +goto err_hclk;
>> +}
>> +
>> +err = clk_prepare_enable(dev->dmaclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
>> +__func__, __LINE__);
>> +goto err_dmaclk;
>> +}
>> +return err;
>> +err_dmaclk:
>> +clk_disable_unprepare(dev->hclk);
>> +err_hclk:
>> +clk_disable_unprepare(dev->aclk);
>> +err_aclk:
>> +clk_disable_unprepare(dev->sclk);
>> +err_return:
>> +return err;
>> +}
>> +
>> +static void rk_crypto_disable_clk(struct crypto_info_t *dev)
>> +{
>> +clk_disable_unprepare(dev->dmaclk);
>> +clk_disable_unprepare(dev->hclk);
>> +

Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-03 Thread LABBE Corentin 
On Tue, Nov 03, 2015 at 01:52:05PM +0800, Zain Wang wrote:
> Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
> mode.
> The names registered are:
> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> You can alloc tags above in your case.
> 
> And other algorithms and platforms will be added later on.
> 
> Signed-off-by: Zain Wang 
> ---
>  drivers/crypto/Kconfig |  11 +
>  drivers/crypto/Makefile|   1 +
>  drivers/crypto/rockchip/Makefile   |   3 +
>  drivers/crypto/rockchip/rk3288_crypto.c| 383 
>  drivers/crypto/rockchip/rk3288_crypto.h| 290 
>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 
> +
>  6 files changed, 1189 insertions(+)
>  create mode 100644 drivers/crypto/rockchip/Makefile
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
> 
> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
> index 2569e04..d1e42cf 100644
> --- a/drivers/crypto/Kconfig
> +++ b/drivers/crypto/Kconfig
> @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
> To compile this driver as a module, choose M here: the module
> will be called sun4i-ss.
>  
> +config CRYPTO_DEV_ROCKCHIP
> + tristate "Rockchip's Cryptographic Engine driver"
> +
> + select CRYPTO_AES
> + select CRYPTO_DES
> + select CRYPTO_BLKCIPHER
> +
> + help
> +   This driver interfaces with the hardware crypto accelerator.
> +   Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
> +
>  endif # CRYPTO_HW
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index c3ced6f..713de9d 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
>  obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
>  obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>  obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
> diff --git a/drivers/crypto/rockchip/Makefile 
> b/drivers/crypto/rockchip/Makefile
> new file mode 100644
> index 000..7051c6c
> --- /dev/null
> +++ b/drivers/crypto/rockchip/Makefile
> @@ -0,0 +1,3 @@
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
> +rk_crypto-objs := rk3288_crypto.o \
> +   rk3288_crypto_ablkcipher.o \
> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
> b/drivers/crypto/rockchip/rk3288_crypto.c
> new file mode 100644
> index 000..02830f2
> --- /dev/null
> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
> @@ -0,0 +1,383 @@
> +/*
> + *Crypto acceleration support for Rockchip RK3288
> + *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + *
> + * Author: Zain Wang 
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
> + */
> +
> +#include "rk3288_crypto.h"
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct crypto_info_t *crypto_p;
> +
> +static int rk_crypto_enable_clk(struct crypto_info_t *dev)
> +{
> + int err;
> +
> + err = clk_prepare_enable(dev->sclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
> + __func__, __LINE__);
> + goto err_return;
> + }
> + err = clk_prepare_enable(dev->aclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
> + __func__, __LINE__);
> + goto err_aclk;
> + }
> + err = clk_prepare_enable(dev->hclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
> + __func__, __LINE__);
> + goto err_hclk;
> + }
> +
> + err = clk_prepare_enable(dev->dmaclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
> + __func__, __LINE__);
> + goto err_dmaclk;
> + }
> + return err;
> +err_dmaclk:
> + clk_disable_unprepare(dev->hclk);
> +err_hclk:
> + clk_disable_unprepare(dev->aclk);
> +err_aclk:
> + clk_disable_unprepare(dev->sclk);
> +err_return:
> + return err;
> +}
> +
> +static void rk_crypto_disable_clk(struct crypto_info_t *dev)
> +{
> + clk_disable_unprepare(dev->dmaclk);
> + clk_disable_unprepare(dev->hclk);
> + clk_disable_unprepare(dev->aclk);
> + clk_disable_unprepare(dev->sclk);
> +}
> +
> +static int check_alignment(struct scatterlist *sg_src,
> +

Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-03 Thread LABBE Corentin 
On Tue, Nov 03, 2015 at 01:52:05PM +0800, Zain Wang wrote:
> Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
> mode.
> The names registered are:
> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
> You can alloc tags above in your case.
> 
> And other algorithms and platforms will be added later on.
> 
> Signed-off-by: Zain Wang 
> ---
>  drivers/crypto/Kconfig |  11 +
>  drivers/crypto/Makefile|   1 +
>  drivers/crypto/rockchip/Makefile   |   3 +
>  drivers/crypto/rockchip/rk3288_crypto.c| 383 
>  drivers/crypto/rockchip/rk3288_crypto.h| 290 
>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 
> +
>  6 files changed, 1189 insertions(+)
>  create mode 100644 drivers/crypto/rockchip/Makefile
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
> 
> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
> index 2569e04..d1e42cf 100644
> --- a/drivers/crypto/Kconfig
> +++ b/drivers/crypto/Kconfig
> @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
> To compile this driver as a module, choose M here: the module
> will be called sun4i-ss.
>  
> +config CRYPTO_DEV_ROCKCHIP
> + tristate "Rockchip's Cryptographic Engine driver"
> +
> + select CRYPTO_AES
> + select CRYPTO_DES
> + select CRYPTO_BLKCIPHER
> +
> + help
> +   This driver interfaces with the hardware crypto accelerator.
> +   Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
> +
>  endif # CRYPTO_HW
> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
> index c3ced6f..713de9d 100644
> --- a/drivers/crypto/Makefile
> +++ b/drivers/crypto/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
>  obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
>  obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>  obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
> diff --git a/drivers/crypto/rockchip/Makefile 
> b/drivers/crypto/rockchip/Makefile
> new file mode 100644
> index 000..7051c6c
> --- /dev/null
> +++ b/drivers/crypto/rockchip/Makefile
> @@ -0,0 +1,3 @@
> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
> +rk_crypto-objs := rk3288_crypto.o \
> +   rk3288_crypto_ablkcipher.o \
> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
> b/drivers/crypto/rockchip/rk3288_crypto.c
> new file mode 100644
> index 000..02830f2
> --- /dev/null
> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
> @@ -0,0 +1,383 @@
> +/*
> + *Crypto acceleration support for Rockchip RK3288
> + *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + *
> + * Author: Zain Wang 
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
> + */
> +
> +#include "rk3288_crypto.h"
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct crypto_info_t *crypto_p;
> +
> +static int rk_crypto_enable_clk(struct crypto_info_t *dev)
> +{
> + int err;
> +
> + err = clk_prepare_enable(dev->sclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
> + __func__, __LINE__);
> + goto err_return;
> + }
> + err = clk_prepare_enable(dev->aclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
> + __func__, __LINE__);
> + goto err_aclk;
> + }
> + err = clk_prepare_enable(dev->hclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
> + __func__, __LINE__);
> + goto err_hclk;
> + }
> +
> + err = clk_prepare_enable(dev->dmaclk);
> + if (err) {
> + dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
> + __func__, __LINE__);
> + goto err_dmaclk;
> + }
> + return err;
> +err_dmaclk:
> + clk_disable_unprepare(dev->hclk);
> +err_hclk:
> + clk_disable_unprepare(dev->aclk);
> +err_aclk:
> + clk_disable_unprepare(dev->sclk);
> +err_return:
> + return err;
> +}
> +
> +static void rk_crypto_disable_clk(struct crypto_info_t *dev)
> +{
> + clk_disable_unprepare(dev->dmaclk);
> + clk_disable_unprepare(dev->hclk);
> + clk_disable_unprepare(dev->aclk);
> + clk_disable_unprepare(dev->sclk);
> +}
> +
> +static

Re: [PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-03 Thread Zain 
Hi LABBE,

On 2015年11月03日 16:59, LABBE Corentin wrote:
> On Tue, Nov 03, 2015 at 01:52:05PM +0800, Zain Wang wrote:
>> Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
>> mode.
>> The names registered are:
>> ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
>> You can alloc tags above in your case.
>>
>> And other algorithms and platforms will be added later on.
>>
>> Signed-off-by: Zain Wang 
>> ---
>>  drivers/crypto/Kconfig |  11 +
>>  drivers/crypto/Makefile|   1 +
>>  drivers/crypto/rockchip/Makefile   |   3 +
>>  drivers/crypto/rockchip/rk3288_crypto.c| 383 
>>  drivers/crypto/rockchip/rk3288_crypto.h| 290 
>>  drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 
>> +
>>  6 files changed, 1189 insertions(+)
>>  create mode 100644 drivers/crypto/rockchip/Makefile
>>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
>>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
>>  create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c
>>
>> diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
>> index 2569e04..d1e42cf 100644
>> --- a/drivers/crypto/Kconfig
>> +++ b/drivers/crypto/Kconfig
>> @@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
>>To compile this driver as a module, choose M here: the module
>>will be called sun4i-ss.
>>  
>> +config CRYPTO_DEV_ROCKCHIP
>> +tristate "Rockchip's Cryptographic Engine driver"
>> +
>> +select CRYPTO_AES
>> +select CRYPTO_DES
>> +select CRYPTO_BLKCIPHER
>> +
>> +help
>> +  This driver interfaces with the hardware crypto accelerator.
>> +  Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
>> +
>>  endif # CRYPTO_HW
>> diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
>> index c3ced6f..713de9d 100644
>> --- a/drivers/crypto/Makefile
>> +++ b/drivers/crypto/Makefile
>> @@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
>>  obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
>>  obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
>>  obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
>> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
>> diff --git a/drivers/crypto/rockchip/Makefile 
>> b/drivers/crypto/rockchip/Makefile
>> new file mode 100644
>> index 000..7051c6c
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/Makefile
>> @@ -0,0 +1,3 @@
>> +obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
>> +rk_crypto-objs := rk3288_crypto.o \
>> +  rk3288_crypto_ablkcipher.o \
>> diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
>> b/drivers/crypto/rockchip/rk3288_crypto.c
>> new file mode 100644
>> index 000..02830f2
>> --- /dev/null
>> +++ b/drivers/crypto/rockchip/rk3288_crypto.c
>> @@ -0,0 +1,383 @@
>> +/*
>> + *Crypto acceleration support for Rockchip RK3288
>> + *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + *
>> + * Author: Zain Wang 
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms and conditions of the GNU General Public License,
>> + * version 2, as published by the Free Software Foundation.
>> + *
>> + * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
>> + */
>> +
>> +#include "rk3288_crypto.h"
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +struct crypto_info_t *crypto_p;
>> +
>> +static int rk_crypto_enable_clk(struct crypto_info_t *dev)
>> +{
>> +int err;
>> +
>> +err = clk_prepare_enable(dev->sclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
>> +__func__, __LINE__);
>> +goto err_return;
>> +}
>> +err = clk_prepare_enable(dev->aclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
>> +__func__, __LINE__);
>> +goto err_aclk;
>> +}
>> +err = clk_prepare_enable(dev->hclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
>> +__func__, __LINE__);
>> +goto err_hclk;
>> +}
>> +
>> +err = clk_prepare_enable(dev->dmaclk);
>> +if (err) {
>> +dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
>> +__func__, __LINE__);
>> +goto err_dmaclk;
>> +}
>> +return err;
>> +err_dmaclk:
>> +clk_disable_unprepare(dev->hclk);
>> +err_hclk:
>> +clk_disable_unprepare(dev->aclk);
>> +err_aclk:
>> +clk_disable_unprepare(dev->sclk);
>> +err_return:
>> +return err;
>> +}
>> +
>> +static void rk_crypto_disable_clk(struct crypto_info_t *dev)
>> +{
>> +

[PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-02 Thread Zain Wang 
Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
mode.
The names registered are:
ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.

And other algorithms and platforms will be added later on.

Signed-off-by: Zain Wang 
---
 drivers/crypto/Kconfig |  11 +
 drivers/crypto/Makefile|   1 +
 drivers/crypto/rockchip/Makefile   |   3 +
 drivers/crypto/rockchip/rk3288_crypto.c| 383 
 drivers/crypto/rockchip/rk3288_crypto.h| 290 
 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 +
 6 files changed, 1189 insertions(+)
 create mode 100644 drivers/crypto/rockchip/Makefile
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 2569e04..d1e42cf 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
  To compile this driver as a module, choose M here: the module
  will be called sun4i-ss.
 
+config CRYPTO_DEV_ROCKCHIP
+   tristate "Rockchip's Cryptographic Engine driver"
+
+   select CRYPTO_AES
+   select CRYPTO_DES
+   select CRYPTO_BLKCIPHER
+
+   help
+ This driver interfaces with the hardware crypto accelerator.
+ Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
+
 endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index c3ced6f..713de9d 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
 obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
 obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
 obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
new file mode 100644
index 000..7051c6c
--- /dev/null
+++ b/drivers/crypto/rockchip/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
+rk_crypto-objs := rk3288_crypto.o \
+ rk3288_crypto_ablkcipher.o \
diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
b/drivers/crypto/rockchip/rk3288_crypto.c
new file mode 100644
index 000..02830f2
--- /dev/null
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -0,0 +1,383 @@
+/*
+ *Crypto acceleration support for Rockchip RK3288
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Zain Wang 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
+ */
+
+#include "rk3288_crypto.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct crypto_info_t *crypto_p;
+
+static int rk_crypto_enable_clk(struct crypto_info_t *dev)
+{
+   int err;
+
+   err = clk_prepare_enable(dev->sclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
+   __func__, __LINE__);
+   goto err_return;
+   }
+   err = clk_prepare_enable(dev->aclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
+   __func__, __LINE__);
+   goto err_aclk;
+   }
+   err = clk_prepare_enable(dev->hclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
+   __func__, __LINE__);
+   goto err_hclk;
+   }
+
+   err = clk_prepare_enable(dev->dmaclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
+   __func__, __LINE__);
+   goto err_dmaclk;
+   }
+   return err;
+err_dmaclk:
+   clk_disable_unprepare(dev->hclk);
+err_hclk:
+   clk_disable_unprepare(dev->aclk);
+err_aclk:
+   clk_disable_unprepare(dev->sclk);
+err_return:
+   return err;
+}
+
+static void rk_crypto_disable_clk(struct crypto_info_t *dev)
+{
+   clk_disable_unprepare(dev->dmaclk);
+   clk_disable_unprepare(dev->hclk);
+   clk_disable_unprepare(dev->aclk);
+   clk_disable_unprepare(dev->sclk);
+}
+
+static int check_alignment(struct scatterlist *sg_src,
+  struct scatterlist *sg_dst,
+  int align_mask)
+{
+   int in, out, align;
+
+   in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
+IS_ALIGNED(sg_src->length, align_mask);
+   if (sg_dst

[PATCH v1 1/4] Crypto: Crypto driver support aes/des/des3 for rk3288

2015-11-02 Thread Zain Wang 
Crypto driver support cbc/ecb two chainmode, and aes/des/des3 three cipher
mode.
The names registered are:
ecb(aes) cbc(aes) ecb(des) cbc(des) ecb(des3_ede) cbc(des3_ede)
You can alloc tags above in your case.

And other algorithms and platforms will be added later on.

Signed-off-by: Zain Wang 
---
 drivers/crypto/Kconfig |  11 +
 drivers/crypto/Makefile|   1 +
 drivers/crypto/rockchip/Makefile   |   3 +
 drivers/crypto/rockchip/rk3288_crypto.c| 383 
 drivers/crypto/rockchip/rk3288_crypto.h| 290 
 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c | 501 +
 6 files changed, 1189 insertions(+)
 create mode 100644 drivers/crypto/rockchip/Makefile
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.c
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto.h
 create mode 100644 drivers/crypto/rockchip/rk3288_crypto_ablkcipher.c

diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 2569e04..d1e42cf 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -498,4 +498,15 @@ config CRYPTO_DEV_SUN4I_SS
  To compile this driver as a module, choose M here: the module
  will be called sun4i-ss.
 
+config CRYPTO_DEV_ROCKCHIP
+   tristate "Rockchip's Cryptographic Engine driver"
+
+   select CRYPTO_AES
+   select CRYPTO_DES
+   select CRYPTO_BLKCIPHER
+
+   help
+ This driver interfaces with the hardware crypto accelerator.
+ Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
+
 endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index c3ced6f..713de9d 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_CRYPTO_DEV_QAT) += qat/
 obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/
 obj-$(CONFIG_CRYPTO_DEV_VMX) += vmx/
 obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/
+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/
diff --git a/drivers/crypto/rockchip/Makefile b/drivers/crypto/rockchip/Makefile
new file mode 100644
index 000..7051c6c
--- /dev/null
+++ b/drivers/crypto/rockchip/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rk_crypto.o
+rk_crypto-objs := rk3288_crypto.o \
+ rk3288_crypto_ablkcipher.o \
diff --git a/drivers/crypto/rockchip/rk3288_crypto.c 
b/drivers/crypto/rockchip/rk3288_crypto.c
new file mode 100644
index 000..02830f2
--- /dev/null
+++ b/drivers/crypto/rockchip/rk3288_crypto.c
@@ -0,0 +1,383 @@
+/*
+ *Crypto acceleration support for Rockchip RK3288
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * Author: Zain Wang 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Some ideas are from marvell-cesa.c and s5p-sss.c driver.
+ */
+
+#include "rk3288_crypto.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct crypto_info_t *crypto_p;
+
+static int rk_crypto_enable_clk(struct crypto_info_t *dev)
+{
+   int err;
+
+   err = clk_prepare_enable(dev->sclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'sclk'\n",
+   __func__, __LINE__);
+   goto err_return;
+   }
+   err = clk_prepare_enable(dev->aclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'aclk'\n",
+   __func__, __LINE__);
+   goto err_aclk;
+   }
+   err = clk_prepare_enable(dev->hclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'hclk'\n",
+   __func__, __LINE__);
+   goto err_hclk;
+   }
+
+   err = clk_prepare_enable(dev->dmaclk);
+   if (err) {
+   dev_err(dev->dev, "[%s:%d], Couldn't enable clock 'dmaclk'\n",
+   __func__, __LINE__);
+   goto err_dmaclk;
+   }
+   return err;
+err_dmaclk:
+   clk_disable_unprepare(dev->hclk);
+err_hclk:
+   clk_disable_unprepare(dev->aclk);
+err_aclk:
+   clk_disable_unprepare(dev->sclk);
+err_return:
+   return err;
+}
+
+static void rk_crypto_disable_clk(struct crypto_info_t *dev)
+{
+   clk_disable_unprepare(dev->dmaclk);
+   clk_disable_unprepare(dev->hclk);
+   clk_disable_unprepare(dev->aclk);
+   clk_disable_unprepare(dev->sclk);
+}
+
+static int check_alignment(struct scatterlist *sg_src,
+  struct scatterlist *sg_dst,
+  int align_mask)
+{
+   int in, out, align;
+
+   in = IS_ALIGNED((uint32_t)sg_src->offset, 4) &&
+