Re: [PATCH v1 1/4] platform/x86: intel_pmc_ipc: Add readq API for GCR

[Andy Shevchenko]

On Tue, Nov 21, 2017 at 4:36 PM, Souvik Kumar Chakravarty
 wrote:
> Add intel_pmc_gcr_readq API for reading from 64-bit GCR registers.
> This API will be called from intel_telemetry. Rename intel_pmc_gcr_read
> to more appropriate intel_pmc_gcr_readl.

>  int intel_pmc_s0ix_counter_read(u64 *data);
> -int intel_pmc_gcr_read(u32 offset, u32 *data);
> +int intel_pmc_gcr_readl(u32 offset, u32 *data);
> +int intel_pmc_gcr_readq(u32 offset, u64 *data);
>  int intel_pmc_gcr_write(u32 offset, u32 data);
>  int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);

Ah, I didn't notice that we have a bunch of related functions.

>From above it looks like we better to leave read as is and introduce
_read64() instead of _readq(). This makes names more clear in case we
would need _update64 in the future.

Something like below at the end:

int intel_pmc_gcr_read(u32 offset, u32 *data);
int intel_pmc_gcr_write(u32 offset, u32 data);
int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);

+int intel_pmc_gcr_read64(u32 offset, u64 *data);

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 1/4] platform/x86: intel_pmc_ipc: Add readq API for GCR

[Andy Shevchenko]

On Tue, Nov 21, 2017 at 4:36 PM, Souvik Kumar Chakravarty
 wrote:
> Add intel_pmc_gcr_readq API for reading from 64-bit GCR registers.
> This API will be called from intel_telemetry. Rename intel_pmc_gcr_read
> to more appropriate intel_pmc_gcr_readl.

>  int intel_pmc_s0ix_counter_read(u64 *data);
> -int intel_pmc_gcr_read(u32 offset, u32 *data);
> +int intel_pmc_gcr_readl(u32 offset, u32 *data);
> +int intel_pmc_gcr_readq(u32 offset, u64 *data);
>  int intel_pmc_gcr_write(u32 offset, u32 data);
>  int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);

Ah, I didn't notice that we have a bunch of related functions.

>From above it looks like we better to leave read as is and introduce
_read64() instead of _readq(). This makes names more clear in case we
would need _update64 in the future.

Something like below at the end:

int intel_pmc_gcr_read(u32 offset, u32 *data);
int intel_pmc_gcr_write(u32 offset, u32 data);
int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);

+int intel_pmc_gcr_read64(u32 offset, u64 *data);

-- 
With Best Regards,
Andy Shevchenko

[PATCH v1 1/4] platform/x86: intel_pmc_ipc: Add readq API for GCR

[Souvik Kumar Chakravarty]

Add intel_pmc_gcr_readq API for reading from 64-bit GCR registers.
This API will be called from intel_telemetry. Rename intel_pmc_gcr_read
to more appropriate intel_pmc_gcr_readl.

Signed-off-by: Souvik Kumar Chakravarty 
---
 arch/x86/include/asm/intel_pmc_ipc.h | 10 --
 drivers/platform/x86/intel_pmc_ipc.c | 37 
 2 files changed, 41 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/intel_pmc_ipc.h 
b/arch/x86/include/asm/intel_pmc_ipc.h
index fac89eb..0aa5be9 100644
--- a/arch/x86/include/asm/intel_pmc_ipc.h
+++ b/arch/x86/include/asm/intel_pmc_ipc.h
@@ -36,7 +36,8 @@ int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,
 int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
u32 *out, u32 outlen);
 int intel_pmc_s0ix_counter_read(u64 *data);
-int intel_pmc_gcr_read(u32 offset, u32 *data);
+int intel_pmc_gcr_readl(u32 offset, u32 *data);
+int intel_pmc_gcr_readq(u32 offset, u64 *data);
 int intel_pmc_gcr_write(u32 offset, u32 data);
 int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);
 
@@ -64,7 +65,12 @@ static inline int intel_pmc_s0ix_counter_read(u64 *data)
return -EINVAL;
 }
 
-static inline int intel_pmc_gcr_read(u32 offset, u32 *data)
+static inline int intel_pmc_gcr_readl(u32 offset, u32 *data)
+{
+   return -EINVAL;
+}
+
+static inline int intel_pmc_gcr_readq(u32 offset, u64 *data)
 {
return -EINVAL;
 }
diff --git a/drivers/platform/x86/intel_pmc_ipc.c 
b/drivers/platform/x86/intel_pmc_ipc.c
index e03fa314..bef9c57 100644
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -215,15 +215,15 @@ static inline int is_gcr_valid(u32 offset)
 }
 
 /**
- * intel_pmc_gcr_read() - Read PMC GCR register
+ * intel_pmc_gcr_readl() - Read a 32-bit PMC GCR register
  * @offset:offset of GCR register from GCR address base
  * @data:  data pointer for storing the register output
  *
- * Reads the PMC GCR register of given offset.
+ * Reads the 32-bit PMC GCR register at given offset.
  *
  * Return: negative value on error or 0 on success.
  */
-int intel_pmc_gcr_read(u32 offset, u32 *data)
+int intel_pmc_gcr_readl(u32 offset, u32 *data)
 {
int ret;
 
@@ -241,7 +241,36 @@ int intel_pmc_gcr_read(u32 offset, u32 *data)
 
return 0;
 }
-EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);
+EXPORT_SYMBOL_GPL(intel_pmc_gcr_readl);
+
+/**
+ * intel_pmc_gcr_readq() - Read a 64-bit PMC GCR register
+ * @offset:offset of GCR register from GCR address base
+ * @data:  data pointer for storing the register output
+ *
+ * Reads the 64-bit PMC GCR register at given offset.
+ *
+ * Return: negative value on error or 0 on success.
+ */
+int intel_pmc_gcr_readq(u32 offset, u64 *data)
+{
+   int ret;
+
+   spin_lock(_lock);
+
+   ret = is_gcr_valid(offset);
+   if (ret < 0) {
+   spin_unlock(_lock);
+   return ret;
+   }
+
+   *data = readq(ipcdev.gcr_mem_base + offset);
+
+   spin_unlock(_lock);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pmc_gcr_readq);
 
 /**
  * intel_pmc_gcr_write() - Write PMC GCR register
-- 
2.7.4

[PATCH v1 1/4] platform/x86: intel_pmc_ipc: Add readq API for GCR

[Souvik Kumar Chakravarty]

Add intel_pmc_gcr_readq API for reading from 64-bit GCR registers.
This API will be called from intel_telemetry. Rename intel_pmc_gcr_read
to more appropriate intel_pmc_gcr_readl.

Signed-off-by: Souvik Kumar Chakravarty 
---
 arch/x86/include/asm/intel_pmc_ipc.h | 10 --
 drivers/platform/x86/intel_pmc_ipc.c | 37 
 2 files changed, 41 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/intel_pmc_ipc.h 
b/arch/x86/include/asm/intel_pmc_ipc.h
index fac89eb..0aa5be9 100644
--- a/arch/x86/include/asm/intel_pmc_ipc.h
+++ b/arch/x86/include/asm/intel_pmc_ipc.h
@@ -36,7 +36,8 @@ int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,
 int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
u32 *out, u32 outlen);
 int intel_pmc_s0ix_counter_read(u64 *data);
-int intel_pmc_gcr_read(u32 offset, u32 *data);
+int intel_pmc_gcr_readl(u32 offset, u32 *data);
+int intel_pmc_gcr_readq(u32 offset, u64 *data);
 int intel_pmc_gcr_write(u32 offset, u32 data);
 int intel_pmc_gcr_update(u32 offset, u32 mask, u32 val);
 
@@ -64,7 +65,12 @@ static inline int intel_pmc_s0ix_counter_read(u64 *data)
return -EINVAL;
 }
 
-static inline int intel_pmc_gcr_read(u32 offset, u32 *data)
+static inline int intel_pmc_gcr_readl(u32 offset, u32 *data)
+{
+   return -EINVAL;
+}
+
+static inline int intel_pmc_gcr_readq(u32 offset, u64 *data)
 {
return -EINVAL;
 }
diff --git a/drivers/platform/x86/intel_pmc_ipc.c 
b/drivers/platform/x86/intel_pmc_ipc.c
index e03fa314..bef9c57 100644
--- a/drivers/platform/x86/intel_pmc_ipc.c
+++ b/drivers/platform/x86/intel_pmc_ipc.c
@@ -215,15 +215,15 @@ static inline int is_gcr_valid(u32 offset)
 }
 
 /**
- * intel_pmc_gcr_read() - Read PMC GCR register
+ * intel_pmc_gcr_readl() - Read a 32-bit PMC GCR register
  * @offset:offset of GCR register from GCR address base
  * @data:  data pointer for storing the register output
  *
- * Reads the PMC GCR register of given offset.
+ * Reads the 32-bit PMC GCR register at given offset.
  *
  * Return: negative value on error or 0 on success.
  */
-int intel_pmc_gcr_read(u32 offset, u32 *data)
+int intel_pmc_gcr_readl(u32 offset, u32 *data)
 {
int ret;
 
@@ -241,7 +241,36 @@ int intel_pmc_gcr_read(u32 offset, u32 *data)
 
return 0;
 }
-EXPORT_SYMBOL_GPL(intel_pmc_gcr_read);
+EXPORT_SYMBOL_GPL(intel_pmc_gcr_readl);
+
+/**
+ * intel_pmc_gcr_readq() - Read a 64-bit PMC GCR register
+ * @offset:offset of GCR register from GCR address base
+ * @data:  data pointer for storing the register output
+ *
+ * Reads the 64-bit PMC GCR register at given offset.
+ *
+ * Return: negative value on error or 0 on success.
+ */
+int intel_pmc_gcr_readq(u32 offset, u64 *data)
+{
+   int ret;
+
+   spin_lock(_lock);
+
+   ret = is_gcr_valid(offset);
+   if (ret < 0) {
+   spin_unlock(_lock);
+   return ret;
+   }
+
+   *data = readq(ipcdev.gcr_mem_base + offset);
+
+   spin_unlock(_lock);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(intel_pmc_gcr_readq);
 
 /**
  * intel_pmc_gcr_write() - Write PMC GCR register
-- 
2.7.4