Re: [PATCH v1 18/18] arm64: dts: imx8mq: Add node to G2 hardware
Le 17/02/2021 à 21:43, Ezequiel Garcia a écrit :
On Wed, 2021-02-17 at 09:03 +0100, Benjamin Gaignard wrote:
Split VPU node in two: one for G1 and one for G2 since they are
different hardware blocks.
Signed-off-by: Benjamin Gaignard
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 +--
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d9d9efc8592d..3cab3f0b9131 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1287,17 +1287,16 @@ vpu_reset: vpu-reset@3832 {
#reset-cells = <1>;
};
- vpu: video-codec@3830 {
+ vpu_g1: video-codec@3830 {
compatible = "nxp,imx8mq-vpu";
- reg = <0x3830 0x1>,
- <0x3831 0x1>;
- reg-names = "g1", "g2";
- interrupts = ,
- ;
- interrupt-names = "g1", "g2";
+ reg = <0x3830 0x1>;
+ reg-names = "g1";
+ interrupts = ;
+ interrupt-names = "g1";
clocks = < IMX8MQ_CLK_VPU_G1_ROOT>,
- < IMX8MQ_CLK_VPU_G2_ROOT>;
- clock-names = "g1", "g2";
+ < IMX8MQ_CLK_VPU_G2_ROOT>,
+ < IMX8MQ_CLK_VPU_DEC_ROOT>;
+ clock-names = "g1", "g2", "bus";
How come the G1 block needs the G2 clock?
It doesn't, I will remove it in v2
assigned-clocks = < IMX8MQ_CLK_VPU_G1>,
< IMX8MQ_CLK_VPU_G2>,
< IMX8MQ_CLK_VPU_BUS>,
@@ -1306,12 +1305,36 @@ vpu: video-codec@3830 {
< IMX8MQ_VPU_PLL_OUT>,
< IMX8MQ_SYS1_PLL_800M>,
< IMX8MQ_VPU_PLL>;
- assigned-clock-rates = <6>, <6>,
+ assigned-clock-rates = <6>, <3>,
<8>, <0>;
resets = <_reset IMX8MQ_RESET_VPU_RESET_G1>;
power-domains = <_vpu>;
};
+ vpu_g2: video-codec@3831 {
+ compatible = "nxp,imx8mq-vpu-g2";
+ reg = <0x3831 0x1>;
+ reg-names = "g2";
+ interrupts = ;
+ interrupt-names = "g2";
+ clocks = < IMX8MQ_CLK_VPU_G1_ROOT>,
+ < IMX8MQ_CLK_VPU_G2_ROOT>,
Ditto, the G2 block needs the G1 clock?
Thanks,
Ezequiel
Re: [PATCH v1 18/18] arm64: dts: imx8mq: Add node to G2 hardware
On Wed, 2021-02-17 at 09:03 +0100, Benjamin Gaignard wrote:
> Split VPU node in two: one for G1 and one for G2 since they are
> different hardware blocks.
>
> Signed-off-by: Benjamin Gaignard
> ---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 +--
> 1 file changed, 33 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index d9d9efc8592d..3cab3f0b9131 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -1287,17 +1287,16 @@ vpu_reset: vpu-reset@3832 {
> #reset-cells = <1>;
> };
>
> - vpu: video-codec@3830 {
> + vpu_g1: video-codec@3830 {
> compatible = "nxp,imx8mq-vpu";
> - reg = <0x3830 0x1>,
> - <0x3831 0x1>;
> - reg-names = "g1", "g2";
> - interrupts = ,
> - ;
> - interrupt-names = "g1", "g2";
> + reg = <0x3830 0x1>;
> + reg-names = "g1";
> + interrupts = ;
> + interrupt-names = "g1";
> clocks = < IMX8MQ_CLK_VPU_G1_ROOT>,
> - < IMX8MQ_CLK_VPU_G2_ROOT>;
> - clock-names = "g1", "g2";
> + < IMX8MQ_CLK_VPU_G2_ROOT>,
> + < IMX8MQ_CLK_VPU_DEC_ROOT>;
> + clock-names = "g1", "g2", "bus";
How come the G1 block needs the G2 clock?
> assigned-clocks = < IMX8MQ_CLK_VPU_G1>,
> < IMX8MQ_CLK_VPU_G2>,
> < IMX8MQ_CLK_VPU_BUS>,
> @@ -1306,12 +1305,36 @@ vpu: video-codec@3830 {
> < IMX8MQ_VPU_PLL_OUT>,
> < IMX8MQ_SYS1_PLL_800M>,
> < IMX8MQ_VPU_PLL>;
> - assigned-clock-rates = <6>, <6>,
> + assigned-clock-rates = <6>, <3>,
> <8>, <0>;
> resets = <_reset IMX8MQ_RESET_VPU_RESET_G1>;
> power-domains = <_vpu>;
> };
>
> + vpu_g2: video-codec@3831 {
> + compatible = "nxp,imx8mq-vpu-g2";
> + reg = <0x3831 0x1>;
> + reg-names = "g2";
> + interrupts = ;
> + interrupt-names = "g2";
> + clocks = < IMX8MQ_CLK_VPU_G1_ROOT>,
> + < IMX8MQ_CLK_VPU_G2_ROOT>,
Ditto, the G2 block needs the G1 clock?
Thanks,
Ezequiel
[PATCH v1 18/18] arm64: dts: imx8mq: Add node to G2 hardware
Split VPU node in two: one for G1 and one for G2 since they are
different hardware blocks.
Signed-off-by: Benjamin Gaignard
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 43 +--
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d9d9efc8592d..3cab3f0b9131 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1287,17 +1287,16 @@ vpu_reset: vpu-reset@3832 {
#reset-cells = <1>;
};
- vpu: video-codec@3830 {
+ vpu_g1: video-codec@3830 {
compatible = "nxp,imx8mq-vpu";
- reg = <0x3830 0x1>,
- <0x3831 0x1>;
- reg-names = "g1", "g2";
- interrupts = ,
-;
- interrupt-names = "g1", "g2";
+ reg = <0x3830 0x1>;
+ reg-names = "g1";
+ interrupts = ;
+ interrupt-names = "g1";
clocks = < IMX8MQ_CLK_VPU_G1_ROOT>,
-< IMX8MQ_CLK_VPU_G2_ROOT>;
- clock-names = "g1", "g2";
+< IMX8MQ_CLK_VPU_G2_ROOT>,
+< IMX8MQ_CLK_VPU_DEC_ROOT>;
+ clock-names = "g1", "g2", "bus";
assigned-clocks = < IMX8MQ_CLK_VPU_G1>,
< IMX8MQ_CLK_VPU_G2>,
< IMX8MQ_CLK_VPU_BUS>,
@@ -1306,12 +1305,36 @@ vpu: video-codec@3830 {
< IMX8MQ_VPU_PLL_OUT>,
< IMX8MQ_SYS1_PLL_800M>,
< IMX8MQ_VPU_PLL>;
- assigned-clock-rates = <6>, <6>,
+ assigned-clock-rates = <6>, <3>,
<8>, <0>;
resets = <_reset IMX8MQ_RESET_VPU_RESET_G1>;
power-domains = <_vpu>;
};
+ vpu_g2: video-codec@3831 {
+ compatible = "nxp,imx8mq-vpu-g2";
+ reg = <0x3831 0x1>;
+ reg-names = "g2";
+ interrupts = ;
+ interrupt-names = "g2";
+ clocks = < IMX8MQ_CLK_VPU_G1_ROOT>,
+< IMX8MQ_CLK_VPU_G2_ROOT>,
+< IMX8MQ_CLK_VPU_DEC_ROOT>;
+ clock-names = "g1", "g2", "bus";
+ assigned-clocks = < IMX8MQ_CLK_VPU_G1>,
+ < IMX8MQ_CLK_VPU_G2>,
+ < IMX8MQ_CLK_VPU_BUS>,
+ < IMX8MQ_VPU_PLL_BYPASS>;
+ assigned-clock-parents = < IMX8MQ_VPU_PLL_OUT>,
+< IMX8MQ_VPU_PLL_OUT>,
+< IMX8MQ_SYS1_PLL_800M>,
+< IMX8MQ_VPU_PLL>;
+ assigned-clock-rates = <6>, <3>,
+ <8>, <0>;
+ resets = <_reset IMX8MQ_RESET_VPU_RESET_G2>;
+ power-domains = <_vpu>;
+ };
+
pcie0: pcie@3380 {
compatible = "fsl,imx8mq-pcie";
reg = <0x3380 0x40>,
--
2.25.1
