Re: [PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support
On Thu, Apr 05, 2018 at 10:12:05AM -0500, Alan Tull wrote: > On Tue, Apr 3, 2018 at 2:02 PM, Paolo Pisati wrote: > > Hi Paolo, > > Looks good, except that I have to fix up the calls to > fpga_mgr_register/unregister since my API changes didn't go in. I've > fixed those up and pushed to a branch on my kernel org git repo to let > the robots do some testing. I'll post (v11 with those fixes) after > that is cleared. Awesome Alan, thank you. -- bye, p.
Re: [PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support
On Tue, Apr 3, 2018 at 2:02 PM, Paolo Pisati wrote: Hi Paolo, Looks good, except that I have to fix up the calls to fpga_mgr_register/unregister since my API changes didn't go in. I've fixed those up and pushed to a branch on my kernel org git repo to let the robots do some testing. I'll post (v11 with those fixes) after that is cleared. We're too late for 4.17, expect it for 4.18. Thanks, Alan > This patch adds support to the FPGA manager for programming > MachXO2 device’s internal flash memory, via slave SPI. > > Signed-off-by: Paolo Pisati Acked-by: Alan Tull
Re: [PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support
Hi Paolo,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.16 next-20180403]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Paolo-Pisati/dt-bindings-fpga-add-lattice-machxo2-slave-spi-binding-description/20180404-055540
reproduce:
# apt-get install sparse
make ARCH=x86_64 allmodconfig
make C=1 CF=-D__CHECK_ENDIAN__
sparse warnings: (new ones prefixed by >>)
>> drivers/fpga/machxo2-spi.c:86:19: sparse: cast to restricted __be32
>> drivers/fpga/machxo2-spi.c:86:19: sparse: cast to restricted __be32
>> drivers/fpga/machxo2-spi.c:86:19: sparse: cast to restricted __be32
>> drivers/fpga/machxo2-spi.c:86:19: sparse: cast to restricted __be32
>> drivers/fpga/machxo2-spi.c:86:19: sparse: cast to restricted __be32
>> drivers/fpga/machxo2-spi.c:86:19: sparse: cast to restricted __be32
drivers/fpga/machxo2-spi.c:369:12: sparse: no member 'parent' in struct
fpga_manager
>> drivers/fpga/machxo2-spi.c:375:33: sparse: not enough arguments for function
>> fpga_mgr_register
>> drivers/fpga/machxo2-spi.c:382:29: sparse: incorrect type in argument 1
>> (different base types) @@expected struct device *dev @@got
>> structstruct device *dev @@
>> drivers/fpga/machxo2-spi.c:369:12: sparse: generating address of non-lvalue
>> (8)
drivers/fpga/machxo2-spi.c: In function 'machxo2_spi_probe':
drivers/fpga/machxo2-spi.c:369:5: error: 'struct fpga_manager' has no member
named 'parent'
mgr->parent = dev;
^~
drivers/fpga/machxo2-spi.c:375:27: error: passing argument 1 of
'fpga_mgr_register' from incompatible pointer type
[-Werror=incompatible-pointer-types]
return fpga_mgr_register(mgr);
^~~
In file included from drivers/fpga/machxo2-spi.c:12:0:
include/linux/fpga/fpga-mgr.h:173:5: note: expected 'struct device *' but
argument is of type 'struct fpga_manager *'
int fpga_mgr_register(struct device *dev, const char *name,
^
drivers/fpga/machxo2-spi.c:375:9: error: too few arguments to function
'fpga_mgr_register'
return fpga_mgr_register(mgr);
^
In file included from drivers/fpga/machxo2-spi.c:12:0:
include/linux/fpga/fpga-mgr.h:173:5: note: declared here
int fpga_mgr_register(struct device *dev, const char *name,
^
drivers/fpga/machxo2-spi.c: In function 'machxo2_spi_remove':
drivers/fpga/machxo2-spi.c:382:22: error: passing argument 1 of
'fpga_mgr_unregister' from incompatible pointer type
[-Werror=incompatible-pointer-types]
fpga_mgr_unregister(mgr);
^~~
In file included from drivers/fpga/machxo2-spi.c:12:0:
include/linux/fpga/fpga-mgr.h:176:6: note: expected 'struct device *' but
argument is of type 'struct fpga_manager *'
void fpga_mgr_unregister(struct device *dev);
^~~
drivers/fpga/machxo2-spi.c: In function 'machxo2_spi_probe':
drivers/fpga/machxo2-spi.c:376:1: warning: control reaches end of non-void
function [-Wreturn-type]
}
^
cc1: some warnings being treated as errors
vim +86 drivers/fpga/machxo2-spi.c
65
66 static int get_status(struct spi_device *spi, unsigned long *status)
67 {
68 struct spi_message msg;
69 struct spi_transfer rx, tx;
70 static const u8 cmd[] = LSC_READ_STATUS;
71 int ret;
72
73 memset(&rx, 0, sizeof(rx));
74 memset(&tx, 0, sizeof(tx));
75 tx.tx_buf = cmd;
76 tx.len = sizeof(cmd);
77 rx.rx_buf = status;
78 rx.len = 4;
79 spi_message_init(&msg);
80 spi_message_add_tail(&tx, &msg);
81 spi_message_add_tail(&rx, &msg);
82 ret = spi_sync(spi, &msg);
83 if (ret)
84 return ret;
85
> 86 *status = be32_to_cpu(*status);
87
88 return 0;
89 }
90
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[PATCH v10 2/2] fpga: lattice machxo2: Add Lattice MachXO2 support
This patch adds support to the FPGA manager for programming
MachXO2 device’s internal flash memory, via slave SPI.
Signed-off-by: Paolo Pisati
---
drivers/fpga/Kconfig | 7 +
drivers/fpga/Makefile | 1 +
drivers/fpga/machxo2-spi.c | 413 +
3 files changed, 421 insertions(+)
create mode 100644 drivers/fpga/machxo2-spi.c
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index f47ef84..53d3f55 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -70,6 +70,13 @@ config FPGA_MGR_ICE40_SPI
help
FPGA manager driver support for Lattice iCE40 FPGAs over SPI.
+config FPGA_MGR_MACHXO2_SPI
+ tristate "Lattice MachXO2 SPI"
+ depends on SPI
+ help
+ FPGA manager driver support for Lattice MachXO2 configuration
+ over slave SPI interface.
+
config FPGA_MGR_TS73XX
tristate "Technologic Systems TS-73xx SBC FPGA Manager"
depends on ARCH_EP93XX && MACH_TS72XX
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 3cb276a..f9803da 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA)+= fpga-mgr.o
obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
+obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
diff --git a/drivers/fpga/machxo2-spi.c b/drivers/fpga/machxo2-spi.c
new file mode 100644
index 000..3482d48
--- /dev/null
+++ b/drivers/fpga/machxo2-spi.c
@@ -0,0 +1,413 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Lattice MachXO2 Slave SPI Driver
+ *
+ * Manage Lattice FPGA firmware that is loaded over SPI using
+ * the slave serial configuration interface.
+ *
+ * Copyright (C) 2018 Paolo Pisati
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* MachXO2 Programming Guide - sysCONFIG Programming Commands */
+#define IDCODE_PUB {0xe0, 0x00, 0x00, 0x00}
+#define ISC_ENABLE {0xc6, 0x08, 0x00, 0x00}
+#define ISC_ERASE {0x0e, 0x04, 0x00, 0x00}
+#define ISC_PROGRAMDONE{0x5e, 0x00, 0x00, 0x00}
+#define LSC_INITADDRESS{0x46, 0x00, 0x00, 0x00}
+#define LSC_PROGINCRNV {0x70, 0x00, 0x00, 0x01}
+#define LSC_READ_STATUS{0x3c, 0x00, 0x00, 0x00}
+#define LSC_REFRESH{0x79, 0x00, 0x00, 0x00}
+
+/*
+ * Max CCLK in Slave SPI mode according to 'MachXO2 Family Data
+ * Sheet' sysCONFIG Port Timing Specifications (3-36)
+ */
+#define MACHXO2_MAX_SPEED 6600
+
+#define MACHXO2_LOW_DELAY_USEC 5
+#define MACHXO2_HIGH_DELAY_USEC200
+#define MACHXO2_REFRESH_USEC 4800
+#define MACHXO2_MAX_BUSY_LOOP 128
+#define MACHXO2_MAX_REFRESH_LOOP 16
+
+#define MACHXO2_PAGE_SIZE 16
+#define MACHXO2_BUF_SIZE (MACHXO2_PAGE_SIZE + 4)
+
+/* Status register bits, errors and error mask */
+#define BUSY 12
+#define DONE 8
+#define DVER 27
+#define ENAB 9
+#define ERRBITS23
+#define ERRMASK7
+#define FAIL 13
+
+#define ENOERR 0 /* no error */
+#define EID1
+#define ECMD 2
+#define ECRC 3
+#define EPREAM 4 /* preamble error */
+#define EABRT 5 /* abort error */
+#define EOVERFL6 /* overflow error */
+#define ESDMEOF7 /* SDM EOF */
+
+static inline u8 get_err(unsigned long *status)
+{
+ return (*status >> ERRBITS) & ERRMASK;
+}
+
+static int get_status(struct spi_device *spi, unsigned long *status)
+{
+ struct spi_message msg;
+ struct spi_transfer rx, tx;
+ static const u8 cmd[] = LSC_READ_STATUS;
+ int ret;
+
+ memset(&rx, 0, sizeof(rx));
+ memset(&tx, 0, sizeof(tx));
+ tx.tx_buf = cmd;
+ tx.len = sizeof(cmd);
+ rx.rx_buf = status;
+ rx.len = 4;
+ spi_message_init(&msg);
+ spi_message_add_tail(&tx, &msg);
+ spi_message_add_tail(&rx, &msg);
+ ret = spi_sync(spi, &msg);
+ if (ret)
+ return ret;
+
+ *status = be32_to_cpu(*status);
+
+ return 0;
+}
+
+#ifdef DEBUG
+static const char *get_err_string(u8 err)
+{
+ switch (err) {
+ case ENOERR:return "No Error";
+ case EID: return "ID ERR";
+ case ECMD: return "CMD ERR";
+ case ECRC: return "CRC ERR";
+ case EPREAM:return "Preamble ERR";
+ case EABRT: return "Abort ERR";
+ case EOVERFL: return "Overflow ERR";
+ case ESDMEOF: return "SDM EOF";
+ }
+
+ return "Default switch case";
+}
+#endif
+
+static void dump_status_reg(unsigned long *status)
+{
+#ifdef DEBUG
+ pr_debug("machxo2 status: 0x%08lX - done=%d, cfgena=%d, busy=%d,
