Re: [PATCH v14 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings
Hi Geert,
Thanks for your review!
Will fix it as
+Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
+-
+
+Required properties:
+- compatible: should be an SoC-specific compatible value, followed by
+"renesas,rcar-gen3-rpc" as a fallback.
+supported SoC-specific values are:
+"renesas,r8a77980-rpc" (R-Car
V3H)
+"renesas,r8a77995-rpc" (R-Car
D3)
+- reg: should contain three register areas:
+ first for the base address of RPC-IF registers,
+ second for the direct mapping read mode and
+ third for the write buffer area.
+- reg-names: should contain "regs", "dirmap" and "wbuf"
+- clocks: should contain the clock phandle/specifier pair for the module
clock.
+- clock-names: should contain "rpc"
+- power-domains: should contain the power domain phandle/secifier pair.
+- resets: should contain the reset controller phandle/specifier pair.
+- #address-cells: should be 1
+- #size-cells: should be 0
+
+ flash: should be represented by a subnode of the RPC-IF node,
+ which "compatible" property contains "jedec,spi-nor", it presents SPI
is used.
+
+Example:
+
+rpc: spi@ee20 {
+compatible = "renesas,r8a77995-rpc",
"renesas,rcar-gen3-rpc";
+reg = <0 0xee20 0 0x200>, <0
0x0800 0 0x400>,
+ <0 0xee208000 0 0x100>;
+reg-names = "regs", "dirmap", "wbuf";
+clocks = < CPG_MOD 917>;
+clock-names = "rpc";
+power-domains = <
R8A77995_PD_ALWAYS_ON>;
+resets = < 917>;
+#address-cells = <1>;
+#size-cells = <0>;
+
+flash@0 {
+compatible =
"jedec,spi-nor";
+reg = <0>;
+spi-max-frequency =
<4000>;
+spi-tx-bus-width = <1>;
+spi-rx-bus-width = <1>;
+};
+};
Is it OK ?
thanks & best regards,
Mason
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Re: [PATCH v14 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings
Hi Mason,
On Thu, Jun 20, 2019 at 11:08 AM Mason Yang wrote:
> Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
>
> Signed-off-by: Mason Yang
Thanks for your patch!
> index 000..e8edf99
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
> @@ -0,0 +1,43 @@
> +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
> +-
> +
> +Required properties:
> +- compatible: should be an SoC-specific compatible value, followed by
> + "renesas,rcar-gen3-rpc" as a fallback.
> + supported SoC-specific values are:
> + "renesas,r8a77980-rpc" (R-Car V3H)
> + "renesas,r8a77995-rpc" (R-Car D3)
> +- reg: should contain three register areas:
> + first for the base address of RPC-IF registers,
> + second for the direct mapping read mode and
> + third for the write buffer area.
> +- reg-names: should contain "regs", "dirmap" and "wbuf"
> +- clocks: should contain the clock phandle/specifier pair for the module
> clock.
> +- clock-names: should contain "rpc"
> +- power-domain: should contain the power domain phandle/secifier pair.
power-domains
> +- resets: should contain the reset controller phandle/specifier pair.
> +- #address-cells: should be 1
> +- #size-cells: should be 0
> +
> +Example:
> +
> + rpc: spi@ee20 {
> + compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc";
> + reg = <0 0xee20 0 0x200>, <0 0x0800 0 0x400>,
> + <0 0xee208000 0 0x100>;
> + reg-names = "regs", "dirmap", "wbuf";
> + clocks = < CPG_MOD 917>;
> + clock-names = "rpc";
> + power-domains = < R8A77995_PD_ALWAYS_ON>;
> + resets = < 917>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + flash@0 {
The subnode is not documented above.
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <4000>;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <1>;
> + };
> + };
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Re: [PATCH v14 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings
On Thu, 20 Jun 2019 17:30:46 +0800, Mason Yang wrote: > Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang > --- > .../devicetree/bindings/spi/spi-renesas-rpc.txt| 43 > ++ > 1 file changed, 43 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > Reviewed-by: Rob Herring
[PATCH v14 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings
Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller.
Signed-off-by: Mason Yang
---
.../devicetree/bindings/spi/spi-renesas-rpc.txt| 43 ++
1 file changed, 43 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
new file mode 100644
index 000..e8edf99
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt
@@ -0,0 +1,43 @@
+Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
+-
+
+Required properties:
+- compatible: should be an SoC-specific compatible value, followed by
+ "renesas,rcar-gen3-rpc" as a fallback.
+ supported SoC-specific values are:
+ "renesas,r8a77980-rpc" (R-Car V3H)
+ "renesas,r8a77995-rpc" (R-Car D3)
+- reg: should contain three register areas:
+ first for the base address of RPC-IF registers,
+ second for the direct mapping read mode and
+ third for the write buffer area.
+- reg-names: should contain "regs", "dirmap" and "wbuf"
+- clocks: should contain the clock phandle/specifier pair for the module clock.
+- clock-names: should contain "rpc"
+- power-domain: should contain the power domain phandle/secifier pair.
+- resets: should contain the reset controller phandle/specifier pair.
+- #address-cells: should be 1
+- #size-cells: should be 0
+
+Example:
+
+ rpc: spi@ee20 {
+ compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc";
+ reg = <0 0xee20 0 0x200>, <0 0x0800 0 0x400>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ clocks = < CPG_MOD 917>;
+ clock-names = "rpc";
+ power-domains = < R8A77995_PD_ALWAYS_ON>;
+ resets = < 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <4000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
--
1.9.1
