Re: [PATCH v2] irqchip: vt8500: Switch to a simple write clear for Interrupt Status Register

2014-04-28 Thread Axel Lin 
2014-04-28 18:08 GMT+08:00 Thomas Gleixner :
> On Mon, 28 Apr 2014, Axel Lin wrote:
>
>> According to the datasheet, the attribute of Interrupt Status Register is 
>> RW0S,
>> which means:
>>   Software can read the register.
>>   Software can also "write 1 to clear". "write 0" has no effect.
>>
>> So the read/modify/write cycle is no necessary, switch to a simple write 
>> clear
>> instead.
>
> Again, what's the point of this?
>
> There is still nothing which masks the interrupt at the controller
> level which is the purpose of the irq_mask() callback.
>
Ah, stupid me.
Let me try again to fix this.

Thanks,
Axel
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Re: [PATCH v2] irqchip: vt8500: Switch to a simple write clear for Interrupt Status Register

2014-04-28 Thread Thomas Gleixner 
On Mon, 28 Apr 2014, Axel Lin wrote:

> According to the datasheet, the attribute of Interrupt Status Register is 
> RW0S,
> which means:
>   Software can read the register.
>   Software can also "write 1 to clear". "write 0" has no effect.
> 
> So the read/modify/write cycle is no necessary, switch to a simple write clear
> instead.

Again, what's the point of this?

There is still nothing which masks the interrupt at the controller
level which is the purpose of the irq_mask() callback.

Thanks,

tglx

 
> Signed-off-by: Axel Lin 
> ---
> v2: Update commit log, this is a code simplification rather than bug fix.
>  drivers/irqchip/irq-vt8500.c | 6 +-
>  1 file changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-vt8500.c b/drivers/irqchip/irq-vt8500.c
> index eb6e91e..a0085bc 100644
> --- a/drivers/irqchip/irq-vt8500.c
> +++ b/drivers/irqchip/irq-vt8500.c
> @@ -87,14 +87,10 @@ static void vt8500_irq_mask(struct irq_data *d)
>   void __iomem *base = priv->base;
>   void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4);
>   u8 edge, dctr;
> - u32 status;
>  
>   edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE;
>   if (edge) {
> - status = readl(stat_reg);
> -
> - status |= (1 << (d->hwirq & 0x1f));
> - writel(status, stat_reg);
> + writel(BIT(d->hwirq & 0x1f), stat_reg);
>   } else {
>   dctr = readb(base + VT8500_ICDC + d->hwirq);
>   dctr &= ~VT8500_INT_ENABLE;
> -- 
> 1.8.3.2
> 
> 
> 
> 
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[PATCH v2] irqchip: vt8500: Switch to a simple write clear for Interrupt Status Register

2014-04-27 Thread Axel Lin 
According to the datasheet, the attribute of Interrupt Status Register is RW0S,
which means:
Software can read the register.
Software can also "write 1 to clear". "write 0" has no effect.

So the read/modify/write cycle is no necessary, switch to a simple write clear
instead.

Signed-off-by: Axel Lin 
---
v2: Update commit log, this is a code simplification rather than bug fix.
 drivers/irqchip/irq-vt8500.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-vt8500.c b/drivers/irqchip/irq-vt8500.c
index eb6e91e..a0085bc 100644
--- a/drivers/irqchip/irq-vt8500.c
+++ b/drivers/irqchip/irq-vt8500.c
@@ -87,14 +87,10 @@ static void vt8500_irq_mask(struct irq_data *d)
void __iomem *base = priv->base;
void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4);
u8 edge, dctr;
-   u32 status;
 
edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE;
if (edge) {
-   status = readl(stat_reg);
-
-   status |= (1 << (d->hwirq & 0x1f));
-   writel(status, stat_reg);
+   writel(BIT(d->hwirq & 0x1f), stat_reg);
} else {
dctr = readb(base + VT8500_ICDC + d->hwirq);
dctr &= ~VT8500_INT_ENABLE;
-- 
1.8.3.2



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