Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
Hi, On Thursday 11 June 2015 09:04 PM, Evgeniy Polyakov wrote: > Hi > > 25.05.2015, 08:15, "Vignesh R" : >>> HDQ mode remains unchanged. >>> >>> Signed-off-by: Vignesh R > > I have no experience with omap_hdq platform, but there are quite a few > questions > related to IO - you never check whether write was successful or read returned > actually > valid data, is it ok? I mean is it correct to assume that read can not return > 0xff for example > and it is a sign that something is wrong, or this can not happen? > Referring to AM437x TRM SPRUHL7C (www.ti.com/lit/ug/spruhl7c/spruhl7c.pdf) section 23.3.5.4, Successful or failed completion is not indicated for write operation, so there is no way to verify whether write succeeded (though TX_COMPLETE interrupt bit is set on transaction completion). But, as for as read operation is concerned, the TRM says, if RX_COMPLETE bit is set, then read is successful and I think that implies valid data is present in RX reg. My patch does look for TX/RX_COMPLETE bits to be set after write/read operations. > As for me, I have no objection, but this patch must go via omap tree imo. > Andrew Morton has already picked this patch (its on linux-next). Although he has a minor comment on use of mutex_lock_interruptible. But that comment applies to many places in the existing driver code. I plan to cleanup all those mutex calls in near future. Regards Vignesh -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
Hi 25.05.2015, 08:15, "Vignesh R" : >> HDQ mode remains unchanged. >> >> Signed-off-by: Vignesh R I have no experience with omap_hdq platform, but there are quite a few questions related to IO - you never check whether write was successful or read returned actually valid data, is it ok? I mean is it correct to assume that read can not return 0xff for example and it is a sign that something is wrong, or this can not happen? As for me, I have no objection, but this patch must go via omap tree imo. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
Hi, On Thursday 11 June 2015 09:04 PM, Evgeniy Polyakov wrote: Hi 25.05.2015, 08:15, Vignesh R vigne...@ti.com: HDQ mode remains unchanged. Signed-off-by: Vignesh R vigne...@ti.com I have no experience with omap_hdq platform, but there are quite a few questions related to IO - you never check whether write was successful or read returned actually valid data, is it ok? I mean is it correct to assume that read can not return 0xff for example and it is a sign that something is wrong, or this can not happen? Referring to AM437x TRM SPRUHL7C (www.ti.com/lit/ug/spruhl7c/spruhl7c.pdf) section 23.3.5.4, Successful or failed completion is not indicated for write operation, so there is no way to verify whether write succeeded (though TX_COMPLETE interrupt bit is set on transaction completion). But, as for as read operation is concerned, the TRM says, if RX_COMPLETE bit is set, then read is successful and I think that implies valid data is present in RX reg. My patch does look for TX/RX_COMPLETE bits to be set after write/read operations. As for me, I have no objection, but this patch must go via omap tree imo. Andrew Morton has already picked this patch (its on linux-next). Although he has a minor comment on use of mutex_lock_interruptible. But that comment applies to many places in the existing driver code. I plan to cleanup all those mutex calls in near future. Regards Vignesh -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
Hi 25.05.2015, 08:15, Vignesh R vigne...@ti.com: HDQ mode remains unchanged. Signed-off-by: Vignesh R vigne...@ti.com I have no experience with omap_hdq platform, but there are quite a few questions related to IO - you never check whether write was successful or read returned actually valid data, is it ok? I mean is it correct to assume that read can not return 0xff for example and it is a sign that something is wrong, or this can not happen? As for me, I have no objection, but this patch must go via omap tree imo. -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
On Mon, 18 May 2015 17:39:19 +0530 Vignesh R wrote:
> This patches makes following changes to omap_hdq driver
> - Enable 1-wire mode.
> - Implement w1_triplet callback to facilitate search rom
>procedure and auto detection of 1-wire slaves.
> - Proper enabling and disabling of interrupt.
> - Cleanups (formatting and return value checks).
>
> HDQ mode remains unchanged.
>
> ...
>
> +/*
> + * W1 triplet callback function - used for searching ROM addresses.
> + * Registered only when controller is in 1-wire mode.
> + */
> +static u8 omap_w1_triplet(void *_hdq, u8 bdir)
> +{
> + u8 id_bit, comp_bit;
> + int err;
> + u8 ret = 0x3; /* no slaves responded */
> + struct hdq_data *hdq_data = _hdq;
> + u8 ctrl = OMAP_HDQ_CTRL_STATUS_SINGLE | OMAP_HDQ_CTRL_STATUS_GO |
> + OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK;
> + u8 mask = ctrl | OMAP_HDQ_CTRL_STATUS_DIR;
> +
> + omap_hdq_get(_hdq);
> +
> + err = mutex_lock_interruptible(_data->hdq_mutex);
> + if (err < 0) {
> + dev_dbg(hdq_data->dev, "Could not acquire mutex\n");
> + goto rtn;
> + }
The use of mutex_lock_interruptible() seems like a bad idea. It means
that if the calling process (modprobe?) has a signal pending,
w1_search() will think that "no device responded". That isn't really
true - a true statement is "user hit ^C". I'm not sure what the
overall runtime effect of this will be, but I bet it hasn't been
tested!
Wouldn't it be saner/safer to use plain old mutex_lock() here?
--
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the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
On Mon, 18 May 2015 17:39:19 +0530 Vignesh R vigne...@ti.com wrote:
This patches makes following changes to omap_hdq driver
- Enable 1-wire mode.
- Implement w1_triplet callback to facilitate search rom
procedure and auto detection of 1-wire slaves.
- Proper enabling and disabling of interrupt.
- Cleanups (formatting and return value checks).
HDQ mode remains unchanged.
...
+/*
+ * W1 triplet callback function - used for searching ROM addresses.
+ * Registered only when controller is in 1-wire mode.
+ */
+static u8 omap_w1_triplet(void *_hdq, u8 bdir)
+{
+ u8 id_bit, comp_bit;
+ int err;
+ u8 ret = 0x3; /* no slaves responded */
+ struct hdq_data *hdq_data = _hdq;
+ u8 ctrl = OMAP_HDQ_CTRL_STATUS_SINGLE | OMAP_HDQ_CTRL_STATUS_GO |
+ OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK;
+ u8 mask = ctrl | OMAP_HDQ_CTRL_STATUS_DIR;
+
+ omap_hdq_get(_hdq);
+
+ err = mutex_lock_interruptible(hdq_data-hdq_mutex);
+ if (err 0) {
+ dev_dbg(hdq_data-dev, Could not acquire mutex\n);
+ goto rtn;
+ }
The use of mutex_lock_interruptible() seems like a bad idea. It means
that if the calling process (modprobe?) has a signal pending,
w1_search() will think that no device responded. That isn't really
true - a true statement is user hit ^C. I'm not sure what the
overall runtime effect of this will be, but I bet it hasn't been
tested!
Wouldn't it be saner/safer to use plain old mutex_lock() here?
--
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
On Monday 18 May 2015 05:39 PM, Vignesh R wrote:
> This patches makes following changes to omap_hdq driver
> - Enable 1-wire mode.
> - Implement w1_triplet callback to facilitate search rom
>procedure and auto detection of 1-wire slaves.
> - Proper enabling and disabling of interrupt.
> - Cleanups (formatting and return value checks).
>
> HDQ mode remains unchanged.
>
> Signed-off-by: Vignesh R
> ---
Gentle ping...
>
> v2:
> * report error if RX/TX_COMPLETE times out.
>
> Documentation/devicetree/bindings/w1/omap-hdq.txt | 7 +-
> Documentation/w1/masters/omap-hdq | 6 +
> drivers/w1/masters/omap_hdq.c | 224
> ++
> 3 files changed, 203 insertions(+), 34 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/w1/omap-hdq.txt
> b/Documentation/devicetree/bindings/w1/omap-hdq.txt
> index fef794741bd1..913c5f91a0f9 100644
> --- a/Documentation/devicetree/bindings/w1/omap-hdq.txt
> +++ b/Documentation/devicetree/bindings/w1/omap-hdq.txt
> @@ -1,11 +1,15 @@
> * OMAP HDQ One wire bus master controller
>
> Required properties:
> -- compatible : should be "ti,omap3-1w"
> +- compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
> - reg : Address and length of the register set for the device
> - interrupts : interrupt line.
> - ti,hwmods : "hdq1w"
>
> +Optional properties:
> +- ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
> +If not specified HDQ mode is implied.
> +
> Example:
>
> - From omap3.dtsi
> @@ -14,4 +18,5 @@ Example:
> reg = <0x480b2000 0x1000>;
> interrupts = <58>;
> ti,hwmods = "hdq1w";
> + ti,mode = "hdq";
>};
> diff --git a/Documentation/w1/masters/omap-hdq
> b/Documentation/w1/masters/omap-hdq
> index 884dc284b215..234522709a5f 100644
> --- a/Documentation/w1/masters/omap-hdq
> +++ b/Documentation/w1/masters/omap-hdq
> @@ -44,3 +44,9 @@ e.g:
> insmod omap_hdq.ko W1_ID=2
> inamod w1_bq27000.ko F_ID=2
>
> +The driver also supports 1-wire mode. In this mode, there is no need to
> +pass slave ID as parameter. The driver will auto-detect slaves connected
> +to the bus using SEARCH_ROM procedure. 1-wire mode can be selected by
> +setting "ti,mode" property to "1w" in DT (see
> +Documentation/devicetree/bindings/w1/omap-hdq.txt for more details).
> +By default driver is in HDQ mode.
> diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
> index e7d448963a24..0e2f43bccf1f 100644
> --- a/drivers/w1/masters/omap_hdq.c
> +++ b/drivers/w1/masters/omap_hdq.c
> @@ -17,6 +17,7 @@
> #include
> #include
> #include
> +#include
>
> #include "../w1.h"
> #include "../w1_int.h"
> @@ -27,21 +28,23 @@
> #define OMAP_HDQ_TX_DATA 0x04
> #define OMAP_HDQ_RX_DATA 0x08
> #define OMAP_HDQ_CTRL_STATUS 0x0c
> -#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK (1<<6)
> -#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE (1<<5)
> -#define OMAP_HDQ_CTRL_STATUS_GO (1<<4)
> -#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION (1<<2)
> -#define OMAP_HDQ_CTRL_STATUS_DIR (1<<1)
> -#define OMAP_HDQ_CTRL_STATUS_MODE(1<<0)
> +#define OMAP_HDQ_CTRL_STATUS_SINGLE BIT(7)
> +#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK BIT(6)
> +#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE BIT(5)
> +#define OMAP_HDQ_CTRL_STATUS_GO BIT(4)
> +#define OMAP_HDQ_CTRL_STATUS_PRESENCEBIT(3)
> +#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION BIT(2)
> +#define OMAP_HDQ_CTRL_STATUS_DIR BIT(1)
> #define OMAP_HDQ_INT_STATUS 0x10
> -#define OMAP_HDQ_INT_STATUS_TXCOMPLETE (1<<2)
> -#define OMAP_HDQ_INT_STATUS_RXCOMPLETE (1<<1)
> -#define OMAP_HDQ_INT_STATUS_TIMEOUT (1<<0)
> +#define OMAP_HDQ_INT_STATUS_TXCOMPLETE BIT(2)
> +#define OMAP_HDQ_INT_STATUS_RXCOMPLETE BIT(1)
> +#define OMAP_HDQ_INT_STATUS_TIMEOUT BIT(0)
> #define OMAP_HDQ_SYSCONFIG 0x14
> -#define OMAP_HDQ_SYSCONFIG_SOFTRESET (1<<1)
> -#define OMAP_HDQ_SYSCONFIG_AUTOIDLE (1<<0)
> +#define OMAP_HDQ_SYSCONFIG_SOFTRESET BIT(1)
> +#define OMAP_HDQ_SYSCONFIG_AUTOIDLE BIT(0)
> +#define OMAP_HDQ_SYSCONFIG_NOIDLE0x0
> #define OMAP_HDQ_SYSSTATUS 0x18
> -#define OMAP_HDQ_SYSSTATUS_RESETDONE (1<<0)
> +#define OMAP_HDQ_SYSSTATUS_RESETDONE BIT(0)
>
> #define OMAP_HDQ_FLAG_CLEAR 0
> #define OMAP_HDQ_FLAG_SET1
> @@ -67,6 +70,10 @@ struct hdq_data {
>* the data wrire or read.
>*/
> int init_trans;
> + int rrw;
> + /* mode: 0-HDQ 1-W1 */
> + int mode;
> +
> };
>
> static int omap_hdq_probe(struct platform_device *pdev);
> @@ -74,6 +81,7 @@ static int omap_hdq_remove(struct platform_device
Re: [PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
On Monday 18 May 2015 05:39 PM, Vignesh R wrote:
This patches makes following changes to omap_hdq driver
- Enable 1-wire mode.
- Implement w1_triplet callback to facilitate search rom
procedure and auto detection of 1-wire slaves.
- Proper enabling and disabling of interrupt.
- Cleanups (formatting and return value checks).
HDQ mode remains unchanged.
Signed-off-by: Vignesh R vigne...@ti.com
---
Gentle ping...
v2:
* report error if RX/TX_COMPLETE times out.
Documentation/devicetree/bindings/w1/omap-hdq.txt | 7 +-
Documentation/w1/masters/omap-hdq | 6 +
drivers/w1/masters/omap_hdq.c | 224
++
3 files changed, 203 insertions(+), 34 deletions(-)
diff --git a/Documentation/devicetree/bindings/w1/omap-hdq.txt
b/Documentation/devicetree/bindings/w1/omap-hdq.txt
index fef794741bd1..913c5f91a0f9 100644
--- a/Documentation/devicetree/bindings/w1/omap-hdq.txt
+++ b/Documentation/devicetree/bindings/w1/omap-hdq.txt
@@ -1,11 +1,15 @@
* OMAP HDQ One wire bus master controller
Required properties:
-- compatible : should be ti,omap3-1w
+- compatible : should be ti,omap3-1w or ti,am4372-hdq
- reg : Address and length of the register set for the device
- interrupts : interrupt line.
- ti,hwmods : hdq1w
+Optional properties:
+- ti,mode: should be hdq: HDQ mode 1w: one-wire mode.
+If not specified HDQ mode is implied.
+
Example:
- From omap3.dtsi
@@ -14,4 +18,5 @@ Example:
reg = 0x480b2000 0x1000;
interrupts = 58;
ti,hwmods = hdq1w;
+ ti,mode = hdq;
};
diff --git a/Documentation/w1/masters/omap-hdq
b/Documentation/w1/masters/omap-hdq
index 884dc284b215..234522709a5f 100644
--- a/Documentation/w1/masters/omap-hdq
+++ b/Documentation/w1/masters/omap-hdq
@@ -44,3 +44,9 @@ e.g:
insmod omap_hdq.ko W1_ID=2
inamod w1_bq27000.ko F_ID=2
+The driver also supports 1-wire mode. In this mode, there is no need to
+pass slave ID as parameter. The driver will auto-detect slaves connected
+to the bus using SEARCH_ROM procedure. 1-wire mode can be selected by
+setting ti,mode property to 1w in DT (see
+Documentation/devicetree/bindings/w1/omap-hdq.txt for more details).
+By default driver is in HDQ mode.
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
index e7d448963a24..0e2f43bccf1f 100644
--- a/drivers/w1/masters/omap_hdq.c
+++ b/drivers/w1/masters/omap_hdq.c
@@ -17,6 +17,7 @@
#include linux/io.h
#include linux/sched.h
#include linux/pm_runtime.h
+#include linux/of.h
#include ../w1.h
#include ../w1_int.h
@@ -27,21 +28,23 @@
#define OMAP_HDQ_TX_DATA 0x04
#define OMAP_HDQ_RX_DATA 0x08
#define OMAP_HDQ_CTRL_STATUS 0x0c
-#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK (16)
-#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE (15)
-#define OMAP_HDQ_CTRL_STATUS_GO (14)
-#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION (12)
-#define OMAP_HDQ_CTRL_STATUS_DIR (11)
-#define OMAP_HDQ_CTRL_STATUS_MODE(10)
+#define OMAP_HDQ_CTRL_STATUS_SINGLE BIT(7)
+#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK BIT(6)
+#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE BIT(5)
+#define OMAP_HDQ_CTRL_STATUS_GO BIT(4)
+#define OMAP_HDQ_CTRL_STATUS_PRESENCEBIT(3)
+#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION BIT(2)
+#define OMAP_HDQ_CTRL_STATUS_DIR BIT(1)
#define OMAP_HDQ_INT_STATUS 0x10
-#define OMAP_HDQ_INT_STATUS_TXCOMPLETE (12)
-#define OMAP_HDQ_INT_STATUS_RXCOMPLETE (11)
-#define OMAP_HDQ_INT_STATUS_TIMEOUT (10)
+#define OMAP_HDQ_INT_STATUS_TXCOMPLETE BIT(2)
+#define OMAP_HDQ_INT_STATUS_RXCOMPLETE BIT(1)
+#define OMAP_HDQ_INT_STATUS_TIMEOUT BIT(0)
#define OMAP_HDQ_SYSCONFIG 0x14
-#define OMAP_HDQ_SYSCONFIG_SOFTRESET (11)
-#define OMAP_HDQ_SYSCONFIG_AUTOIDLE (10)
+#define OMAP_HDQ_SYSCONFIG_SOFTRESET BIT(1)
+#define OMAP_HDQ_SYSCONFIG_AUTOIDLE BIT(0)
+#define OMAP_HDQ_SYSCONFIG_NOIDLE0x0
#define OMAP_HDQ_SYSSTATUS 0x18
-#define OMAP_HDQ_SYSSTATUS_RESETDONE (10)
+#define OMAP_HDQ_SYSSTATUS_RESETDONE BIT(0)
#define OMAP_HDQ_FLAG_CLEAR 0
#define OMAP_HDQ_FLAG_SET1
@@ -67,6 +70,10 @@ struct hdq_data {
* the data wrire or read.
*/
int init_trans;
+ int rrw;
+ /* mode: 0-HDQ 1-W1 */
+ int mode;
+
};
static int omap_hdq_probe(struct platform_device *pdev);
@@ -74,6 +81,7 @@ static int omap_hdq_remove(struct platform_device *pdev);
static const struct of_device_id omap_hdq_dt_ids[] = {
{ .compatible = ti,omap3-1w },
+
[PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
This patches makes following changes to omap_hdq driver
- Enable 1-wire mode.
- Implement w1_triplet callback to facilitate search rom
procedure and auto detection of 1-wire slaves.
- Proper enabling and disabling of interrupt.
- Cleanups (formatting and return value checks).
HDQ mode remains unchanged.
Signed-off-by: Vignesh R
---
v2:
* report error if RX/TX_COMPLETE times out.
Documentation/devicetree/bindings/w1/omap-hdq.txt | 7 +-
Documentation/w1/masters/omap-hdq | 6 +
drivers/w1/masters/omap_hdq.c | 224 ++
3 files changed, 203 insertions(+), 34 deletions(-)
diff --git a/Documentation/devicetree/bindings/w1/omap-hdq.txt
b/Documentation/devicetree/bindings/w1/omap-hdq.txt
index fef794741bd1..913c5f91a0f9 100644
--- a/Documentation/devicetree/bindings/w1/omap-hdq.txt
+++ b/Documentation/devicetree/bindings/w1/omap-hdq.txt
@@ -1,11 +1,15 @@
* OMAP HDQ One wire bus master controller
Required properties:
-- compatible : should be "ti,omap3-1w"
+- compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
- reg : Address and length of the register set for the device
- interrupts : interrupt line.
- ti,hwmods : "hdq1w"
+Optional properties:
+- ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
+ If not specified HDQ mode is implied.
+
Example:
- From omap3.dtsi
@@ -14,4 +18,5 @@ Example:
reg = <0x480b2000 0x1000>;
interrupts = <58>;
ti,hwmods = "hdq1w";
+ ti,mode = "hdq";
};
diff --git a/Documentation/w1/masters/omap-hdq
b/Documentation/w1/masters/omap-hdq
index 884dc284b215..234522709a5f 100644
--- a/Documentation/w1/masters/omap-hdq
+++ b/Documentation/w1/masters/omap-hdq
@@ -44,3 +44,9 @@ e.g:
insmod omap_hdq.ko W1_ID=2
inamod w1_bq27000.ko F_ID=2
+The driver also supports 1-wire mode. In this mode, there is no need to
+pass slave ID as parameter. The driver will auto-detect slaves connected
+to the bus using SEARCH_ROM procedure. 1-wire mode can be selected by
+setting "ti,mode" property to "1w" in DT (see
+Documentation/devicetree/bindings/w1/omap-hdq.txt for more details).
+By default driver is in HDQ mode.
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
index e7d448963a24..0e2f43bccf1f 100644
--- a/drivers/w1/masters/omap_hdq.c
+++ b/drivers/w1/masters/omap_hdq.c
@@ -17,6 +17,7 @@
#include
#include
#include
+#include
#include "../w1.h"
#include "../w1_int.h"
@@ -27,21 +28,23 @@
#define OMAP_HDQ_TX_DATA 0x04
#define OMAP_HDQ_RX_DATA 0x08
#define OMAP_HDQ_CTRL_STATUS 0x0c
-#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK (1<<6)
-#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE (1<<5)
-#define OMAP_HDQ_CTRL_STATUS_GO(1<<4)
-#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION(1<<2)
-#define OMAP_HDQ_CTRL_STATUS_DIR (1<<1)
-#define OMAP_HDQ_CTRL_STATUS_MODE (1<<0)
+#define OMAP_HDQ_CTRL_STATUS_SINGLEBIT(7)
+#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK BIT(6)
+#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE BIT(5)
+#define OMAP_HDQ_CTRL_STATUS_GO BIT(4)
+#define OMAP_HDQ_CTRL_STATUS_PRESENCE BIT(3)
+#define OMAP_HDQ_CTRL_STATUS_INITIALIZATIONBIT(2)
+#define OMAP_HDQ_CTRL_STATUS_DIR BIT(1)
#define OMAP_HDQ_INT_STATUS0x10
-#define OMAP_HDQ_INT_STATUS_TXCOMPLETE (1<<2)
-#define OMAP_HDQ_INT_STATUS_RXCOMPLETE (1<<1)
-#define OMAP_HDQ_INT_STATUS_TIMEOUT(1<<0)
+#define OMAP_HDQ_INT_STATUS_TXCOMPLETE BIT(2)
+#define OMAP_HDQ_INT_STATUS_RXCOMPLETE BIT(1)
+#define OMAP_HDQ_INT_STATUS_TIMEOUTBIT(0)
#define OMAP_HDQ_SYSCONFIG 0x14
-#define OMAP_HDQ_SYSCONFIG_SOFTRESET (1<<1)
-#define OMAP_HDQ_SYSCONFIG_AUTOIDLE(1<<0)
+#define OMAP_HDQ_SYSCONFIG_SOFTRESET BIT(1)
+#define OMAP_HDQ_SYSCONFIG_AUTOIDLEBIT(0)
+#define OMAP_HDQ_SYSCONFIG_NOIDLE 0x0
#define OMAP_HDQ_SYSSTATUS 0x18
-#define OMAP_HDQ_SYSSTATUS_RESETDONE (1<<0)
+#define OMAP_HDQ_SYSSTATUS_RESETDONE BIT(0)
#define OMAP_HDQ_FLAG_CLEAR0
#define OMAP_HDQ_FLAG_SET 1
@@ -67,6 +70,10 @@ struct hdq_data {
* the data wrire or read.
*/
int init_trans;
+ int rrw;
+ /* mode: 0-HDQ 1-W1 */
+ int mode;
+
};
static int omap_hdq_probe(struct platform_device *pdev);
@@ -74,6 +81,7 @@ static int omap_hdq_remove(struct platform_device *pdev);
static const struct of_device_id omap_hdq_dt_ids[] = {
{ .compatible = "ti,omap3-1w" },
+ { .compatible = "ti,am4372-hdq" },
{}
};
MODULE_DEVICE_TABLE(of, omap_hdq_dt_ids);
@@ -90,15 +98,12 @@ static struct platform_driver
[PATCH v2] w1: masters: omap_hdq: Add support for 1-wire mode
This patches makes following changes to omap_hdq driver
- Enable 1-wire mode.
- Implement w1_triplet callback to facilitate search rom
procedure and auto detection of 1-wire slaves.
- Proper enabling and disabling of interrupt.
- Cleanups (formatting and return value checks).
HDQ mode remains unchanged.
Signed-off-by: Vignesh R vigne...@ti.com
---
v2:
* report error if RX/TX_COMPLETE times out.
Documentation/devicetree/bindings/w1/omap-hdq.txt | 7 +-
Documentation/w1/masters/omap-hdq | 6 +
drivers/w1/masters/omap_hdq.c | 224 ++
3 files changed, 203 insertions(+), 34 deletions(-)
diff --git a/Documentation/devicetree/bindings/w1/omap-hdq.txt
b/Documentation/devicetree/bindings/w1/omap-hdq.txt
index fef794741bd1..913c5f91a0f9 100644
--- a/Documentation/devicetree/bindings/w1/omap-hdq.txt
+++ b/Documentation/devicetree/bindings/w1/omap-hdq.txt
@@ -1,11 +1,15 @@
* OMAP HDQ One wire bus master controller
Required properties:
-- compatible : should be ti,omap3-1w
+- compatible : should be ti,omap3-1w or ti,am4372-hdq
- reg : Address and length of the register set for the device
- interrupts : interrupt line.
- ti,hwmods : hdq1w
+Optional properties:
+- ti,mode: should be hdq: HDQ mode 1w: one-wire mode.
+ If not specified HDQ mode is implied.
+
Example:
- From omap3.dtsi
@@ -14,4 +18,5 @@ Example:
reg = 0x480b2000 0x1000;
interrupts = 58;
ti,hwmods = hdq1w;
+ ti,mode = hdq;
};
diff --git a/Documentation/w1/masters/omap-hdq
b/Documentation/w1/masters/omap-hdq
index 884dc284b215..234522709a5f 100644
--- a/Documentation/w1/masters/omap-hdq
+++ b/Documentation/w1/masters/omap-hdq
@@ -44,3 +44,9 @@ e.g:
insmod omap_hdq.ko W1_ID=2
inamod w1_bq27000.ko F_ID=2
+The driver also supports 1-wire mode. In this mode, there is no need to
+pass slave ID as parameter. The driver will auto-detect slaves connected
+to the bus using SEARCH_ROM procedure. 1-wire mode can be selected by
+setting ti,mode property to 1w in DT (see
+Documentation/devicetree/bindings/w1/omap-hdq.txt for more details).
+By default driver is in HDQ mode.
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
index e7d448963a24..0e2f43bccf1f 100644
--- a/drivers/w1/masters/omap_hdq.c
+++ b/drivers/w1/masters/omap_hdq.c
@@ -17,6 +17,7 @@
#include linux/io.h
#include linux/sched.h
#include linux/pm_runtime.h
+#include linux/of.h
#include ../w1.h
#include ../w1_int.h
@@ -27,21 +28,23 @@
#define OMAP_HDQ_TX_DATA 0x04
#define OMAP_HDQ_RX_DATA 0x08
#define OMAP_HDQ_CTRL_STATUS 0x0c
-#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK (16)
-#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE (15)
-#define OMAP_HDQ_CTRL_STATUS_GO(14)
-#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION(12)
-#define OMAP_HDQ_CTRL_STATUS_DIR (11)
-#define OMAP_HDQ_CTRL_STATUS_MODE (10)
+#define OMAP_HDQ_CTRL_STATUS_SINGLEBIT(7)
+#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK BIT(6)
+#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE BIT(5)
+#define OMAP_HDQ_CTRL_STATUS_GO BIT(4)
+#define OMAP_HDQ_CTRL_STATUS_PRESENCE BIT(3)
+#define OMAP_HDQ_CTRL_STATUS_INITIALIZATIONBIT(2)
+#define OMAP_HDQ_CTRL_STATUS_DIR BIT(1)
#define OMAP_HDQ_INT_STATUS0x10
-#define OMAP_HDQ_INT_STATUS_TXCOMPLETE (12)
-#define OMAP_HDQ_INT_STATUS_RXCOMPLETE (11)
-#define OMAP_HDQ_INT_STATUS_TIMEOUT(10)
+#define OMAP_HDQ_INT_STATUS_TXCOMPLETE BIT(2)
+#define OMAP_HDQ_INT_STATUS_RXCOMPLETE BIT(1)
+#define OMAP_HDQ_INT_STATUS_TIMEOUTBIT(0)
#define OMAP_HDQ_SYSCONFIG 0x14
-#define OMAP_HDQ_SYSCONFIG_SOFTRESET (11)
-#define OMAP_HDQ_SYSCONFIG_AUTOIDLE(10)
+#define OMAP_HDQ_SYSCONFIG_SOFTRESET BIT(1)
+#define OMAP_HDQ_SYSCONFIG_AUTOIDLEBIT(0)
+#define OMAP_HDQ_SYSCONFIG_NOIDLE 0x0
#define OMAP_HDQ_SYSSTATUS 0x18
-#define OMAP_HDQ_SYSSTATUS_RESETDONE (10)
+#define OMAP_HDQ_SYSSTATUS_RESETDONE BIT(0)
#define OMAP_HDQ_FLAG_CLEAR0
#define OMAP_HDQ_FLAG_SET 1
@@ -67,6 +70,10 @@ struct hdq_data {
* the data wrire or read.
*/
int init_trans;
+ int rrw;
+ /* mode: 0-HDQ 1-W1 */
+ int mode;
+
};
static int omap_hdq_probe(struct platform_device *pdev);
@@ -74,6 +81,7 @@ static int omap_hdq_remove(struct platform_device *pdev);
static const struct of_device_id omap_hdq_dt_ids[] = {
{ .compatible = ti,omap3-1w },
+ { .compatible = ti,am4372-hdq },
{}
};
MODULE_DEVICE_TABLE(of, omap_hdq_dt_ids);
@@ -90,15 +98,12 @@ static struct platform_driver
