Re: [PATCH v2 0/2] clk: meson: g12a: add MIPI DSI Host Pixel Clock

[Jerome Brunet]

On Thu 26 Nov 2020 at 15:15, Neil Armstrong  wrote:

> This serie adss the MIPI DSI Host Pixel Clock used to feed the DSI pixel
> clock to the DSI Host controller.
>
> Unlike the AXG SoC, the DSI Pixel Clock has a supplementary mux, divider and 
> gate
> stage before feeding the pixel clock to the MIPI DSI Host controller.
>
> Changes since v1 at [1]:
> - switch g12a_mipi_dsi_pxclk_sel flags to CLK_SET_RATE_NO_REPARENT
> - fix aligment of g12a_mipi_dsi_pxclk_div & g12a_mipi_dsi_pxclk parent_hws
>
> [1] https://lore.kernel.org/r/20201123163811.353444-1-narmstr...@baylibre.com
>
> Neil Armstrong (2):
>   dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
>   clk: meson: g12a: add MIPI DSI Host Pixel Clock
>
>  drivers/clk/meson/g12a.c  | 74 +++
>  drivers/clk/meson/g12a.h  |  3 +-
>  include/dt-bindings/clock/g12a-clkc.h |  2 +
>  3 files changed, 78 insertions(+), 1 deletion(-)

Applied, Thx

[PATCH v2 0/2] clk: meson: g12a: add MIPI DSI Host Pixel Clock

[Neil Armstrong]

This serie adss the MIPI DSI Host Pixel Clock used to feed the DSI pixel
clock to the DSI Host controller.

Unlike the AXG SoC, the DSI Pixel Clock has a supplementary mux, divider and 
gate
stage before feeding the pixel clock to the MIPI DSI Host controller.

Changes since v1 at [1]:
- switch g12a_mipi_dsi_pxclk_sel flags to CLK_SET_RATE_NO_REPARENT
- fix aligment of g12a_mipi_dsi_pxclk_div & g12a_mipi_dsi_pxclk parent_hws

[1] https://lore.kernel.org/r/20201123163811.353444-1-narmstr...@baylibre.com

Neil Armstrong (2):
  dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
  clk: meson: g12a: add MIPI DSI Host Pixel Clock

 drivers/clk/meson/g12a.c  | 74 +++
 drivers/clk/meson/g12a.h  |  3 +-
 include/dt-bindings/clock/g12a-clkc.h |  2 +
 3 files changed, 78 insertions(+), 1 deletion(-)

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2.25.1