[PATCH v2 03/10] ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem

2012-11-07 Thread Philip, Avinash
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP & EHRPWM).
To handle resource sharing & IP integration
1. Rework on parent child relation between PWMSS and
   ECAP, EQEP & EHRPWM child devices to support runtime PM.
2. Add support for opt_clks in EHRPWM HWMOD entry to handle additional
   clock gating from control module.
3. Add HWMOD entries for EQEP PWM submodule.

Signed-off-by: Philip, Avinash 
---
Changes since v1:
- Remove ADDR_TYPE_RT for PWM sub module register entries.

:100644 100644 ad8d43b... de2301c... M  
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
 arch/arm/mach-omap2/omap_hwmod_33xx_data.c |  419 ++--
 1 files changed, 276 insertions(+), 143 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index ad8d43b..de2301c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -768,9 +768,7 @@ static struct omap_hwmod am33xx_elm_hwmod = {
},
 };
 
-/*
- * 'epwmss' class: ecap0,1,2,  ehrpwm0,1,2
- */
+/* pwmss */
 static struct omap_hwmod_class_sysconfig am33xx_epwmss_sysc = {
.rev_offs   = 0x0,
.sysc_offs  = 0x4,
@@ -786,18 +784,23 @@ static struct omap_hwmod_class am33xx_epwmss_hwmod_class 
= {
.sysc   = _epwmss_sysc,
 };
 
-/* ehrpwm0 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
-   { .name = "int", .irq = 86 + OMAP_INTC_START, },
-   { .name = "tzint", .irq = 58 + OMAP_INTC_START, },
-   { .irq = -1 },
+
+static struct omap_hwmod_class am33xx_ecap_hwmod_class = {
+   .name   = "ecap",
 };
 
-static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
-   .name   = "ehrpwm0",
+static struct omap_hwmod_class am33xx_eqep_hwmod_class = {
+   .name   = "eqep",
+};
+
+static struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = {
+   .name   = "ehrpwm",
+};
+/* epwmss0 */
+static struct omap_hwmod am33xx_epwmss0_hwmod = {
+   .name   = "epwmss0",
.class  = _epwmss_hwmod_class,
.clkdm_name = "l4ls_clkdm",
-   .mpu_irqs   = am33xx_ehrpwm0_irqs,
.main_clk   = "l4ls_gclk",
.prcm   = {
.omap4  = {
@@ -807,63 +810,68 @@ static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
},
 };
 
-/* ehrpwm1 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = {
-   { .name = "int", .irq = 87 + OMAP_INTC_START, },
-   { .name = "tzint", .irq = 59 + OMAP_INTC_START, },
+/* ecap0 */
+static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
+   { .irq = 31 + OMAP_INTC_START, },
{ .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ehrpwm1_hwmod = {
-   .name   = "ehrpwm1",
-   .class  = _epwmss_hwmod_class,
+static struct omap_hwmod am33xx_ecap0_hwmod = {
+   .name   = "ecap0",
+   .class  = _ecap_hwmod_class,
.clkdm_name = "l4ls_clkdm",
-   .mpu_irqs   = am33xx_ehrpwm1_irqs,
+   .mpu_irqs   = am33xx_ecap0_irqs,
.main_clk   = "l4ls_gclk",
-   .prcm   = {
-   .omap4  = {
-   .clkctrl_offs   = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET,
-   .modulemode = MODULEMODE_SWCTRL,
-   },
-   },
 };
 
-/* ehrpwm2 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = {
-   { .name = "int", .irq = 39 + OMAP_INTC_START, },
-   { .name = "tzint", .irq = 60 + OMAP_INTC_START, },
+/* eqep0 */
+static struct omap_hwmod_irq_info am33xx_eqep0_irqs[] = {
+   { .irq = 79 + OMAP_INTC_START, },
{ .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ehrpwm2_hwmod = {
-   .name   = "ehrpwm2",
-   .class  = _epwmss_hwmod_class,
+static struct omap_hwmod am33xx_eqep0_hwmod = {
+   .name   = "eqep0",
+   .class  = _eqep_hwmod_class,
.clkdm_name = "l4ls_clkdm",
-   .mpu_irqs   = am33xx_ehrpwm2_irqs,
+   .mpu_irqs   = am33xx_eqep0_irqs,
.main_clk   = "l4ls_gclk",
-   .prcm   = {
-   .omap4  = {
-   .clkctrl_offs   = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET,
-   .modulemode = MODULEMODE_SWCTRL,
-   },
-   },
 };
 
-/* ecap0 */
-static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
-   { .irq = 31 + OMAP_INTC_START, },
+/* ehrpwm0 */
+static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
+   { .name = "int", .irq = 86 + OMAP_INTC_START, },
+   { .name = "tzint", .irq = 58 + OMAP_INTC_START, },
{ .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ecap0_hwmod = {
-   .name   = "ecap0",
+/*
+ * Optional clock entry is provided to support additional clock
+ * gating for EHRPWM module functional from control module.
+ 

[PATCH v2 03/10] ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem

2012-11-07 Thread Philip, Avinash
As part of PWM subsystem integration, PWM subsystem are sharing
resources like clock across submodules (ECAP, EQEP  EHRPWM).
To handle resource sharing  IP integration
1. Rework on parent child relation between PWMSS and
   ECAP, EQEP  EHRPWM child devices to support runtime PM.
2. Add support for opt_clks in EHRPWM HWMOD entry to handle additional
   clock gating from control module.
3. Add HWMOD entries for EQEP PWM submodule.

Signed-off-by: Philip, Avinash avinashphi...@ti.com
---
Changes since v1:
- Remove ADDR_TYPE_RT for PWM sub module register entries.

:100644 100644 ad8d43b... de2301c... M  
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
 arch/arm/mach-omap2/omap_hwmod_33xx_data.c |  419 ++--
 1 files changed, 276 insertions(+), 143 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index ad8d43b..de2301c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -768,9 +768,7 @@ static struct omap_hwmod am33xx_elm_hwmod = {
},
 };
 
-/*
- * 'epwmss' class: ecap0,1,2,  ehrpwm0,1,2
- */
+/* pwmss */
 static struct omap_hwmod_class_sysconfig am33xx_epwmss_sysc = {
.rev_offs   = 0x0,
.sysc_offs  = 0x4,
@@ -786,18 +784,23 @@ static struct omap_hwmod_class am33xx_epwmss_hwmod_class 
= {
.sysc   = am33xx_epwmss_sysc,
 };
 
-/* ehrpwm0 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
-   { .name = int, .irq = 86 + OMAP_INTC_START, },
-   { .name = tzint, .irq = 58 + OMAP_INTC_START, },
-   { .irq = -1 },
+
+static struct omap_hwmod_class am33xx_ecap_hwmod_class = {
+   .name   = ecap,
 };
 
-static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
-   .name   = ehrpwm0,
+static struct omap_hwmod_class am33xx_eqep_hwmod_class = {
+   .name   = eqep,
+};
+
+static struct omap_hwmod_class am33xx_ehrpwm_hwmod_class = {
+   .name   = ehrpwm,
+};
+/* epwmss0 */
+static struct omap_hwmod am33xx_epwmss0_hwmod = {
+   .name   = epwmss0,
.class  = am33xx_epwmss_hwmod_class,
.clkdm_name = l4ls_clkdm,
-   .mpu_irqs   = am33xx_ehrpwm0_irqs,
.main_clk   = l4ls_gclk,
.prcm   = {
.omap4  = {
@@ -807,63 +810,68 @@ static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
},
 };
 
-/* ehrpwm1 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = {
-   { .name = int, .irq = 87 + OMAP_INTC_START, },
-   { .name = tzint, .irq = 59 + OMAP_INTC_START, },
+/* ecap0 */
+static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
+   { .irq = 31 + OMAP_INTC_START, },
{ .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ehrpwm1_hwmod = {
-   .name   = ehrpwm1,
-   .class  = am33xx_epwmss_hwmod_class,
+static struct omap_hwmod am33xx_ecap0_hwmod = {
+   .name   = ecap0,
+   .class  = am33xx_ecap_hwmod_class,
.clkdm_name = l4ls_clkdm,
-   .mpu_irqs   = am33xx_ehrpwm1_irqs,
+   .mpu_irqs   = am33xx_ecap0_irqs,
.main_clk   = l4ls_gclk,
-   .prcm   = {
-   .omap4  = {
-   .clkctrl_offs   = AM33XX_CM_PER_EPWMSS1_CLKCTRL_OFFSET,
-   .modulemode = MODULEMODE_SWCTRL,
-   },
-   },
 };
 
-/* ehrpwm2 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = {
-   { .name = int, .irq = 39 + OMAP_INTC_START, },
-   { .name = tzint, .irq = 60 + OMAP_INTC_START, },
+/* eqep0 */
+static struct omap_hwmod_irq_info am33xx_eqep0_irqs[] = {
+   { .irq = 79 + OMAP_INTC_START, },
{ .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ehrpwm2_hwmod = {
-   .name   = ehrpwm2,
-   .class  = am33xx_epwmss_hwmod_class,
+static struct omap_hwmod am33xx_eqep0_hwmod = {
+   .name   = eqep0,
+   .class  = am33xx_eqep_hwmod_class,
.clkdm_name = l4ls_clkdm,
-   .mpu_irqs   = am33xx_ehrpwm2_irqs,
+   .mpu_irqs   = am33xx_eqep0_irqs,
.main_clk   = l4ls_gclk,
-   .prcm   = {
-   .omap4  = {
-   .clkctrl_offs   = AM33XX_CM_PER_EPWMSS2_CLKCTRL_OFFSET,
-   .modulemode = MODULEMODE_SWCTRL,
-   },
-   },
 };
 
-/* ecap0 */
-static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
-   { .irq = 31 + OMAP_INTC_START, },
+/* ehrpwm0 */
+static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
+   { .name = int, .irq = 86 + OMAP_INTC_START, },
+   { .name = tzint, .irq = 58 + OMAP_INTC_START, },
{ .irq = -1 },
 };
 
-static struct omap_hwmod am33xx_ecap0_hwmod = {
-   .name   = ecap0,
+/*
+ * Optional clock entry is provided to support additional clock
+ * gating for EHRPWM module functional from control