Re: [PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock

[Heiko Stuebner]

Am Montag, 13. Juni 2016, 16:04:30 schrieb Douglas Anderson:
> Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
> with arasan,sdhci-5.1) need to know the card clock frequency in order to
> function properly.  Physically in a SoC this clock is exported from the
> SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
> Let's export the SDHCI card clock using a standard device tree mechanism
> so that the PHY can get access to it and query the card clock frequency.
> 
> Signed-off-by: Douglas Anderson 
> Acked-by: Rob Herring 

Doug and me talked about how to solve this beforehand, so obviously I'm in 
favour of doing it like this :-)

Reviewed-by: Heiko Stuebner 

Re: [PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock

[Heiko Stuebner]

Am Montag, 13. Juni 2016, 16:04:30 schrieb Douglas Anderson:
> Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
> with arasan,sdhci-5.1) need to know the card clock frequency in order to
> function properly.  Physically in a SoC this clock is exported from the
> SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
> Let's export the SDHCI card clock using a standard device tree mechanism
> so that the PHY can get access to it and query the card clock frequency.
> 
> Signed-off-by: Douglas Anderson 
> Acked-by: Rob Herring 

Doug and me talked about how to solve this beforehand, so obviously I'm in 
favour of doing it like this :-)

Reviewed-by: Heiko Stuebner 

[PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock

[Douglas Anderson]

Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock frequency in order to
function properly.  Physically in a SoC this clock is exported from the
SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
Let's export the SDHCI card clock using a standard device tree mechanism
so that the PHY can get access to it and query the card clock frequency.

Signed-off-by: Douglas Anderson 
Acked-by: Rob Herring 
---
Changes in v2:
- Adjust commit message wording (Rob)
- Add Rob Herring's Ack.

 Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt 
b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
index 476604e6ce2a..3404afa9b938 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
@@ -30,6 +30,12 @@ Optional Properties:
   - arasan,soc-ctl-syscon: A phandle to a syscon device (see ../mfd/syscon.txt)
 used to access core corecfg registers.  Offsets of registers in this
 syscon are determined based on the main compatible string for the device.
+  - clock-output-names: If specified, this will be the name of the card clock
+which will be exposed by this device.  Required if #clock-cells is
+specified.
+  - #clock-cells: If specified this should be the value <0>.  With this 
property
+in place we will export a clock representing the Card Clock.  This clock
+is expected to be consumed by our PHY.  You must also specify
 
 Example:
sdhci@e010 {
@@ -61,7 +67,9 @@ Example:
arasan,soc-ctl-syscon = <>;
assigned-clocks = < SCLK_EMMC>;
assigned-clock-rates = <2>;
+   clock-output-names = "emmc_cardclock";
phys = <_phy>;
phy-names = "phy_arasan";
+   #clock-cells = <0>;
status = "disabled";
};
-- 
2.8.0.rc3.226.g39d4020

[PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock

[Douglas Anderson]

Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock frequency in order to
function properly.  Physically in a SoC this clock is exported from the
SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
Let's export the SDHCI card clock using a standard device tree mechanism
so that the PHY can get access to it and query the card clock frequency.

Signed-off-by: Douglas Anderson 
Acked-by: Rob Herring 
---
Changes in v2:
- Adjust commit message wording (Rob)
- Add Rob Herring's Ack.

 Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 8 
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt 
b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
index 476604e6ce2a..3404afa9b938 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
@@ -30,6 +30,12 @@ Optional Properties:
   - arasan,soc-ctl-syscon: A phandle to a syscon device (see ../mfd/syscon.txt)
 used to access core corecfg registers.  Offsets of registers in this
 syscon are determined based on the main compatible string for the device.
+  - clock-output-names: If specified, this will be the name of the card clock
+which will be exposed by this device.  Required if #clock-cells is
+specified.
+  - #clock-cells: If specified this should be the value <0>.  With this 
property
+in place we will export a clock representing the Card Clock.  This clock
+is expected to be consumed by our PHY.  You must also specify
 
 Example:
sdhci@e010 {
@@ -61,7 +67,9 @@ Example:
arasan,soc-ctl-syscon = <>;
assigned-clocks = < SCLK_EMMC>;
assigned-clock-rates = <2>;
+   clock-output-names = "emmc_cardclock";
phys = <_phy>;
phy-names = "phy_arasan";
+   #clock-cells = <0>;
status = "disabled";
};
-- 
2.8.0.rc3.226.g39d4020