[PATCH v2 12/15] soc: octeontx2: Set RVU PFs to CGX LMACs mapping
From: Linu Cherian
Each of the enabled CGX LMAC is considered a physical
interface and RVU PFs are mapped to these. VFs of these
SRIOV PFs will be virtual interfaces and share CGX LMAC
along with PF.
This mapping info will be used later on for Rx/Tx pkt steering.
Signed-off-by: Linu Cherian
Signed-off-by: Geetha sowjanya
---
drivers/soc/marvell/octeontx2/Makefile | 2 +-
drivers/soc/marvell/octeontx2/cgx.c | 59
drivers/soc/marvell/octeontx2/cgx.h | 15 -
drivers/soc/marvell/octeontx2/rvu.c | 4 ++
drivers/soc/marvell/octeontx2/rvu.h | 12
drivers/soc/marvell/octeontx2/rvu_cgx.c | 97 +
6 files changed, 186 insertions(+), 3 deletions(-)
create mode 100644 drivers/soc/marvell/octeontx2/rvu_cgx.c
diff --git a/drivers/soc/marvell/octeontx2/Makefile
b/drivers/soc/marvell/octeontx2/Makefile
index 8646421..eaac264 100644
--- a/drivers/soc/marvell/octeontx2/Makefile
+++ b/drivers/soc/marvell/octeontx2/Makefile
@@ -7,4 +7,4 @@ obj-$(CONFIG_OCTEONTX2_MBOX) += octeontx2_mbox.o
obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o
octeontx2_mbox-y := mbox.o
-octeontx2_af-y := cgx.o rvu.o
+octeontx2_af-y := cgx.o rvu.o rvu_cgx.o
diff --git a/drivers/soc/marvell/octeontx2/cgx.c
b/drivers/soc/marvell/octeontx2/cgx.c
index 47aa4cb..c5e0ebb 100644
--- a/drivers/soc/marvell/octeontx2/cgx.c
+++ b/drivers/soc/marvell/octeontx2/cgx.c
@@ -29,8 +29,12 @@ struct cgx {
void __iomem*reg_base;
struct pci_dev *pdev;
u8 cgx_id;
+ u8 lmac_count;
+ struct list_headcgx_list;
};
+static LIST_HEAD(cgx_list);
+
/* Supported devices */
static const struct pci_device_id cgx_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_CGX) },
@@ -43,6 +47,53 @@ MODULE_LICENSE("GPL v2");
MODULE_VERSION(DRV_VERSION);
MODULE_DEVICE_TABLE(pci, cgx_id_table);
+static u64 cgx_read(struct cgx *cgx, u64 lmac, u64 offset)
+{
+ return readq(cgx->reg_base + (lmac << 18) + offset);
+}
+
+int cgx_get_cgx_cnt(void)
+{
+ struct cgx *cgx_dev;
+ int count = 0;
+
+ list_for_each_entry(cgx_dev, _list, cgx_list)
+ count++;
+
+ return count;
+}
+EXPORT_SYMBOL(cgx_get_cgx_cnt);
+
+int cgx_get_lmac_cnt(void *cgxd)
+{
+ struct cgx *cgx = cgxd;
+
+ if (!cgx)
+ return -ENODEV;
+
+ return cgx->lmac_count;
+}
+EXPORT_SYMBOL(cgx_get_lmac_cnt);
+
+void *cgx_get_pdata(int cgx_id)
+{
+ struct cgx *cgx_dev;
+
+ list_for_each_entry(cgx_dev, _list, cgx_list) {
+ if (cgx_dev->cgx_id == cgx_id)
+ return cgx_dev;
+ }
+ return NULL;
+}
+EXPORT_SYMBOL(cgx_get_pdata);
+
+static void cgx_lmac_init(struct cgx *cgx)
+{
+ cgx->lmac_count = cgx_read(cgx, 0, CGXX_CMRX_RX_LMACS) & 0x7;
+ if (cgx->lmac_count > MAX_LMAC_PER_CGX)
+ cgx->lmac_count = MAX_LMAC_PER_CGX;
+}
+
static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
int err;
@@ -77,9 +128,14 @@ static int cgx_probe(struct pci_dev *pdev, const struct
pci_device_id *id)
goto err_release_regions;
}
+ list_add(>cgx_list, _list);
+ cgx->cgx_id = cgx_get_cgx_cnt() - 1;
+ cgx_lmac_init(cgx);
+
return 0;
err_release_regions:
+ list_del(>cgx_list);
pci_release_regions(pdev);
err_disable_device:
pci_disable_device(pdev);
@@ -89,6 +145,9 @@ static int cgx_probe(struct pci_dev *pdev, const struct
pci_device_id *id)
static void cgx_remove(struct pci_dev *pdev)
{
+ struct cgx *cgx = pci_get_drvdata(pdev);
+
+ list_del(>cgx_list);
pci_release_regions(pdev);
pci_disable_device(pdev);
pci_set_drvdata(pdev, NULL);
diff --git a/drivers/soc/marvell/octeontx2/cgx.h
b/drivers/soc/marvell/octeontx2/cgx.h
index a7d4b39..acdc16e 100644
--- a/drivers/soc/marvell/octeontx2/cgx.h
+++ b/drivers/soc/marvell/octeontx2/cgx.h
@@ -12,11 +12,22 @@
#define CGX_H
/* PCI device IDs */
-#definePCI_DEVID_OCTEONTX2_CGX 0xA059
+#definePCI_DEVID_OCTEONTX2_CGX 0xA059
/* PCI BAR nos */
-#define PCI_CFG_REG_BAR_NUM0
+#define PCI_CFG_REG_BAR_NUM0
+
+#define MAX_CGX3
+#define MAX_LMAC_PER_CGX 4
+#define CGX_OFFSET(x) ((x) * MAX_LMAC_PER_CGX)
+
+/* Registers */
+#define CGXX_CMRX_RX_ID_MAP0x060
+#define CGXX_CMRX_RX_LMACS 0x128
extern struct pci_driver cgx_driver;
+int cgx_get_cgx_cnt(void);
+int cgx_get_lmac_cnt(void *cgxd);
+void *cgx_get_pdata(int cgx_id);
#endif /* CGX_H */
diff --git a/drivers/soc/marvell/octeontx2/rvu.c
b/drivers/soc/marvell/octeontx2/rvu.c
index daa6fd3..faf7d0f 100644
--- a/drivers/soc/marvell/octeontx2/rvu.c
+++ b/drivers/soc/marvell/octeontx2/rvu.c
@@
[PATCH v2 12/15] soc: octeontx2: Set RVU PFs to CGX LMACs mapping
From: Linu Cherian
Each of the enabled CGX LMAC is considered a physical
interface and RVU PFs are mapped to these. VFs of these
SRIOV PFs will be virtual interfaces and share CGX LMAC
along with PF.
This mapping info will be used later on for Rx/Tx pkt steering.
Signed-off-by: Linu Cherian
Signed-off-by: Geetha sowjanya
---
drivers/soc/marvell/octeontx2/Makefile | 2 +-
drivers/soc/marvell/octeontx2/cgx.c | 59
drivers/soc/marvell/octeontx2/cgx.h | 15 -
drivers/soc/marvell/octeontx2/rvu.c | 4 ++
drivers/soc/marvell/octeontx2/rvu.h | 12
drivers/soc/marvell/octeontx2/rvu_cgx.c | 97 +
6 files changed, 186 insertions(+), 3 deletions(-)
create mode 100644 drivers/soc/marvell/octeontx2/rvu_cgx.c
diff --git a/drivers/soc/marvell/octeontx2/Makefile
b/drivers/soc/marvell/octeontx2/Makefile
index 8646421..eaac264 100644
--- a/drivers/soc/marvell/octeontx2/Makefile
+++ b/drivers/soc/marvell/octeontx2/Makefile
@@ -7,4 +7,4 @@ obj-$(CONFIG_OCTEONTX2_MBOX) += octeontx2_mbox.o
obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o
octeontx2_mbox-y := mbox.o
-octeontx2_af-y := cgx.o rvu.o
+octeontx2_af-y := cgx.o rvu.o rvu_cgx.o
diff --git a/drivers/soc/marvell/octeontx2/cgx.c
b/drivers/soc/marvell/octeontx2/cgx.c
index 47aa4cb..c5e0ebb 100644
--- a/drivers/soc/marvell/octeontx2/cgx.c
+++ b/drivers/soc/marvell/octeontx2/cgx.c
@@ -29,8 +29,12 @@ struct cgx {
void __iomem*reg_base;
struct pci_dev *pdev;
u8 cgx_id;
+ u8 lmac_count;
+ struct list_headcgx_list;
};
+static LIST_HEAD(cgx_list);
+
/* Supported devices */
static const struct pci_device_id cgx_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_CGX) },
@@ -43,6 +47,53 @@ MODULE_LICENSE("GPL v2");
MODULE_VERSION(DRV_VERSION);
MODULE_DEVICE_TABLE(pci, cgx_id_table);
+static u64 cgx_read(struct cgx *cgx, u64 lmac, u64 offset)
+{
+ return readq(cgx->reg_base + (lmac << 18) + offset);
+}
+
+int cgx_get_cgx_cnt(void)
+{
+ struct cgx *cgx_dev;
+ int count = 0;
+
+ list_for_each_entry(cgx_dev, _list, cgx_list)
+ count++;
+
+ return count;
+}
+EXPORT_SYMBOL(cgx_get_cgx_cnt);
+
+int cgx_get_lmac_cnt(void *cgxd)
+{
+ struct cgx *cgx = cgxd;
+
+ if (!cgx)
+ return -ENODEV;
+
+ return cgx->lmac_count;
+}
+EXPORT_SYMBOL(cgx_get_lmac_cnt);
+
+void *cgx_get_pdata(int cgx_id)
+{
+ struct cgx *cgx_dev;
+
+ list_for_each_entry(cgx_dev, _list, cgx_list) {
+ if (cgx_dev->cgx_id == cgx_id)
+ return cgx_dev;
+ }
+ return NULL;
+}
+EXPORT_SYMBOL(cgx_get_pdata);
+
+static void cgx_lmac_init(struct cgx *cgx)
+{
+ cgx->lmac_count = cgx_read(cgx, 0, CGXX_CMRX_RX_LMACS) & 0x7;
+ if (cgx->lmac_count > MAX_LMAC_PER_CGX)
+ cgx->lmac_count = MAX_LMAC_PER_CGX;
+}
+
static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
int err;
@@ -77,9 +128,14 @@ static int cgx_probe(struct pci_dev *pdev, const struct
pci_device_id *id)
goto err_release_regions;
}
+ list_add(>cgx_list, _list);
+ cgx->cgx_id = cgx_get_cgx_cnt() - 1;
+ cgx_lmac_init(cgx);
+
return 0;
err_release_regions:
+ list_del(>cgx_list);
pci_release_regions(pdev);
err_disable_device:
pci_disable_device(pdev);
@@ -89,6 +145,9 @@ static int cgx_probe(struct pci_dev *pdev, const struct
pci_device_id *id)
static void cgx_remove(struct pci_dev *pdev)
{
+ struct cgx *cgx = pci_get_drvdata(pdev);
+
+ list_del(>cgx_list);
pci_release_regions(pdev);
pci_disable_device(pdev);
pci_set_drvdata(pdev, NULL);
diff --git a/drivers/soc/marvell/octeontx2/cgx.h
b/drivers/soc/marvell/octeontx2/cgx.h
index a7d4b39..acdc16e 100644
--- a/drivers/soc/marvell/octeontx2/cgx.h
+++ b/drivers/soc/marvell/octeontx2/cgx.h
@@ -12,11 +12,22 @@
#define CGX_H
/* PCI device IDs */
-#definePCI_DEVID_OCTEONTX2_CGX 0xA059
+#definePCI_DEVID_OCTEONTX2_CGX 0xA059
/* PCI BAR nos */
-#define PCI_CFG_REG_BAR_NUM0
+#define PCI_CFG_REG_BAR_NUM0
+
+#define MAX_CGX3
+#define MAX_LMAC_PER_CGX 4
+#define CGX_OFFSET(x) ((x) * MAX_LMAC_PER_CGX)
+
+/* Registers */
+#define CGXX_CMRX_RX_ID_MAP0x060
+#define CGXX_CMRX_RX_LMACS 0x128
extern struct pci_driver cgx_driver;
+int cgx_get_cgx_cnt(void);
+int cgx_get_lmac_cnt(void *cgxd);
+void *cgx_get_pdata(int cgx_id);
#endif /* CGX_H */
diff --git a/drivers/soc/marvell/octeontx2/rvu.c
b/drivers/soc/marvell/octeontx2/rvu.c
index daa6fd3..faf7d0f 100644
--- a/drivers/soc/marvell/octeontx2/rvu.c
+++ b/drivers/soc/marvell/octeontx2/rvu.c
@@
