Re: [PATCH v2 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board
Hi Florian, On Tue, Aug 11, 2020 at 4:33 AM Florian Fainelli wrote: > On 8/9/2020 11:49 AM, Philippe Mathieu-Daudé wrote: > > Hi Álvaro, > > > > On Fri, Aug 7, 2020 at 12:05 PM Álvaro Fernández Rojas > > wrote: > >> > >> EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI > >> it should also have EHCI. > > > > This statement isn't correct. OHCI doesn't imply EHCI... > > (although the opposite is almost always true). > > > > Now per 6358-PB01-R the bcm6358 indeed has a EHCI controller. > > > > Do you mind rewording the commit description? > > Is not it that a single USB port is used and we need the EHCI controller > active in order for the correct speed negotiation to occur? Yes. What sounds odd is "if the board has OHCI it should also have EHCI." This is true for this particular board because its chipset is a bcm6358, but I'm worried it might later confuse other developers. For example the bcm6348 has a OHCI controller, but that doesn't imply its port can be used as EHCI. Regards, Phil. > -- > Florian
Re: [PATCH v2 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board
On 8/9/2020 11:49 AM, Philippe Mathieu-Daudé wrote: > Hi Álvaro, > > On Fri, Aug 7, 2020 at 12:05 PM Álvaro Fernández Rojas > wrote: >> >> EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI >> it should also have EHCI. > > This statement isn't correct. OHCI doesn't imply EHCI... > (although the opposite is almost always true). > > Now per 6358-PB01-R the bcm6358 indeed has a EHCI controller. > > Do you mind rewording the commit description? Is not it that a single USB port is used and we need the EHCI controller active in order for the correct speed negotiation to occur? -- Florian
Re: [PATCH v2 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board
Hi Álvaro,
On Fri, Aug 7, 2020 at 12:05 PM Álvaro Fernández Rojas
wrote:
>
> EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI
> it should also have EHCI.
This statement isn't correct. OHCI doesn't imply EHCI...
(although the opposite is almost always true).
Now per 6358-PB01-R the bcm6358 indeed has a EHCI controller.
Do you mind rewording the commit description?
Regards,
Phil.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v2: no changes.
>
> arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
> b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> index 45f1bc437245..ac9570b66f37 100644
> --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
> +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
> @@ -645,6 +645,7 @@ static struct board_info __initdata board_DWVS0 = {
> },
>
> .has_ohci0 = 1,
> + .has_ehci0 = 1,
> };
> #endif /* CONFIG_BCM63XX_CPU_6358 */
>
> --
> 2.27.0
>
Re: [PATCH v2 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board
On 8/7/2020 3:04 AM, Álvaro Fernández Rojas wrote: > EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI > it should also have EHCI. > > Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli -- Florian
[PATCH v2 3/4] MIPS: BCM63xx: enable EHCI for DWV-S0 board
EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI
it should also have EHCI.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index 45f1bc437245..ac9570b66f37 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -645,6 +645,7 @@ static struct board_info __initdata board_DWVS0 = {
},
.has_ohci0 = 1,
+ .has_ehci0 = 1,
};
#endif /* CONFIG_BCM63XX_CPU_6358 */
--
2.27.0
