Re: [PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver
On Fri, 2020-06-05 at 19:43 +0200, Maxime Ripard wrote:
> Hi Nicolas,
>
> On Thu, Jun 04, 2020 at 07:26:07PM +0200, Nicolas Saenz Julienne wrote:
> > On Wed, 2020-05-27 at 17:47 +0200, Maxime Ripard wrote:
> > > The HDMI block has a block that controls clocks and reset signals to the
> > > HDMI0 and HDMI1 controllers.
> >
> > Why not having two separate drivers?
>
> They share the same address space, so it wouldn't really make sense to
> split it into two drivers and an MFD, especially when the clock/reset
> association is fairly common.
Fair enough.
>
> > > Let's expose that through a clock driver implementing a clock and reset
> > > provider.
> > >
> > > Cc: Michael Turquette
> > > Cc: Stephen Boyd
> > > Cc: Rob Herring
> > > Cc: linux-...@vger.kernel.org
> > > Cc: devicet...@vger.kernel.org
> > > Reviewed-by: Stephen Boyd
> > > Signed-off-by: Maxime Ripard
> > > ---
> > > drivers/clk/bcm/Kconfig | 11 +++-
> > > drivers/clk/bcm/Makefile | 1 +-
> > > drivers/clk/bcm/clk-bcm2711-dvp.c | 127 +++-
> > > 3 files changed, 139 insertions(+)
> > > create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
> > >
> > > diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> > > index 8c83977a7dc4..784f12c72365 100644
> > > --- a/drivers/clk/bcm/Kconfig
> > > +++ b/drivers/clk/bcm/Kconfig
> > > @@ -1,4 +1,15 @@
> > > # SPDX-License-Identifier: GPL-2.0-only
> > > +
> > > +config CLK_BCM2711_DVP
> > > + tristate "Broadcom BCM2711 DVP support"
> > > + depends on ARCH_BCM2835 ||COMPILE_TEST
> > > + depends on COMMON_CLK
> > > + default ARCH_BCM2835
> > > + select RESET_SIMPLE
> > > + help
> > > + Enable common clock framework support for the Broadcom BCM2711
> > > + DVP Controller.
> > > +
> > > config CLK_BCM2835
> > > bool "Broadcom BCM2835 clock support"
> > > depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
> > > diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> > > index 0070ddf6cdd2..2c1349062147 100644
> > > --- a/drivers/clk/bcm/Makefile
> > > +++ b/drivers/clk/bcm/Makefile
> > > @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o
> > > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
> > > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
> > > obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o
> > > clk-iproc-asiu.o
> > > +obj-$(CONFIG_CLK_BCM2835)+= clk-bcm2711-dvp.o
> > > obj-$(CONFIG_CLK_BCM2835)+= clk-bcm2835.o
> > > obj-$(CONFIG_CLK_BCM2835)+= clk-bcm2835-aux.o
> > > obj-$(CONFIG_CLK_RASPBERRYPI)+= clk-raspberrypi.o
> > > diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-
> > > bcm2711-
> > > dvp.c
> > > new file mode 100644
> > > index ..c1c4b5857d32
> > > --- /dev/null
> > > +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > > @@ -0,0 +1,127 @@
> > > +// SPDX-License-Identifier: GPL-2.0-or-later
> > > +// Copyright 2020 Cerno
> > > +
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +#include
> > > +
> > > +#define DVP_HT_RPI_SW_INIT 0x04
> > > +#define DVP_HT_RPI_MISC_CONFIG 0x08
> > > +
> > > +#define NR_CLOCKS2
> > > +#define NR_RESETS6
> > > +
> > > +struct clk_dvp {
> > > + struct clk_hw_onecell_data *data;
> > > + struct reset_simple_datareset;
> > > +};
> > > +
> > > +static const struct clk_parent_data clk_dvp_parent = {
> > > + .index = 0,
> > > +};
> > > +
> > > +static int clk_dvp_probe(struct platform_device *pdev)
> > > +{
> > > + struct clk_hw_onecell_data *data;
> > > + struct resource *res;
> > > + struct clk_dvp *dvp;
> > > + void __iomem *base;
> > > + int ret;
> > > +
> > > + dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
> > > + if (!dvp)
> > > + return -ENOMEM;
> > > + platform_set_drvdata(pdev, dvp);
> > > +
> > > + dvp->data = devm_kzalloc(&pdev->dev,
> > > + struct_size(dvp->data, hws, NR_CLOCKS),
> > > + GFP_KERNEL);
> > > + if (!dvp->data)
> > > + return -ENOMEM;
> > > + data = dvp->data;
> > > +
> > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > > + base = devm_ioremap_resource(&pdev->dev, res);
> >
> > I think the cool function to use these days is
> > devm_platform_get_and_ioremap_resource().
>
> i'll change it, thanks!
Reviewed-by: Nicolas Saenz Julienne
Regards,
Nicolas
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Re: [PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver
On Wed, May 27, 2020 at 8:49 AM Maxime Ripard wrote: > > The HDMI block has a block that controls clocks and reset signals to the > HDMI0 and HDMI1 controllers. > > Let's expose that through a clock driver implementing a clock and reset > provider. > > Cc: Michael Turquette > Cc: Stephen Boyd > Cc: Rob Herring > Cc: linux-...@vger.kernel.org > Cc: devicet...@vger.kernel.org > Reviewed-by: Stephen Boyd > Signed-off-by: Maxime Ripard > --- > drivers/clk/bcm/Kconfig | 11 +++- > drivers/clk/bcm/Makefile | 1 +- > drivers/clk/bcm/clk-bcm2711-dvp.c | 127 +++- > 3 files changed, 139 insertions(+) > create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c > > diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig > index 8c83977a7dc4..784f12c72365 100644 > --- a/drivers/clk/bcm/Kconfig > +++ b/drivers/clk/bcm/Kconfig > @@ -1,4 +1,15 @@ > # SPDX-License-Identifier: GPL-2.0-only > + > +config CLK_BCM2711_DVP > + tristate "Broadcom BCM2711 DVP support" > + depends on ARCH_BCM2835 ||COMPILE_TEST > + depends on COMMON_CLK > + default ARCH_BCM2835 > + select RESET_SIMPLE > + help > + Enable common clock framework support for the Broadcom BCM2711 > + DVP Controller. > + > config CLK_BCM2835 > bool "Broadcom BCM2835 clock support" > depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST > diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile > index 0070ddf6cdd2..2c1349062147 100644 > --- a/drivers/clk/bcm/Makefile > +++ b/drivers/clk/bcm/Makefile > @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o > obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o > clk-iproc-asiu.o > +obj-$(CONFIG_CLK_BCM2835) += clk-bcm2711-dvp.o > obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835.o > obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835-aux.o > obj-$(CONFIG_CLK_RASPBERRYPI) += clk-raspberrypi.o I do think that single driver is the right model here, but I noticed that you're not using your new CONFIG_ symbol. With that fixed, r-b from me. (though I'd also recommend devm_platform_get_and_ioremap_resource and devm_reset_controller_register())
Re: [PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver
Hi Nicolas,
On Thu, Jun 04, 2020 at 07:26:07PM +0200, Nicolas Saenz Julienne wrote:
> On Wed, 2020-05-27 at 17:47 +0200, Maxime Ripard wrote:
> > The HDMI block has a block that controls clocks and reset signals to the
> > HDMI0 and HDMI1 controllers.
>
> Why not having two separate drivers?
They share the same address space, so it wouldn't really make sense to
split it into two drivers and an MFD, especially when the clock/reset
association is fairly common.
> > Let's expose that through a clock driver implementing a clock and reset
> > provider.
> >
> > Cc: Michael Turquette
> > Cc: Stephen Boyd
> > Cc: Rob Herring
> > Cc: linux-...@vger.kernel.org
> > Cc: devicet...@vger.kernel.org
> > Reviewed-by: Stephen Boyd
> > Signed-off-by: Maxime Ripard
> > ---
> > drivers/clk/bcm/Kconfig | 11 +++-
> > drivers/clk/bcm/Makefile | 1 +-
> > drivers/clk/bcm/clk-bcm2711-dvp.c | 127 +++-
> > 3 files changed, 139 insertions(+)
> > create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
> >
> > diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> > index 8c83977a7dc4..784f12c72365 100644
> > --- a/drivers/clk/bcm/Kconfig
> > +++ b/drivers/clk/bcm/Kconfig
> > @@ -1,4 +1,15 @@
> > # SPDX-License-Identifier: GPL-2.0-only
> > +
> > +config CLK_BCM2711_DVP
> > + tristate "Broadcom BCM2711 DVP support"
> > + depends on ARCH_BCM2835 ||COMPILE_TEST
> > + depends on COMMON_CLK
> > + default ARCH_BCM2835
> > + select RESET_SIMPLE
> > + help
> > + Enable common clock framework support for the Broadcom BCM2711
> > + DVP Controller.
> > +
> > config CLK_BCM2835
> > bool "Broadcom BCM2835 clock support"
> > depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
> > diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> > index 0070ddf6cdd2..2c1349062147 100644
> > --- a/drivers/clk/bcm/Makefile
> > +++ b/drivers/clk/bcm/Makefile
> > @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
> > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
> > obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
> > obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o
> > clk-iproc-asiu.o
> > +obj-$(CONFIG_CLK_BCM2835) += clk-bcm2711-dvp.o
> > obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835.o
> > obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835-aux.o
> > obj-$(CONFIG_CLK_RASPBERRYPI) += clk-raspberrypi.o
> > diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c
> > b/drivers/clk/bcm/clk-bcm2711-
> > dvp.c
> > new file mode 100644
> > index ..c1c4b5857d32
> > --- /dev/null
> > +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> > @@ -0,0 +1,127 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +// Copyright 2020 Cerno
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define DVP_HT_RPI_SW_INIT 0x04
> > +#define DVP_HT_RPI_MISC_CONFIG 0x08
> > +
> > +#define NR_CLOCKS 2
> > +#define NR_RESETS 6
> > +
> > +struct clk_dvp {
> > + struct clk_hw_onecell_data *data;
> > + struct reset_simple_datareset;
> > +};
> > +
> > +static const struct clk_parent_data clk_dvp_parent = {
> > + .index = 0,
> > +};
> > +
> > +static int clk_dvp_probe(struct platform_device *pdev)
> > +{
> > + struct clk_hw_onecell_data *data;
> > + struct resource *res;
> > + struct clk_dvp *dvp;
> > + void __iomem *base;
> > + int ret;
> > +
> > + dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
> > + if (!dvp)
> > + return -ENOMEM;
> > + platform_set_drvdata(pdev, dvp);
> > +
> > + dvp->data = devm_kzalloc(&pdev->dev,
> > +struct_size(dvp->data, hws, NR_CLOCKS),
> > +GFP_KERNEL);
> > + if (!dvp->data)
> > + return -ENOMEM;
> > + data = dvp->data;
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + base = devm_ioremap_resource(&pdev->dev, res);
>
> I think the cool function to use these days is
> devm_platform_get_and_ioremap_resource().
i'll change it, thanks!
Maxime
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Re: [PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver
Hi Maxime,
On Wed, 2020-05-27 at 17:47 +0200, Maxime Ripard wrote:
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
Why not having two separate drivers?
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
> Cc: Rob Herring
> Cc: linux-...@vger.kernel.org
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Stephen Boyd
> Signed-off-by: Maxime Ripard
> ---
> drivers/clk/bcm/Kconfig | 11 +++-
> drivers/clk/bcm/Makefile | 1 +-
> drivers/clk/bcm/clk-bcm2711-dvp.c | 127 +++-
> 3 files changed, 139 insertions(+)
> create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
>
> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> index 8c83977a7dc4..784f12c72365 100644
> --- a/drivers/clk/bcm/Kconfig
> +++ b/drivers/clk/bcm/Kconfig
> @@ -1,4 +1,15 @@
> # SPDX-License-Identifier: GPL-2.0-only
> +
> +config CLK_BCM2711_DVP
> + tristate "Broadcom BCM2711 DVP support"
> + depends on ARCH_BCM2835 ||COMPILE_TEST
> + depends on COMMON_CLK
> + default ARCH_BCM2835
> + select RESET_SIMPLE
> + help
> + Enable common clock framework support for the Broadcom BCM2711
> + DVP Controller.
> +
> config CLK_BCM2835
> bool "Broadcom BCM2835 clock support"
> depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
> diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
> index 0070ddf6cdd2..2c1349062147 100644
> --- a/drivers/clk/bcm/Makefile
> +++ b/drivers/clk/bcm/Makefile
> @@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA)+= clk-kona-setup.o
> obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
> obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
> obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o
> clk-iproc-asiu.o
> +obj-$(CONFIG_CLK_BCM2835)+= clk-bcm2711-dvp.o
> obj-$(CONFIG_CLK_BCM2835)+= clk-bcm2835.o
> obj-$(CONFIG_CLK_BCM2835)+= clk-bcm2835-aux.o
> obj-$(CONFIG_CLK_RASPBERRYPI)+= clk-raspberrypi.o
> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-
> dvp.c
> new file mode 100644
> index ..c1c4b5857d32
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> @@ -0,0 +1,127 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2020 Cerno
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define DVP_HT_RPI_SW_INIT 0x04
> +#define DVP_HT_RPI_MISC_CONFIG 0x08
> +
> +#define NR_CLOCKS2
> +#define NR_RESETS6
> +
> +struct clk_dvp {
> + struct clk_hw_onecell_data *data;
> + struct reset_simple_datareset;
> +};
> +
> +static const struct clk_parent_data clk_dvp_parent = {
> + .index = 0,
> +};
> +
> +static int clk_dvp_probe(struct platform_device *pdev)
> +{
> + struct clk_hw_onecell_data *data;
> + struct resource *res;
> + struct clk_dvp *dvp;
> + void __iomem *base;
> + int ret;
> +
> + dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
> + if (!dvp)
> + return -ENOMEM;
> + platform_set_drvdata(pdev, dvp);
> +
> + dvp->data = devm_kzalloc(&pdev->dev,
> + struct_size(dvp->data, hws, NR_CLOCKS),
> + GFP_KERNEL);
> + if (!dvp->data)
> + return -ENOMEM;
> + data = dvp->data;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = devm_ioremap_resource(&pdev->dev, res);
I think the cool function to use these days is
devm_platform_get_and_ioremap_resource().
Regards,
Nicolas
> + if (IS_ERR(base))
> + return PTR_ERR(base);
> +
> + dvp->reset.rcdev.owner = THIS_MODULE;
> + dvp->reset.rcdev.nr_resets = NR_RESETS;
> + dvp->reset.rcdev.ops = &reset_simple_ops;
> + dvp->reset.rcdev.of_node = pdev->dev.of_node;
> + dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
> + spin_lock_init(&dvp->reset.lock);
> +
> + ret = reset_controller_register(&dvp->reset.rcdev);
> + if (ret)
> + return ret;
> +
> + data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev,
> + "hdmi0-108MHz",
> + &clk_dvp_parent, 0,
> + base +
> DVP_HT_RPI_MISC_CONFIG, 3,
> + CLK_GATE_SET_TO_DISABLE,
> + &dvp->reset.lock);
> + if (IS_ERR(data->hws[0])) {
> + ret = PTR_ERR(data->hws[0]);
> + goto unregister_reset;
> + }
> +
> + data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev,
> + "hdmi1-108MHz",
> + &clk_dvp_parent, 0,
> +
[PATCH v3 004/105] clk: bcm: Add BCM2711 DVP driver
The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.
Let's expose that through a clock driver implementing a clock and reset
provider.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: linux-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Reviewed-by: Stephen Boyd
Signed-off-by: Maxime Ripard
---
drivers/clk/bcm/Kconfig | 11 +++-
drivers/clk/bcm/Makefile | 1 +-
drivers/clk/bcm/clk-bcm2711-dvp.c | 127 +++-
3 files changed, 139 insertions(+)
create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c
diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
index 8c83977a7dc4..784f12c72365 100644
--- a/drivers/clk/bcm/Kconfig
+++ b/drivers/clk/bcm/Kconfig
@@ -1,4 +1,15 @@
# SPDX-License-Identifier: GPL-2.0-only
+
+config CLK_BCM2711_DVP
+ tristate "Broadcom BCM2711 DVP support"
+ depends on ARCH_BCM2835 ||COMPILE_TEST
+ depends on COMMON_CLK
+ default ARCH_BCM2835
+ select RESET_SIMPLE
+ help
+ Enable common clock framework support for the Broadcom BCM2711
+ DVP Controller.
+
config CLK_BCM2835
bool "Broadcom BCM2835 clock support"
depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 0070ddf6cdd2..2c1349062147 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o
obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o
obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o
clk-iproc-asiu.o
+obj-$(CONFIG_CLK_BCM2835) += clk-bcm2711-dvp.o
obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835.o
obj-$(CONFIG_CLK_BCM2835) += clk-bcm2835-aux.o
obj-$(CONFIG_CLK_RASPBERRYPI) += clk-raspberrypi.o
diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c
b/drivers/clk/bcm/clk-bcm2711-dvp.c
new file mode 100644
index ..c1c4b5857d32
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2020 Cerno
+
+#include
+#include
+#include
+#include
+#include
+
+#define DVP_HT_RPI_SW_INIT 0x04
+#define DVP_HT_RPI_MISC_CONFIG 0x08
+
+#define NR_CLOCKS 2
+#define NR_RESETS 6
+
+struct clk_dvp {
+ struct clk_hw_onecell_data *data;
+ struct reset_simple_datareset;
+};
+
+static const struct clk_parent_data clk_dvp_parent = {
+ .index = 0,
+};
+
+static int clk_dvp_probe(struct platform_device *pdev)
+{
+ struct clk_hw_onecell_data *data;
+ struct resource *res;
+ struct clk_dvp *dvp;
+ void __iomem *base;
+ int ret;
+
+ dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
+ if (!dvp)
+ return -ENOMEM;
+ platform_set_drvdata(pdev, dvp);
+
+ dvp->data = devm_kzalloc(&pdev->dev,
+struct_size(dvp->data, hws, NR_CLOCKS),
+GFP_KERNEL);
+ if (!dvp->data)
+ return -ENOMEM;
+ data = dvp->data;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ dvp->reset.rcdev.owner = THIS_MODULE;
+ dvp->reset.rcdev.nr_resets = NR_RESETS;
+ dvp->reset.rcdev.ops = &reset_simple_ops;
+ dvp->reset.rcdev.of_node = pdev->dev.of_node;
+ dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
+ spin_lock_init(&dvp->reset.lock);
+
+ ret = reset_controller_register(&dvp->reset.rcdev);
+ if (ret)
+ return ret;
+
+ data->hws[0] = clk_hw_register_gate_parent_data(&pdev->dev,
+ "hdmi0-108MHz",
+ &clk_dvp_parent, 0,
+ base +
DVP_HT_RPI_MISC_CONFIG, 3,
+ CLK_GATE_SET_TO_DISABLE,
+ &dvp->reset.lock);
+ if (IS_ERR(data->hws[0])) {
+ ret = PTR_ERR(data->hws[0]);
+ goto unregister_reset;
+ }
+
+ data->hws[1] = clk_hw_register_gate_parent_data(&pdev->dev,
+ "hdmi1-108MHz",
+ &clk_dvp_parent, 0,
+ base +
DVP_HT_RPI_MISC_CONFIG, 4,
+ CLK_GATE_SET_TO_DISABLE,
+ &dvp->reset.lock);
+ if (IS_ERR(data->hws[1])) {
+ ret = PTR_ERR(data->hws[1]);
+ goto unregister_clk0;
+ }
+
+ data
