Re: [PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Marc Zyngier]

On 23/03/17 23:52, Mars Cheng wrote:
> On Thu, 2017-03-23 at 16:25 +, Marc Zyngier wrote:
>> On 19/03/17 15:26, Mars Cheng wrote:
>>> Originally driver only supports one base. However, MT6797 has
>>> more than one bases to configure interrupt polarity. To support
>>> possible design change, here comes a solution to use arbitrary
>>> number of bases.
>>>
>>> Signed-off-by: Mars Cheng 
>>
>> Acked-by: Marc Zyngier 
>>
>> What is the merge strategy for this? I'm happy to take the irqchip stuff
>> through my tree, but there is much more in this series...
>>
> Hi Marc
> 
> Thanks for your review.
> 
> Hi Matthias
> 
> Would you comment on this? If Marc take the following stuff first in his
> tree:
> 
> [PATCH v3 01/12] dt-bindings: mediatek: multiple bases support for
> sysirq  

Before taking this patch, I still need one of the DT maintainer to ack
the binding extension.

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Marc Zyngier]

On 23/03/17 23:52, Mars Cheng wrote:
> On Thu, 2017-03-23 at 16:25 +, Marc Zyngier wrote:
>> On 19/03/17 15:26, Mars Cheng wrote:
>>> Originally driver only supports one base. However, MT6797 has
>>> more than one bases to configure interrupt polarity. To support
>>> possible design change, here comes a solution to use arbitrary
>>> number of bases.
>>>
>>> Signed-off-by: Mars Cheng 
>>
>> Acked-by: Marc Zyngier 
>>
>> What is the merge strategy for this? I'm happy to take the irqchip stuff
>> through my tree, but there is much more in this series...
>>
> Hi Marc
> 
> Thanks for your review.
> 
> Hi Matthias
> 
> Would you comment on this? If Marc take the following stuff first in his
> tree:
> 
> [PATCH v3 01/12] dt-bindings: mediatek: multiple bases support for
> sysirq  

Before taking this patch, I still need one of the DT maintainer to ack
the binding extension.

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Mars Cheng]

On Thu, 2017-03-23 at 16:25 +, Marc Zyngier wrote:
> On 19/03/17 15:26, Mars Cheng wrote:
> > Originally driver only supports one base. However, MT6797 has
> > more than one bases to configure interrupt polarity. To support
> > possible design change, here comes a solution to use arbitrary
> > number of bases.
> > 
> > Signed-off-by: Mars Cheng <mars.ch...@mediatek.com>
> 
> Acked-by: Marc Zyngier <marc.zyng...@arm.com>
> 
> What is the merge strategy for this? I'm happy to take the irqchip stuff
> through my tree, but there is much more in this series...
> 
Hi Marc

Thanks for your review.

Hi Matthias

Would you comment on this? If Marc take the following stuff first in his
tree:

[PATCH v3 01/12] dt-bindings: mediatek: multiple bases support for
sysirq  
[PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary
number 
[PATCH v3 03/12] irqchip: mtk-sysirq: prevent unnecessary visibility
when set_type 

Since other stuff might need more review and irqchip didn't affect them.

Thanks.

> Thanks,
> 
>   M.

Re: [PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Mars Cheng]

On Thu, 2017-03-23 at 16:25 +, Marc Zyngier wrote:
> On 19/03/17 15:26, Mars Cheng wrote:
> > Originally driver only supports one base. However, MT6797 has
> > more than one bases to configure interrupt polarity. To support
> > possible design change, here comes a solution to use arbitrary
> > number of bases.
> > 
> > Signed-off-by: Mars Cheng 
> 
> Acked-by: Marc Zyngier 
> 
> What is the merge strategy for this? I'm happy to take the irqchip stuff
> through my tree, but there is much more in this series...
> 
Hi Marc

Thanks for your review.

Hi Matthias

Would you comment on this? If Marc take the following stuff first in his
tree:

[PATCH v3 01/12] dt-bindings: mediatek: multiple bases support for
sysirq  
[PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary
number 
[PATCH v3 03/12] irqchip: mtk-sysirq: prevent unnecessary visibility
when set_type 

Since other stuff might need more review and irqchip didn't affect them.

Thanks.

> Thanks,
> 
>   M.

Re: [PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Marc Zyngier]

On 19/03/17 15:26, Mars Cheng wrote:
> Originally driver only supports one base. However, MT6797 has
> more than one bases to configure interrupt polarity. To support
> possible design change, here comes a solution to use arbitrary
> number of bases.
> 
> Signed-off-by: Mars Cheng 

Acked-by: Marc Zyngier 

What is the merge strategy for this? I'm happy to take the irqchip stuff
through my tree, but there is much more in this series...

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Marc Zyngier]

On 19/03/17 15:26, Mars Cheng wrote:
> Originally driver only supports one base. However, MT6797 has
> more than one bases to configure interrupt polarity. To support
> possible design change, here comes a solution to use arbitrary
> number of bases.
> 
> Signed-off-by: Mars Cheng 

Acked-by: Marc Zyngier 

What is the merge strategy for this? I'm happy to take the irqchip stuff
through my tree, but there is much more in this series...

Thanks,

M.
-- 
Jazz is not dead. It just smells funny...

[PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Mars Cheng]

Originally driver only supports one base. However, MT6797 has
more than one bases to configure interrupt polarity. To support
possible design change, here comes a solution to use arbitrary
number of bases.

Signed-off-by: Mars Cheng 
---
 drivers/irqchip/irq-mtk-sysirq.c |  116 +++---
 1 file changed, 95 insertions(+), 21 deletions(-)

diff --git a/drivers/irqchip/irq-mtk-sysirq.c b/drivers/irqchip/irq-mtk-sysirq.c
index 63ac73b..9ba969c 100644
--- a/drivers/irqchip/irq-mtk-sysirq.c
+++ b/drivers/irqchip/irq-mtk-sysirq.c
@@ -24,22 +24,29 @@
 
 struct mtk_sysirq_chip_data {
spinlock_t lock;
-   void __iomem *intpol_base;
+   u32 nr_intpol_bases;
+   void __iomem **intpol_bases;
+   u32 *intpol_words;
+   u8 *intpol_idx;
+   u16 *which_word;
 };
 
 static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
 {
irq_hw_number_t hwirq = data->hwirq;
struct mtk_sysirq_chip_data *chip_data = data->chip_data;
+   u8 intpol_idx = chip_data->intpol_idx[hwirq];
+   void __iomem *base;
u32 offset, reg_index, value;
unsigned long flags;
int ret;
 
+   base = chip_data->intpol_bases[intpol_idx];
+   reg_index = chip_data->which_word[hwirq];
offset = hwirq & 0x1f;
-   reg_index = hwirq >> 5;
 
spin_lock_irqsave(_data->lock, flags);
-   value = readl_relaxed(chip_data->intpol_base + reg_index * 4);
+   value = readl_relaxed(base + reg_index * 4);
if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
if (type == IRQ_TYPE_LEVEL_LOW)
type = IRQ_TYPE_LEVEL_HIGH;
@@ -49,7 +56,8 @@ static int mtk_sysirq_set_type(struct irq_data *data, 
unsigned int type)
} else {
value &= ~(1 << offset);
}
-   writel(value, chip_data->intpol_base + reg_index * 4);
+
+   writel(value, base + reg_index * 4);
 
data = data->parent_data;
ret = data->chip->irq_set_type(data, type);
@@ -124,8 +132,7 @@ static int __init mtk_sysirq_of_init(struct device_node 
*node,
 {
struct irq_domain *domain, *domain_parent;
struct mtk_sysirq_chip_data *chip_data;
-   int ret, size, intpol_num;
-   struct resource res;
+   int ret, size, intpol_num = 0, nr_intpol_bases = 0, i = 0;
 
domain_parent = irq_find_host(parent);
if (!domain_parent) {
@@ -133,36 +140,103 @@ static int __init mtk_sysirq_of_init(struct device_node 
*node,
return -EINVAL;
}
 
-   ret = of_address_to_resource(node, 0, );
-   if (ret)
-   return ret;
-
chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
if (!chip_data)
return -ENOMEM;
 
-   size = resource_size();
-   intpol_num = size * 8;
-   chip_data->intpol_base = ioremap(res.start, size);
-   if (!chip_data->intpol_base) {
-   pr_err("mtk_sysirq: unable to map sysirq register\n");
-   ret = -ENXIO;
-   goto out_free;
+   while (of_get_address(node, i++, NULL, NULL))
+   nr_intpol_bases++;
+
+   if (nr_intpol_bases == 0) {
+   pr_err("mtk_sysirq: base address not specified\n");
+   ret = -EINVAL;
+   goto out_free_chip;
+   }
+
+   chip_data->intpol_words = kcalloc(nr_intpol_bases,
+ sizeof(*chip_data->intpol_words),
+ GFP_KERNEL);
+   if (!chip_data->intpol_words) {
+   ret = -ENOMEM;
+   goto out_free_chip;
+   }
+
+   chip_data->intpol_bases = kcalloc(nr_intpol_bases,
+ sizeof(*chip_data->intpol_bases),
+ GFP_KERNEL);
+   if (!chip_data->intpol_bases) {
+   ret = -ENOMEM;
+   goto out_free_intpol_words;
+   }
+
+   for (i = 0; i < nr_intpol_bases; i++) {
+   struct resource res;
+
+   ret = of_address_to_resource(node, i, );
+   size = resource_size();
+   intpol_num += size * 8;
+   chip_data->intpol_words[i] = size / 4;
+   chip_data->intpol_bases[i] = of_iomap(node, i);
+   if (ret || !chip_data->intpol_bases[i]) {
+   pr_err("%s: couldn't map region %d\n",
+  node->full_name, i);
+   ret = -ENODEV;
+   goto out_free_intpol;
+   }
+   }
+
+   chip_data->intpol_idx = kcalloc(intpol_num,
+   sizeof(*chip_data->intpol_idx),
+   GFP_KERNEL);
+   if (!chip_data->intpol_idx) {
+   ret = -ENOMEM;
+   goto out_free_intpol;
+   }
+
+   chip_data->which_word = kcalloc(intpol_num,
+

[PATCH v3 02/12] irqchip: mtk-sysirq: extend intpol base to arbitrary number

[Mars Cheng]

Originally driver only supports one base. However, MT6797 has
more than one bases to configure interrupt polarity. To support
possible design change, here comes a solution to use arbitrary
number of bases.

Signed-off-by: Mars Cheng 
---
 drivers/irqchip/irq-mtk-sysirq.c |  116 +++---
 1 file changed, 95 insertions(+), 21 deletions(-)

diff --git a/drivers/irqchip/irq-mtk-sysirq.c b/drivers/irqchip/irq-mtk-sysirq.c
index 63ac73b..9ba969c 100644
--- a/drivers/irqchip/irq-mtk-sysirq.c
+++ b/drivers/irqchip/irq-mtk-sysirq.c
@@ -24,22 +24,29 @@
 
 struct mtk_sysirq_chip_data {
spinlock_t lock;
-   void __iomem *intpol_base;
+   u32 nr_intpol_bases;
+   void __iomem **intpol_bases;
+   u32 *intpol_words;
+   u8 *intpol_idx;
+   u16 *which_word;
 };
 
 static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
 {
irq_hw_number_t hwirq = data->hwirq;
struct mtk_sysirq_chip_data *chip_data = data->chip_data;
+   u8 intpol_idx = chip_data->intpol_idx[hwirq];
+   void __iomem *base;
u32 offset, reg_index, value;
unsigned long flags;
int ret;
 
+   base = chip_data->intpol_bases[intpol_idx];
+   reg_index = chip_data->which_word[hwirq];
offset = hwirq & 0x1f;
-   reg_index = hwirq >> 5;
 
spin_lock_irqsave(_data->lock, flags);
-   value = readl_relaxed(chip_data->intpol_base + reg_index * 4);
+   value = readl_relaxed(base + reg_index * 4);
if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
if (type == IRQ_TYPE_LEVEL_LOW)
type = IRQ_TYPE_LEVEL_HIGH;
@@ -49,7 +56,8 @@ static int mtk_sysirq_set_type(struct irq_data *data, 
unsigned int type)
} else {
value &= ~(1 << offset);
}
-   writel(value, chip_data->intpol_base + reg_index * 4);
+
+   writel(value, base + reg_index * 4);
 
data = data->parent_data;
ret = data->chip->irq_set_type(data, type);
@@ -124,8 +132,7 @@ static int __init mtk_sysirq_of_init(struct device_node 
*node,
 {
struct irq_domain *domain, *domain_parent;
struct mtk_sysirq_chip_data *chip_data;
-   int ret, size, intpol_num;
-   struct resource res;
+   int ret, size, intpol_num = 0, nr_intpol_bases = 0, i = 0;
 
domain_parent = irq_find_host(parent);
if (!domain_parent) {
@@ -133,36 +140,103 @@ static int __init mtk_sysirq_of_init(struct device_node 
*node,
return -EINVAL;
}
 
-   ret = of_address_to_resource(node, 0, );
-   if (ret)
-   return ret;
-
chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
if (!chip_data)
return -ENOMEM;
 
-   size = resource_size();
-   intpol_num = size * 8;
-   chip_data->intpol_base = ioremap(res.start, size);
-   if (!chip_data->intpol_base) {
-   pr_err("mtk_sysirq: unable to map sysirq register\n");
-   ret = -ENXIO;
-   goto out_free;
+   while (of_get_address(node, i++, NULL, NULL))
+   nr_intpol_bases++;
+
+   if (nr_intpol_bases == 0) {
+   pr_err("mtk_sysirq: base address not specified\n");
+   ret = -EINVAL;
+   goto out_free_chip;
+   }
+
+   chip_data->intpol_words = kcalloc(nr_intpol_bases,
+ sizeof(*chip_data->intpol_words),
+ GFP_KERNEL);
+   if (!chip_data->intpol_words) {
+   ret = -ENOMEM;
+   goto out_free_chip;
+   }
+
+   chip_data->intpol_bases = kcalloc(nr_intpol_bases,
+ sizeof(*chip_data->intpol_bases),
+ GFP_KERNEL);
+   if (!chip_data->intpol_bases) {
+   ret = -ENOMEM;
+   goto out_free_intpol_words;
+   }
+
+   for (i = 0; i < nr_intpol_bases; i++) {
+   struct resource res;
+
+   ret = of_address_to_resource(node, i, );
+   size = resource_size();
+   intpol_num += size * 8;
+   chip_data->intpol_words[i] = size / 4;
+   chip_data->intpol_bases[i] = of_iomap(node, i);
+   if (ret || !chip_data->intpol_bases[i]) {
+   pr_err("%s: couldn't map region %d\n",
+  node->full_name, i);
+   ret = -ENODEV;
+   goto out_free_intpol;
+   }
+   }
+
+   chip_data->intpol_idx = kcalloc(intpol_num,
+   sizeof(*chip_data->intpol_idx),
+   GFP_KERNEL);
+   if (!chip_data->intpol_idx) {
+   ret = -ENOMEM;
+   goto out_free_intpol;
+   }
+
+   chip_data->which_word = kcalloc(intpol_num,
+