[PATCH v3 09/11] clk: actions: Add composite clock support

2018-02-09 Thread Manivannan Sadhasivam 
Add support for Actions Semi composite clock. This clock
consists of gate, mux, divider and factor clocks.

Signed-off-by: Manivannan Sadhasivam 
---
 drivers/clk/actions/Makefile|   1 +
 drivers/clk/actions/owl-composite.c | 155 
 drivers/clk/actions/owl-composite.h | 101 +++
 3 files changed, 257 insertions(+)
 create mode 100644 drivers/clk/actions/owl-composite.c
 create mode 100644 drivers/clk/actions/owl-composite.h

diff --git a/drivers/clk/actions/Makefile b/drivers/clk/actions/Makefile
index 994357fa560b..53431aef6e9c 100644
--- a/drivers/clk/actions/Makefile
+++ b/drivers/clk/actions/Makefile
@@ -5,3 +5,4 @@ clk-owl-y   += owl-gate.o
 clk-owl-y  += owl-mux.o
 clk-owl-y  += owl-divider.o
 clk-owl-y  += owl-factor.o
+clk-owl-y  += owl-composite.o
diff --git a/drivers/clk/actions/owl-composite.c 
b/drivers/clk/actions/owl-composite.c
new file mode 100644
index ..04fe1645a60d
--- /dev/null
+++ b/drivers/clk/actions/owl-composite.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// OWL composite clock driver
+//
+// Copyright (c) 2014 Actions Semi Inc.
+// Author: David Liu 
+//
+// Copyright (c) 2018 Linaro Ltd.
+// Author: Manivannan Sadhasivam 
+
+#include 
+#include 
+
+#include "owl-composite.h"
+
+static u8 owl_comp_get_parent(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_mux_helper_get_parent(>common, >mux_hw);
+}
+
+static int owl_comp_set_parent(struct clk_hw *hw, u8 index)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_mux_helper_set_parent(>common, >mux_hw, index);
+}
+
+static void owl_comp_disable(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+   struct owl_clk_common *common = >common;
+
+   clk_gate_set(common, >gate_hw, false);
+}
+
+static int owl_comp_enable(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+   struct owl_clk_common *common = >common;
+
+   clk_gate_set(common, >gate_hw, true);
+
+   return 0;
+}
+
+static int owl_comp_is_enabled(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+   struct owl_clk_common *common = >common;
+
+   return clk_is_enabled(common, >gate_hw);
+}
+
+static long owl_comp_div_round_rate(struct clk_hw *hw, unsigned long rate,
+   unsigned long *parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_divider_helper_round_rate(>common, >rate.div_hw,
+   rate, parent_rate);
+}
+
+static unsigned long owl_comp_div_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_divider_helper_recalc_rate(>common, >rate.div_hw,
+   parent_rate);
+}
+
+static int owl_comp_div_set_rate(struct clk_hw *hw, unsigned long rate,
+   unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_divider_helper_set_rate(>common, >rate.div_hw,
+   rate, parent_rate);
+}
+
+static long owl_comp_fact_round_rate(struct clk_hw *hw, unsigned long rate,
+   unsigned long *parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_factor_helper_round_rate(>common,
+   >rate.factor_hw,
+   rate, parent_rate);
+}
+
+static unsigned long owl_comp_fact_recalc_rate(struct clk_hw *hw,
+   unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_factor_helper_recalc_rate(>common,
+   >rate.factor_hw,
+   parent_rate);
+}
+
+static int owl_comp_fact_set_rate(struct clk_hw *hw, unsigned long rate,
+  unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_factor_helper_set_rate(>common,
+   >rate.factor_hw,
+   rate, parent_rate);
+}
+
+const struct clk_ops owl_comp_div_ops = {
+   /* mux_ops */
+   .get_parent = owl_comp_get_parent,
+   .set_parent = owl_comp_set_parent,
+
+   /* gate_ops */
+   .disable= owl_comp_disable,
+   .enable = owl_comp_enable,
+   .is_enabled = owl_comp_is_enabled,
+
+   /* div_ops */
+   .round_rate = owl_comp_div_round_rate,
+

[PATCH v3 09/11] clk: actions: Add composite clock support

2018-02-09 Thread Manivannan Sadhasivam 
Add support for Actions Semi composite clock. This clock
consists of gate, mux, divider and factor clocks.

Signed-off-by: Manivannan Sadhasivam 
---
 drivers/clk/actions/Makefile|   1 +
 drivers/clk/actions/owl-composite.c | 155 
 drivers/clk/actions/owl-composite.h | 101 +++
 3 files changed, 257 insertions(+)
 create mode 100644 drivers/clk/actions/owl-composite.c
 create mode 100644 drivers/clk/actions/owl-composite.h

diff --git a/drivers/clk/actions/Makefile b/drivers/clk/actions/Makefile
index 994357fa560b..53431aef6e9c 100644
--- a/drivers/clk/actions/Makefile
+++ b/drivers/clk/actions/Makefile
@@ -5,3 +5,4 @@ clk-owl-y   += owl-gate.o
 clk-owl-y  += owl-mux.o
 clk-owl-y  += owl-divider.o
 clk-owl-y  += owl-factor.o
+clk-owl-y  += owl-composite.o
diff --git a/drivers/clk/actions/owl-composite.c 
b/drivers/clk/actions/owl-composite.c
new file mode 100644
index ..04fe1645a60d
--- /dev/null
+++ b/drivers/clk/actions/owl-composite.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// OWL composite clock driver
+//
+// Copyright (c) 2014 Actions Semi Inc.
+// Author: David Liu 
+//
+// Copyright (c) 2018 Linaro Ltd.
+// Author: Manivannan Sadhasivam 
+
+#include 
+#include 
+
+#include "owl-composite.h"
+
+static u8 owl_comp_get_parent(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_mux_helper_get_parent(>common, >mux_hw);
+}
+
+static int owl_comp_set_parent(struct clk_hw *hw, u8 index)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_mux_helper_set_parent(>common, >mux_hw, index);
+}
+
+static void owl_comp_disable(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+   struct owl_clk_common *common = >common;
+
+   clk_gate_set(common, >gate_hw, false);
+}
+
+static int owl_comp_enable(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+   struct owl_clk_common *common = >common;
+
+   clk_gate_set(common, >gate_hw, true);
+
+   return 0;
+}
+
+static int owl_comp_is_enabled(struct clk_hw *hw)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+   struct owl_clk_common *common = >common;
+
+   return clk_is_enabled(common, >gate_hw);
+}
+
+static long owl_comp_div_round_rate(struct clk_hw *hw, unsigned long rate,
+   unsigned long *parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_divider_helper_round_rate(>common, >rate.div_hw,
+   rate, parent_rate);
+}
+
+static unsigned long owl_comp_div_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_divider_helper_recalc_rate(>common, >rate.div_hw,
+   parent_rate);
+}
+
+static int owl_comp_div_set_rate(struct clk_hw *hw, unsigned long rate,
+   unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_divider_helper_set_rate(>common, >rate.div_hw,
+   rate, parent_rate);
+}
+
+static long owl_comp_fact_round_rate(struct clk_hw *hw, unsigned long rate,
+   unsigned long *parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_factor_helper_round_rate(>common,
+   >rate.factor_hw,
+   rate, parent_rate);
+}
+
+static unsigned long owl_comp_fact_recalc_rate(struct clk_hw *hw,
+   unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_factor_helper_recalc_rate(>common,
+   >rate.factor_hw,
+   parent_rate);
+}
+
+static int owl_comp_fact_set_rate(struct clk_hw *hw, unsigned long rate,
+  unsigned long parent_rate)
+{
+   struct owl_composite *comp = hw_to_owl_comp(hw);
+
+   return owl_factor_helper_set_rate(>common,
+   >rate.factor_hw,
+   rate, parent_rate);
+}
+
+const struct clk_ops owl_comp_div_ops = {
+   /* mux_ops */
+   .get_parent = owl_comp_get_parent,
+   .set_parent = owl_comp_set_parent,
+
+   /* gate_ops */
+   .disable= owl_comp_disable,
+   .enable = owl_comp_enable,
+   .is_enabled = owl_comp_is_enabled,
+
+   /* div_ops */
+   .round_rate = owl_comp_div_round_rate,
+   .recalc_rate= owl_comp_div_recalc_rate,
+   .set_rate   =