Re: [PATCH v3 09/23] media: camss: Add ISPIF files

2017-07-20 Thread Sakari Ailus
Hi Todor,

On Mon, Jul 17, 2017 at 01:33:35PM +0300, Todor Tomov wrote:
> These files control the ISPIF module which handles the routing of the data
> streams from the CSIDs to the inputs of the VFE.
> 
> Signed-off-by: Todor Tomov 
> ---
>  .../media/platform/qcom/camss-8x16/camss-ispif.c   | 1127 
> 
>  .../media/platform/qcom/camss-8x16/camss-ispif.h   |   85 ++
>  2 files changed, 1212 insertions(+)
>  create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.c
>  create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.h
> 
> diff --git a/drivers/media/platform/qcom/camss-8x16/camss-ispif.c 
> b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
> new file mode 100644
> index 000..cc32085
> --- /dev/null
> +++ b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
> @@ -0,0 +1,1127 @@
> +/*
> + * camss-ispif.c
> + *
> + * Qualcomm MSM Camera Subsystem - ISPIF Module
> + *
> + * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
> + * Copyright (C) 2015-2017 Linaro Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "camss-ispif.h"
> +#include "camss.h"
> +
> +#define MSM_ISPIF_NAME "msm_ispif"
> +
> +#define ispif_line_array(ptr_line)   \
> + ((const struct ispif_line (*)[]) &(ptr_line[-(ptr_line->id)]))

Argh.

> +
> +#define to_ispif(ptr_line)   \
> + container_of(ispif_line_array(ptr_line), struct ispif_device, ptr_line)
> +
> +#define ISPIF_RST_CMD_0  0x008
> +#define ISPIF_IRQ_GLOBAL_CLEAR_CMD   0x01c
> +#define ISPIF_VFE_m_CTRL_0(m)(0x200 + 0x200 * (m))
> +#define ISPIF_VFE_m_CTRL_0_PIX0_LINE_BUF_EN  (1 << 6)
> +#define ISPIF_VFE_m_IRQ_MASK_0(m)(0x208 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE   0x1249
> +#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_MASK 0x1fff
> +#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE   0x02492000
> +#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_MASK 0x03ffe000
> +#define ISPIF_VFE_m_IRQ_MASK_1(m)(0x20c + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE   0x1249
> +#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_MASK 0x1fff
> +#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE   0x02492000
> +#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_MASK 0x03ffe000
> +#define ISPIF_VFE_m_IRQ_MASK_2(m)(0x210 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE   0x1249
> +#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_MASK 0x1fff
> +#define ISPIF_VFE_m_IRQ_STATUS_0(m)  (0x21c + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_STATUS_0_PIX0_OVERFLOW   (1 << 12)
> +#define ISPIF_VFE_m_IRQ_STATUS_0_RDI0_OVERFLOW   (1 << 25)
> +#define ISPIF_VFE_m_IRQ_STATUS_1(m)  (0x220 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_STATUS_1_PIX1_OVERFLOW   (1 << 12)
> +#define ISPIF_VFE_m_IRQ_STATUS_1_RDI1_OVERFLOW   (1 << 25)
> +#define ISPIF_VFE_m_IRQ_STATUS_2(m)  (0x224 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW   (1 << 12)
> +#define ISPIF_VFE_m_IRQ_CLEAR_0(m)   (0x230 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_CLEAR_1(m)   (0x234 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_CLEAR_2(m)   (0x238 + 0x200 * (m))
> +#define ISPIF_VFE_m_INTF_INPUT_SEL(m)(0x244 + 0x200 * (m))
> +#define ISPIF_VFE_m_INTF_CMD_0(m)(0x248 + 0x200 * (m))
> +#define ISPIF_VFE_m_INTF_CMD_1(m)(0x24c + 0x200 * (m))
> +#define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n)\
> + (0x254 + 0x200 * (m) + 0x4 * (n))
> +#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n)\
> + (0x264 + 0x200 * (m) + 0x4 * (n))
> +#define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n)  \
> + (0x2c0 + 0x200 * (m) + 0x4 * (n))
> +#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n)  \
> + (0x2d0 + 0x200 * (m) + 0x4 * (n))
> +
> +#define CSI_PIX_CLK_MUX_SEL  0x000
> +#define CSI_RDI_CLK_MUX_SEL  0x008
> +
> +#define ISPIF_TIMEOUT_SLEEP_US   1000
> +#define ISPIF_TIMEOUT_ALL_US 100
> +#define ISPIF_RESET_TIMEOUT_MS   500
> +
> +enum ispif_intf_cmd {
> + CMD_DISABLE_FRAME_BOUNDARY = 0x0,
> + CMD_ENABLE_FRAME_BOUNDARY = 0x1,
> + CMD_DISABLE_IMMEDIATELY = 0x2,
> + CMD_ALL_DISABLE_IMMEDIATELY = 0x,
> + CMD_ALL_NO_CHANGE = 0x,
> +};
> +
> +static const u32 ispif_formats[] = 

Re: [PATCH v3 09/23] media: camss: Add ISPIF files

2017-07-20 Thread Sakari Ailus
Hi Todor,

On Mon, Jul 17, 2017 at 01:33:35PM +0300, Todor Tomov wrote:
> These files control the ISPIF module which handles the routing of the data
> streams from the CSIDs to the inputs of the VFE.
> 
> Signed-off-by: Todor Tomov 
> ---
>  .../media/platform/qcom/camss-8x16/camss-ispif.c   | 1127 
> 
>  .../media/platform/qcom/camss-8x16/camss-ispif.h   |   85 ++
>  2 files changed, 1212 insertions(+)
>  create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.c
>  create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.h
> 
> diff --git a/drivers/media/platform/qcom/camss-8x16/camss-ispif.c 
> b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
> new file mode 100644
> index 000..cc32085
> --- /dev/null
> +++ b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
> @@ -0,0 +1,1127 @@
> +/*
> + * camss-ispif.c
> + *
> + * Qualcomm MSM Camera Subsystem - ISPIF Module
> + *
> + * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
> + * Copyright (C) 2015-2017 Linaro Ltd.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "camss-ispif.h"
> +#include "camss.h"
> +
> +#define MSM_ISPIF_NAME "msm_ispif"
> +
> +#define ispif_line_array(ptr_line)   \
> + ((const struct ispif_line (*)[]) &(ptr_line[-(ptr_line->id)]))

Argh.

> +
> +#define to_ispif(ptr_line)   \
> + container_of(ispif_line_array(ptr_line), struct ispif_device, ptr_line)
> +
> +#define ISPIF_RST_CMD_0  0x008
> +#define ISPIF_IRQ_GLOBAL_CLEAR_CMD   0x01c
> +#define ISPIF_VFE_m_CTRL_0(m)(0x200 + 0x200 * (m))
> +#define ISPIF_VFE_m_CTRL_0_PIX0_LINE_BUF_EN  (1 << 6)
> +#define ISPIF_VFE_m_IRQ_MASK_0(m)(0x208 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE   0x1249
> +#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_MASK 0x1fff
> +#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE   0x02492000
> +#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_MASK 0x03ffe000
> +#define ISPIF_VFE_m_IRQ_MASK_1(m)(0x20c + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE   0x1249
> +#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_MASK 0x1fff
> +#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE   0x02492000
> +#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_MASK 0x03ffe000
> +#define ISPIF_VFE_m_IRQ_MASK_2(m)(0x210 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE   0x1249
> +#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_MASK 0x1fff
> +#define ISPIF_VFE_m_IRQ_STATUS_0(m)  (0x21c + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_STATUS_0_PIX0_OVERFLOW   (1 << 12)
> +#define ISPIF_VFE_m_IRQ_STATUS_0_RDI0_OVERFLOW   (1 << 25)
> +#define ISPIF_VFE_m_IRQ_STATUS_1(m)  (0x220 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_STATUS_1_PIX1_OVERFLOW   (1 << 12)
> +#define ISPIF_VFE_m_IRQ_STATUS_1_RDI1_OVERFLOW   (1 << 25)
> +#define ISPIF_VFE_m_IRQ_STATUS_2(m)  (0x224 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW   (1 << 12)
> +#define ISPIF_VFE_m_IRQ_CLEAR_0(m)   (0x230 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_CLEAR_1(m)   (0x234 + 0x200 * (m))
> +#define ISPIF_VFE_m_IRQ_CLEAR_2(m)   (0x238 + 0x200 * (m))
> +#define ISPIF_VFE_m_INTF_INPUT_SEL(m)(0x244 + 0x200 * (m))
> +#define ISPIF_VFE_m_INTF_CMD_0(m)(0x248 + 0x200 * (m))
> +#define ISPIF_VFE_m_INTF_CMD_1(m)(0x24c + 0x200 * (m))
> +#define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n)\
> + (0x254 + 0x200 * (m) + 0x4 * (n))
> +#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n)\
> + (0x264 + 0x200 * (m) + 0x4 * (n))
> +#define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n)  \
> + (0x2c0 + 0x200 * (m) + 0x4 * (n))
> +#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n)  \
> + (0x2d0 + 0x200 * (m) + 0x4 * (n))
> +
> +#define CSI_PIX_CLK_MUX_SEL  0x000
> +#define CSI_RDI_CLK_MUX_SEL  0x008
> +
> +#define ISPIF_TIMEOUT_SLEEP_US   1000
> +#define ISPIF_TIMEOUT_ALL_US 100
> +#define ISPIF_RESET_TIMEOUT_MS   500
> +
> +enum ispif_intf_cmd {
> + CMD_DISABLE_FRAME_BOUNDARY = 0x0,
> + CMD_ENABLE_FRAME_BOUNDARY = 0x1,
> + CMD_DISABLE_IMMEDIATELY = 0x2,
> + CMD_ALL_DISABLE_IMMEDIATELY = 0x,
> + CMD_ALL_NO_CHANGE = 0x,
> +};
> +
> +static const u32 ispif_formats[] = {
> + 

[PATCH v3 09/23] media: camss: Add ISPIF files

2017-07-17 Thread Todor Tomov
These files control the ISPIF module which handles the routing of the data
streams from the CSIDs to the inputs of the VFE.

Signed-off-by: Todor Tomov 
---
 .../media/platform/qcom/camss-8x16/camss-ispif.c   | 1127 
 .../media/platform/qcom/camss-8x16/camss-ispif.h   |   85 ++
 2 files changed, 1212 insertions(+)
 create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.c
 create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.h

diff --git a/drivers/media/platform/qcom/camss-8x16/camss-ispif.c 
b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
new file mode 100644
index 000..cc32085
--- /dev/null
+++ b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
@@ -0,0 +1,1127 @@
+/*
+ * camss-ispif.c
+ *
+ * Qualcomm MSM Camera Subsystem - ISPIF Module
+ *
+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2015-2017 Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "camss-ispif.h"
+#include "camss.h"
+
+#define MSM_ISPIF_NAME "msm_ispif"
+
+#define ispif_line_array(ptr_line) \
+   ((const struct ispif_line (*)[]) &(ptr_line[-(ptr_line->id)]))
+
+#define to_ispif(ptr_line) \
+   container_of(ispif_line_array(ptr_line), struct ispif_device, ptr_line)
+
+#define ISPIF_RST_CMD_00x008
+#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x01c
+#define ISPIF_VFE_m_CTRL_0(m)  (0x200 + 0x200 * (m))
+#define ISPIF_VFE_m_CTRL_0_PIX0_LINE_BUF_EN(1 << 6)
+#define ISPIF_VFE_m_IRQ_MASK_0(m)  (0x208 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE 0x1249
+#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_MASK   0x1fff
+#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE 0x02492000
+#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_MASK   0x03ffe000
+#define ISPIF_VFE_m_IRQ_MASK_1(m)  (0x20c + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE 0x1249
+#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_MASK   0x1fff
+#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE 0x02492000
+#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_MASK   0x03ffe000
+#define ISPIF_VFE_m_IRQ_MASK_2(m)  (0x210 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE 0x1249
+#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_MASK   0x1fff
+#define ISPIF_VFE_m_IRQ_STATUS_0(m)(0x21c + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_STATUS_0_PIX0_OVERFLOW (1 << 12)
+#define ISPIF_VFE_m_IRQ_STATUS_0_RDI0_OVERFLOW (1 << 25)
+#define ISPIF_VFE_m_IRQ_STATUS_1(m)(0x220 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_STATUS_1_PIX1_OVERFLOW (1 << 12)
+#define ISPIF_VFE_m_IRQ_STATUS_1_RDI1_OVERFLOW (1 << 25)
+#define ISPIF_VFE_m_IRQ_STATUS_2(m)(0x224 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW (1 << 12)
+#define ISPIF_VFE_m_IRQ_CLEAR_0(m) (0x230 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_CLEAR_1(m) (0x234 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_CLEAR_2(m) (0x238 + 0x200 * (m))
+#define ISPIF_VFE_m_INTF_INPUT_SEL(m)  (0x244 + 0x200 * (m))
+#define ISPIF_VFE_m_INTF_CMD_0(m)  (0x248 + 0x200 * (m))
+#define ISPIF_VFE_m_INTF_CMD_1(m)  (0x24c + 0x200 * (m))
+#define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n)  \
+   (0x254 + 0x200 * (m) + 0x4 * (n))
+#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n)  \
+   (0x264 + 0x200 * (m) + 0x4 * (n))
+#define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n)\
+   (0x2c0 + 0x200 * (m) + 0x4 * (n))
+#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n)\
+   (0x2d0 + 0x200 * (m) + 0x4 * (n))
+
+#define CSI_PIX_CLK_MUX_SEL0x000
+#define CSI_RDI_CLK_MUX_SEL0x008
+
+#define ISPIF_TIMEOUT_SLEEP_US 1000
+#define ISPIF_TIMEOUT_ALL_US   100
+#define ISPIF_RESET_TIMEOUT_MS 500
+
+enum ispif_intf_cmd {
+   CMD_DISABLE_FRAME_BOUNDARY = 0x0,
+   CMD_ENABLE_FRAME_BOUNDARY = 0x1,
+   CMD_DISABLE_IMMEDIATELY = 0x2,
+   CMD_ALL_DISABLE_IMMEDIATELY = 0x,
+   CMD_ALL_NO_CHANGE = 0x,
+};
+
+static const u32 ispif_formats[] = {
+   MEDIA_BUS_FMT_UYVY8_2X8,
+   MEDIA_BUS_FMT_VYUY8_2X8,
+   MEDIA_BUS_FMT_YUYV8_2X8,
+   MEDIA_BUS_FMT_YVYU8_2X8,
+   MEDIA_BUS_FMT_SBGGR8_1X8,
+   MEDIA_BUS_FMT_SGBRG8_1X8,
+   MEDIA_BUS_FMT_SGRBG8_1X8,
+   MEDIA_BUS_FMT_SRGGB8_1X8,
+   

[PATCH v3 09/23] media: camss: Add ISPIF files

2017-07-17 Thread Todor Tomov
These files control the ISPIF module which handles the routing of the data
streams from the CSIDs to the inputs of the VFE.

Signed-off-by: Todor Tomov 
---
 .../media/platform/qcom/camss-8x16/camss-ispif.c   | 1127 
 .../media/platform/qcom/camss-8x16/camss-ispif.h   |   85 ++
 2 files changed, 1212 insertions(+)
 create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.c
 create mode 100644 drivers/media/platform/qcom/camss-8x16/camss-ispif.h

diff --git a/drivers/media/platform/qcom/camss-8x16/camss-ispif.c 
b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
new file mode 100644
index 000..cc32085
--- /dev/null
+++ b/drivers/media/platform/qcom/camss-8x16/camss-ispif.c
@@ -0,0 +1,1127 @@
+/*
+ * camss-ispif.c
+ *
+ * Qualcomm MSM Camera Subsystem - ISPIF Module
+ *
+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2015-2017 Linaro Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "camss-ispif.h"
+#include "camss.h"
+
+#define MSM_ISPIF_NAME "msm_ispif"
+
+#define ispif_line_array(ptr_line) \
+   ((const struct ispif_line (*)[]) &(ptr_line[-(ptr_line->id)]))
+
+#define to_ispif(ptr_line) \
+   container_of(ispif_line_array(ptr_line), struct ispif_device, ptr_line)
+
+#define ISPIF_RST_CMD_00x008
+#define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x01c
+#define ISPIF_VFE_m_CTRL_0(m)  (0x200 + 0x200 * (m))
+#define ISPIF_VFE_m_CTRL_0_PIX0_LINE_BUF_EN(1 << 6)
+#define ISPIF_VFE_m_IRQ_MASK_0(m)  (0x208 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE 0x1249
+#define ISPIF_VFE_m_IRQ_MASK_0_PIX0_MASK   0x1fff
+#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE 0x02492000
+#define ISPIF_VFE_m_IRQ_MASK_0_RDI0_MASK   0x03ffe000
+#define ISPIF_VFE_m_IRQ_MASK_1(m)  (0x20c + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE 0x1249
+#define ISPIF_VFE_m_IRQ_MASK_1_PIX1_MASK   0x1fff
+#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE 0x02492000
+#define ISPIF_VFE_m_IRQ_MASK_1_RDI1_MASK   0x03ffe000
+#define ISPIF_VFE_m_IRQ_MASK_2(m)  (0x210 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE 0x1249
+#define ISPIF_VFE_m_IRQ_MASK_2_RDI2_MASK   0x1fff
+#define ISPIF_VFE_m_IRQ_STATUS_0(m)(0x21c + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_STATUS_0_PIX0_OVERFLOW (1 << 12)
+#define ISPIF_VFE_m_IRQ_STATUS_0_RDI0_OVERFLOW (1 << 25)
+#define ISPIF_VFE_m_IRQ_STATUS_1(m)(0x220 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_STATUS_1_PIX1_OVERFLOW (1 << 12)
+#define ISPIF_VFE_m_IRQ_STATUS_1_RDI1_OVERFLOW (1 << 25)
+#define ISPIF_VFE_m_IRQ_STATUS_2(m)(0x224 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW (1 << 12)
+#define ISPIF_VFE_m_IRQ_CLEAR_0(m) (0x230 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_CLEAR_1(m) (0x234 + 0x200 * (m))
+#define ISPIF_VFE_m_IRQ_CLEAR_2(m) (0x238 + 0x200 * (m))
+#define ISPIF_VFE_m_INTF_INPUT_SEL(m)  (0x244 + 0x200 * (m))
+#define ISPIF_VFE_m_INTF_CMD_0(m)  (0x248 + 0x200 * (m))
+#define ISPIF_VFE_m_INTF_CMD_1(m)  (0x24c + 0x200 * (m))
+#define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n)  \
+   (0x254 + 0x200 * (m) + 0x4 * (n))
+#define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n)  \
+   (0x264 + 0x200 * (m) + 0x4 * (n))
+#define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n)\
+   (0x2c0 + 0x200 * (m) + 0x4 * (n))
+#define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n)\
+   (0x2d0 + 0x200 * (m) + 0x4 * (n))
+
+#define CSI_PIX_CLK_MUX_SEL0x000
+#define CSI_RDI_CLK_MUX_SEL0x008
+
+#define ISPIF_TIMEOUT_SLEEP_US 1000
+#define ISPIF_TIMEOUT_ALL_US   100
+#define ISPIF_RESET_TIMEOUT_MS 500
+
+enum ispif_intf_cmd {
+   CMD_DISABLE_FRAME_BOUNDARY = 0x0,
+   CMD_ENABLE_FRAME_BOUNDARY = 0x1,
+   CMD_DISABLE_IMMEDIATELY = 0x2,
+   CMD_ALL_DISABLE_IMMEDIATELY = 0x,
+   CMD_ALL_NO_CHANGE = 0x,
+};
+
+static const u32 ispif_formats[] = {
+   MEDIA_BUS_FMT_UYVY8_2X8,
+   MEDIA_BUS_FMT_VYUY8_2X8,
+   MEDIA_BUS_FMT_YUYV8_2X8,
+   MEDIA_BUS_FMT_YVYU8_2X8,
+   MEDIA_BUS_FMT_SBGGR8_1X8,
+   MEDIA_BUS_FMT_SGBRG8_1X8,
+   MEDIA_BUS_FMT_SGRBG8_1X8,
+   MEDIA_BUS_FMT_SRGGB8_1X8,
+   MEDIA_BUS_FMT_SBGGR10_1X10,
+