[PATCH v3 1/4] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

2017-08-18 Thread Corentin Labbe
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe 
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 28 +++-
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 4b599b5d26f6..74fdfcc9dfd3 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -417,14 +417,32 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio_parent: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
+   };
+   mdio-mux {
+   compatible = "allwinner,sun8i-h3-mdio-switch";
+   mdio-parent-bus = <_parent>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   internal_mdio: mdio@1 {
reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   mdio: mdio@0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
};
};
};
-- 
2.13.0



[PATCH v3 1/4] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

2017-08-18 Thread Corentin Labbe
Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe 
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 28 +++-
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 4b599b5d26f6..74fdfcc9dfd3 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -417,14 +417,32 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio_parent: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
+   };
+   mdio-mux {
+   compatible = "allwinner,sun8i-h3-mdio-switch";
+   mdio-parent-bus = <_parent>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   internal_mdio: mdio@1 {
reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   mdio: mdio@0 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
};
};
};
-- 
2.13.0