Re: [PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
On Wed, May 25, 2016 at 07:15:25PM -0400, Rich Felker wrote: > On Wed, May 25, 2016 at 11:33:50AM +0100, Mark Rutland wrote: > > On Wed, May 25, 2016 at 05:43:03AM +, Rich Felker wrote: > > > Signed-off-by: Rich Felker> > > --- > > > arch/sh/boot/dts/j2_mimas_v2.dts | 87 > > > > > > 1 file changed, 87 insertions(+) > > > create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts > > > > > > diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts > > > b/arch/sh/boot/dts/j2_mimas_v2.dts > > > new file mode 100755 > > > index 000..4a66cda > > > --- /dev/null > > > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts > > > @@ -0,0 +1,87 @@ > > > +/dts-v1/; > > > + > > > +/ { > > > + compatible = "jcore,j2-soc"; > > > + model = "J2 FPGA SoC on Mimas v2 board"; > > > + > > > + #address-cells = <1>; > > > + #size-cells = <1>; > > > + > > > + interrupt-parent = <>; > > > + > > > + cpus { > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + cpu@0 { > > > + device_type = "cpu"; > > > + compatible = "jcore,j2"; > > > + reg = < 0 >; > > > + clock-frequency = < 5000 >; > > > > Nit: please remove the spacing around the '<' and '>' here. If nothing > > else, it's inconsistent with the rest of this file. > > > > > + }; > > > + }; > > > + > > > + memory@1000 { > > > + device_type = "memory"; > > > + reg = < 0x1000 0x400 >; > > > + }; > > > > Likewise. > > OK, I'll change both of these. > > > > + > > > + chosen { > > > + stdout-path = "/soc@abcd/serial@100"; > > > + }; > > > > Please use a label for the serial node, have an alias, and describe the > > pre-configured rate per the stdout-path binding, e.g. > > Per Documentation/devicetree/bindings/xilinx.txt, current-speed is a > required property for "xlnx,xps-uartlite-1.00.a". Note that uartlite > does not actually have a programmable baud rate; the property is > instead being used to describe the hardware-provided rate. Ah, ok. I was not aware of this. > BTW our uartlite is not actually derived from Xilinx's IP core, just > interface-compatible with it, so I'd actually like to add a > "jcore,uartlite" binding too in order to express this, with > "xlnx,xps-uartlite-1.00.a" as the fallback compatible-tag. I'll > propose that as a separate patch later. Please do. Thanks, Mark.
Re: [PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
On Wed, May 25, 2016 at 07:15:25PM -0400, Rich Felker wrote: > On Wed, May 25, 2016 at 11:33:50AM +0100, Mark Rutland wrote: > > On Wed, May 25, 2016 at 05:43:03AM +, Rich Felker wrote: > > > Signed-off-by: Rich Felker > > > --- > > > arch/sh/boot/dts/j2_mimas_v2.dts | 87 > > > > > > 1 file changed, 87 insertions(+) > > > create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts > > > > > > diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts > > > b/arch/sh/boot/dts/j2_mimas_v2.dts > > > new file mode 100755 > > > index 000..4a66cda > > > --- /dev/null > > > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts > > > @@ -0,0 +1,87 @@ > > > +/dts-v1/; > > > + > > > +/ { > > > + compatible = "jcore,j2-soc"; > > > + model = "J2 FPGA SoC on Mimas v2 board"; > > > + > > > + #address-cells = <1>; > > > + #size-cells = <1>; > > > + > > > + interrupt-parent = <>; > > > + > > > + cpus { > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + cpu@0 { > > > + device_type = "cpu"; > > > + compatible = "jcore,j2"; > > > + reg = < 0 >; > > > + clock-frequency = < 5000 >; > > > > Nit: please remove the spacing around the '<' and '>' here. If nothing > > else, it's inconsistent with the rest of this file. > > > > > + }; > > > + }; > > > + > > > + memory@1000 { > > > + device_type = "memory"; > > > + reg = < 0x1000 0x400 >; > > > + }; > > > > Likewise. > > OK, I'll change both of these. > > > > + > > > + chosen { > > > + stdout-path = "/soc@abcd/serial@100"; > > > + }; > > > > Please use a label for the serial node, have an alias, and describe the > > pre-configured rate per the stdout-path binding, e.g. > > Per Documentation/devicetree/bindings/xilinx.txt, current-speed is a > required property for "xlnx,xps-uartlite-1.00.a". Note that uartlite > does not actually have a programmable baud rate; the property is > instead being used to describe the hardware-provided rate. Ah, ok. I was not aware of this. > BTW our uartlite is not actually derived from Xilinx's IP core, just > interface-compatible with it, so I'd actually like to add a > "jcore,uartlite" binding too in order to express this, with > "xlnx,xps-uartlite-1.00.a" as the fallback compatible-tag. I'll > propose that as a separate patch later. Please do. Thanks, Mark.
Re: [PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
On Wed, May 25, 2016 at 11:33:50AM +0100, Mark Rutland wrote: > On Wed, May 25, 2016 at 05:43:03AM +, Rich Felker wrote: > > Signed-off-by: Rich Felker> > --- > > arch/sh/boot/dts/j2_mimas_v2.dts | 87 > > > > 1 file changed, 87 insertions(+) > > create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts > > > > diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts > > b/arch/sh/boot/dts/j2_mimas_v2.dts > > new file mode 100755 > > index 000..4a66cda > > --- /dev/null > > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts > > @@ -0,0 +1,87 @@ > > +/dts-v1/; > > + > > +/ { > > + compatible = "jcore,j2-soc"; > > + model = "J2 FPGA SoC on Mimas v2 board"; > > + > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + interrupt-parent = <>; > > + > > + cpus { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + cpu@0 { > > + device_type = "cpu"; > > + compatible = "jcore,j2"; > > + reg = < 0 >; > > + clock-frequency = < 5000 >; > > Nit: please remove the spacing around the '<' and '>' here. If nothing > else, it's inconsistent with the rest of this file. > > > + }; > > + }; > > + > > + memory@1000 { > > + device_type = "memory"; > > + reg = < 0x1000 0x400 >; > > + }; > > Likewise. OK, I'll change both of these. > > + > > + chosen { > > + stdout-path = "/soc@abcd/serial@100"; > > + }; > > Please use a label for the serial node, have an alias, and describe the > pre-configured rate per the stdout-path binding, e.g. Per Documentation/devicetree/bindings/xilinx.txt, current-speed is a required property for "xlnx,xps-uartlite-1.00.a". Note that uartlite does not actually have a programmable baud rate; the property is instead being used to describe the hardware-provided rate. BTW our uartlite is not actually derived from Xilinx's IP core, just interface-compatible with it, so I'd actually like to add a "jcore,uartlite" binding too in order to express this, with "xlnx,xps-uartlite-1.00.a" as the fallback compatible-tag. I'll propose that as a separate patch later. Rich
Re: [PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
On Wed, May 25, 2016 at 11:33:50AM +0100, Mark Rutland wrote: > On Wed, May 25, 2016 at 05:43:03AM +, Rich Felker wrote: > > Signed-off-by: Rich Felker > > --- > > arch/sh/boot/dts/j2_mimas_v2.dts | 87 > > > > 1 file changed, 87 insertions(+) > > create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts > > > > diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts > > b/arch/sh/boot/dts/j2_mimas_v2.dts > > new file mode 100755 > > index 000..4a66cda > > --- /dev/null > > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts > > @@ -0,0 +1,87 @@ > > +/dts-v1/; > > + > > +/ { > > + compatible = "jcore,j2-soc"; > > + model = "J2 FPGA SoC on Mimas v2 board"; > > + > > + #address-cells = <1>; > > + #size-cells = <1>; > > + > > + interrupt-parent = <>; > > + > > + cpus { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + cpu@0 { > > + device_type = "cpu"; > > + compatible = "jcore,j2"; > > + reg = < 0 >; > > + clock-frequency = < 5000 >; > > Nit: please remove the spacing around the '<' and '>' here. If nothing > else, it's inconsistent with the rest of this file. > > > + }; > > + }; > > + > > + memory@1000 { > > + device_type = "memory"; > > + reg = < 0x1000 0x400 >; > > + }; > > Likewise. OK, I'll change both of these. > > + > > + chosen { > > + stdout-path = "/soc@abcd/serial@100"; > > + }; > > Please use a label for the serial node, have an alias, and describe the > pre-configured rate per the stdout-path binding, e.g. Per Documentation/devicetree/bindings/xilinx.txt, current-speed is a required property for "xlnx,xps-uartlite-1.00.a". Note that uartlite does not actually have a programmable baud rate; the property is instead being used to describe the hardware-provided rate. BTW our uartlite is not actually derived from Xilinx's IP core, just interface-compatible with it, so I'd actually like to add a "jcore,uartlite" binding too in order to express this, with "xlnx,xps-uartlite-1.00.a" as the fallback compatible-tag. I'll propose that as a separate patch later. Rich
Re: [PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
On Wed, May 25, 2016 at 05:43:03AM +, Rich Felker wrote: > Signed-off-by: Rich Felker> --- > arch/sh/boot/dts/j2_mimas_v2.dts | 87 > > 1 file changed, 87 insertions(+) > create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts > > diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts > b/arch/sh/boot/dts/j2_mimas_v2.dts > new file mode 100755 > index 000..4a66cda > --- /dev/null > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts > @@ -0,0 +1,87 @@ > +/dts-v1/; > + > +/ { > + compatible = "jcore,j2-soc"; > + model = "J2 FPGA SoC on Mimas v2 board"; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + interrupt-parent = <>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "jcore,j2"; > + reg = < 0 >; > + clock-frequency = < 5000 >; Nit: please remove the spacing around the '<' and '>' here. If nothing else, it's inconsistent with the rest of this file. > + }; > + }; > + > + memory@1000 { > + device_type = "memory"; > + reg = < 0x1000 0x400 >; > + }; Likewise. > + > + chosen { > + stdout-path = "/soc@abcd/serial@100"; > + }; Please use a label for the serial node, have an alias, and describe the pre-configured rate per the stdout-path binding, e.g. aliases { serial0 = }; chosen { stdout-path = "serial0:19200n8"; }; ... soc@abcd { ... uart0: serial@100 { ... }; }; Note that using stdout-path is preferable to current-speed or other UART-specific bindings. Thanks, Mark. > + > + soc@abcd { > + compatible = "simple-bus"; > + ranges = <0 0xabcd 0x10>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + aic: interrupt-controller@200 { > + compatible = "jcore,aic1"; > + reg = < 0x200 0x10 >; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + > + cache-controller@c0 { > + compatible = "jcore,cache"; > + reg = < 0xc0 4 >; > + }; > + > + timer@200 { > + compatible = "jcore,pit"; > + reg = < 0x200 0x30 >; > + interrupts = < 0x48 >; > + }; > + > + spi@40 { > + compatible = "jcore,spi2"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + spi-max-frequency = <1250>; > + > + reg = < 0x40 0x8 >; > + > + sdcard@0 { > + compatible = "mmc-spi-slot"; > + reg = <0>; > + spi-max-frequency = <1250>; > + voltage-ranges = <3200 3400>; > + mode = <0>; > + }; > + }; > + > + serial@100 { > + clock-frequency = <12500>; > + compatible = "xlnx,xps-uartlite-1.00.a"; > + current-speed = <19200>; > + device_type = "serial"; > + interrupts = < 0x12 >; > + port-number = <0>; > + reg = < 0x100 0x10 >; > + }; > + }; > +}; > -- > 2.8.1 >
Re: [PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
On Wed, May 25, 2016 at 05:43:03AM +, Rich Felker wrote: > Signed-off-by: Rich Felker > --- > arch/sh/boot/dts/j2_mimas_v2.dts | 87 > > 1 file changed, 87 insertions(+) > create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts > > diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts > b/arch/sh/boot/dts/j2_mimas_v2.dts > new file mode 100755 > index 000..4a66cda > --- /dev/null > +++ b/arch/sh/boot/dts/j2_mimas_v2.dts > @@ -0,0 +1,87 @@ > +/dts-v1/; > + > +/ { > + compatible = "jcore,j2-soc"; > + model = "J2 FPGA SoC on Mimas v2 board"; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + interrupt-parent = <>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + device_type = "cpu"; > + compatible = "jcore,j2"; > + reg = < 0 >; > + clock-frequency = < 5000 >; Nit: please remove the spacing around the '<' and '>' here. If nothing else, it's inconsistent with the rest of this file. > + }; > + }; > + > + memory@1000 { > + device_type = "memory"; > + reg = < 0x1000 0x400 >; > + }; Likewise. > + > + chosen { > + stdout-path = "/soc@abcd/serial@100"; > + }; Please use a label for the serial node, have an alias, and describe the pre-configured rate per the stdout-path binding, e.g. aliases { serial0 = }; chosen { stdout-path = "serial0:19200n8"; }; ... soc@abcd { ... uart0: serial@100 { ... }; }; Note that using stdout-path is preferable to current-speed or other UART-specific bindings. Thanks, Mark. > + > + soc@abcd { > + compatible = "simple-bus"; > + ranges = <0 0xabcd 0x10>; > + > + #address-cells = <1>; > + #size-cells = <1>; > + > + aic: interrupt-controller@200 { > + compatible = "jcore,aic1"; > + reg = < 0x200 0x10 >; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; > + > + cache-controller@c0 { > + compatible = "jcore,cache"; > + reg = < 0xc0 4 >; > + }; > + > + timer@200 { > + compatible = "jcore,pit"; > + reg = < 0x200 0x30 >; > + interrupts = < 0x48 >; > + }; > + > + spi@40 { > + compatible = "jcore,spi2"; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + spi-max-frequency = <1250>; > + > + reg = < 0x40 0x8 >; > + > + sdcard@0 { > + compatible = "mmc-spi-slot"; > + reg = <0>; > + spi-max-frequency = <1250>; > + voltage-ranges = <3200 3400>; > + mode = <0>; > + }; > + }; > + > + serial@100 { > + clock-frequency = <12500>; > + compatible = "xlnx,xps-uartlite-1.00.a"; > + current-speed = <19200>; > + device_type = "serial"; > + interrupts = < 0x12 >; > + port-number = <0>; > + reg = < 0x100 0x10 >; > + }; > + }; > +}; > -- > 2.8.1 >
[PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
Signed-off-by: Rich Felker--- arch/sh/boot/dts/j2_mimas_v2.dts | 87 1 file changed, 87 insertions(+) create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts new file mode 100755 index 000..4a66cda --- /dev/null +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -0,0 +1,87 @@ +/dts-v1/; + +/ { + compatible = "jcore,j2-soc"; + model = "J2 FPGA SoC on Mimas v2 board"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "jcore,j2"; + reg = < 0 >; + clock-frequency = < 5000 >; + }; + }; + + memory@1000 { + device_type = "memory"; + reg = < 0x1000 0x400 >; + }; + + chosen { + stdout-path = "/soc@abcd/serial@100"; + }; + + soc@abcd { + compatible = "simple-bus"; + ranges = <0 0xabcd 0x10>; + + #address-cells = <1>; + #size-cells = <1>; + + aic: interrupt-controller@200 { + compatible = "jcore,aic1"; + reg = < 0x200 0x10 >; + interrupt-controller; + #interrupt-cells = <1>; + }; + + cache-controller@c0 { + compatible = "jcore,cache"; + reg = < 0xc0 4 >; + }; + + timer@200 { + compatible = "jcore,pit"; + reg = < 0x200 0x30 >; + interrupts = < 0x48 >; + }; + + spi@40 { + compatible = "jcore,spi2"; + + #address-cells = <1>; + #size-cells = <0>; + + spi-max-frequency = <1250>; + + reg = < 0x40 0x8 >; + + sdcard@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + spi-max-frequency = <1250>; + voltage-ranges = <3200 3400>; + mode = <0>; + }; + }; + + serial@100 { + clock-frequency = <12500>; + compatible = "xlnx,xps-uartlite-1.00.a"; + current-speed = <19200>; + device_type = "serial"; + interrupts = < 0x12 >; + port-number = <0>; + reg = < 0x100 0x10 >; + }; + }; +}; -- 2.8.1
[PATCH v3 12/12] sh: add device tree source for J2 FPGA on Mimas v2 board
Signed-off-by: Rich Felker --- arch/sh/boot/dts/j2_mimas_v2.dts | 87 1 file changed, 87 insertions(+) create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts new file mode 100755 index 000..4a66cda --- /dev/null +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -0,0 +1,87 @@ +/dts-v1/; + +/ { + compatible = "jcore,j2-soc"; + model = "J2 FPGA SoC on Mimas v2 board"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "jcore,j2"; + reg = < 0 >; + clock-frequency = < 5000 >; + }; + }; + + memory@1000 { + device_type = "memory"; + reg = < 0x1000 0x400 >; + }; + + chosen { + stdout-path = "/soc@abcd/serial@100"; + }; + + soc@abcd { + compatible = "simple-bus"; + ranges = <0 0xabcd 0x10>; + + #address-cells = <1>; + #size-cells = <1>; + + aic: interrupt-controller@200 { + compatible = "jcore,aic1"; + reg = < 0x200 0x10 >; + interrupt-controller; + #interrupt-cells = <1>; + }; + + cache-controller@c0 { + compatible = "jcore,cache"; + reg = < 0xc0 4 >; + }; + + timer@200 { + compatible = "jcore,pit"; + reg = < 0x200 0x30 >; + interrupts = < 0x48 >; + }; + + spi@40 { + compatible = "jcore,spi2"; + + #address-cells = <1>; + #size-cells = <0>; + + spi-max-frequency = <1250>; + + reg = < 0x40 0x8 >; + + sdcard@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + spi-max-frequency = <1250>; + voltage-ranges = <3200 3400>; + mode = <0>; + }; + }; + + serial@100 { + clock-frequency = <12500>; + compatible = "xlnx,xps-uartlite-1.00.a"; + current-speed = <19200>; + device_type = "serial"; + interrupts = < 0x12 >; + port-number = <0>; + reg = < 0x100 0x10 >; + }; + }; +}; -- 2.8.1