On Wed, 2019-08-07 at 08:26 +, Philippe Schenker wrote:
> Do not change the clock as the power for this phy is switched
> with that clock.
>
> Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +-
> 1 file changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> index d56728f03c35..1019ce69a242 100644
> --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi
> +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi
> @@ -62,8 +62,9 @@
> };
>
> {
> - pinctrl-names = "default";
> + pinctrl-names = "default", "sleep";
> pinctrl-0 = <_enet2>;
> + pinctrl-1 = <_enet2_sleep>;
> phy-mode = "rmii";
> phy-handle = <>;
> status = "okay";
> @@ -220,6 +221,21 @@
> >;
> };
>
> + pinctrl_enet2_sleep: enet2sleepgrp {
> + fsl,pins = <
> + MX6UL_PAD_GPIO1_IO06__GPIO1_IO060x0
> + MX6UL_PAD_GPIO1_IO07__GPIO1_IO070x0
> + MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO080x0
> + MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO090x0
> + MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x0
> + MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x0
> + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x400
> 1b031
> + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO110x0
> + MX6UL_PAD_ENET2_TX_DATA1__GPIO2_IO120x0
> + MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x0
> + >;
> + };
> +
> pinctrl_ecspi1_cs: ecspi1-cs-grp {
> fsl,pins = <
> MX6UL_PAD_LCD_DATA21__GPIO3_IO260x000a0