The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using
the device tree.
Signed-off-by: Josh Cartwright
Cc: John Linn
---
arch/arm/boot/dts/zynq-ep107.dts | 9 +
arch/arm/mach-zynq/common.c| 9 +
arch/arm/mach-zynq/include/mach/zynq_soc.h | 4
3 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
index 7bfff4a..87204d7 100644
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ b/arch/arm/boot/dts/zynq-ep107.dts
@@ -44,6 +44,15 @@
<0xF8F00100 0x100>;
};
+ L2: cache-controller {
+ compatible = "arm,pl310-cache";
+ reg = <0xF8F02000 0x1000>;
+ arm,data-latency = <2 3 2>;
+ arm,tag-latency = <2 3 2>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
uart0: uart@e000 {
compatible = "xlnx,xuartps";
reg = <0xE000 0x1000>;
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index d73963b..056091a 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -45,12 +45,10 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = {
*/
static void __init xilinx_init_machine(void)
{
-#ifdef CONFIG_CACHE_L2X0
/*
* 64KB way size, 8-way associativity, parity disabled
*/
- l2x0_init(PL310_L2CC_BASE, 0x0206, 0xF0F0);
-#endif
+ l2x0_of_init(0x0206, 0xF0F0);
of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
}
@@ -83,11 +81,6 @@ static struct map_desc io_desc[] __initdata = {
.pfn= __phys_to_pfn(SCU_PERIPH_PHYS),
.length = SZ_8K,
.type = MT_DEVICE,
- }, {
- .virtual= PL310_L2CC_VIRT,
- .pfn= __phys_to_pfn(PL310_L2CC_PHYS),
- .length = SZ_4K,
- .type = MT_DEVICE,
},
#ifdef CONFIG_DEBUG_LL
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h
b/arch/arm/mach-zynq/include/mach/zynq_soc.h
index 3d1c6a6..218283a 100644
--- a/arch/arm/mach-zynq/include/mach/zynq_soc.h
+++ b/arch/arm/mach-zynq/include/mach/zynq_soc.h
@@ -25,9 +25,6 @@
#define TTC0_PHYS 0xF8001000
#define TTC0_VIRT TTC0_PHYS
-#define PL310_L2CC_PHYS0xF8F02000
-#define PL310_L2CC_VIRTPL310_L2CC_PHYS
-
#define SCU_PERIPH_PHYS0xF8F0
#define SCU_PERIPH_VIRTSCU_PERIPH_PHYS
@@ -35,7 +32,6 @@
#define TTC0_BASE IOMEM(TTC0_VIRT)
#define SCU_PERIPH_BASEIOMEM(SCU_PERIPH_VIRT)
-#define PL310_L2CC_BASEIOMEM(PL310_L2CC_VIRT)
/*
* Mandatory for CONFIG_LL_DEBUG, UART is mapped virtual = physical
--
1.8.0
--
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