add Hisilicon BVT I2C controller driver support.
Signed-off-by: Pan Wen
---
change log
v4:
Modify the default frequency to 100KHz.
v3:
Add a SoC specific compatible string.
v2:
1)Fixed a compile error.
2)Dropped the clock-names property.
.../devicetree/bindings/i2c/i2c-hibvt.txt | 24 +
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile| 1 +
drivers/i2c/busses/i2c-hibvt.c | 737 +
4 files changed, 772 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i2c/i2c-hibvt.txt
create mode 100644 drivers/i2c/busses/i2c-hibvt.c
diff --git a/Documentation/devicetree/bindings/i2c/i2c-hibvt.txt
b/Documentation/devicetree/bindings/i2c/i2c-hibvt.txt
new file mode 100644
index 000..db3d2e2
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/i2c-hibvt.txt
@@ -0,0 +1,24 @@
+Hisilicon BVT I2C master controller
+
+Required properties:
+- compatible: should be "hisilicon,hibvt-i2c" and one of the following:
+ "hisilicon,hi3516cv300-i2c"
+- reg: physical base address of the controller and length of memory mapped.
+ region.
+- interrupts: interrupt number to the cpu.
+- clocks: phandles to input clocks.
+
+Optional properties:
+- clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to
10.
+
+Other properties:
+see Documentation/devicetree/bindings/i2c/i2c.txt.
+
+Examples:
+i2c_bus0: i2c@1211 {
+ compatible = "hisilicon,hi3516cv300-i2c", "hisilicon,hibvt-i2c";
+ reg = <0x1211 0x100>;
+ interrupts = <20>;
+ clocks = <&crg_ctrl HI3516CV300_APB_CLK>;
+ clock-frequency = <10>;
+};
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5c3993b..fc1b679 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -555,6 +555,16 @@ config I2C_GPIO
This is a very simple bitbanging I2C driver utilizing the
arch-neutral GPIO API to control the SCL and SDA lines.
+config I2C_HIBVT
+ tristate "Hisilicon BVT I2C Controller"
+ depends on ARCH_HISI
+ help
+ Say Y here to include support for Hisilicon BVT I2C controller in the
+ Hisilicon BVT SoCs.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-hibvt.
+
config I2C_HIGHLANDER
tristate "Highlander FPGA SMBus interface"
depends on SH_HIGHLANDER
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 37f2819..42ef2e0 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o
obj-$(CONFIG_I2C_EMEV2)+= i2c-emev2.o
obj-$(CONFIG_I2C_EXYNOS5) += i2c-exynos5.o
obj-$(CONFIG_I2C_GPIO) += i2c-gpio.o
+obj-$(CONFIG_I2C_HIBVT)+= i2c-hibvt.o
obj-$(CONFIG_I2C_HIGHLANDER) += i2c-highlander.o
obj-$(CONFIG_I2C_HIX5HD2) += i2c-hix5hd2.o
obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
diff --git a/drivers/i2c/busses/i2c-hibvt.c b/drivers/i2c/busses/i2c-hibvt.c
new file mode 100644
index 000..e8af63e
--- /dev/null
+++ b/drivers/i2c/busses/i2c-hibvt.c
@@ -0,0 +1,737 @@
+/*
+ * Hisilicon BVT I2C Controller Driver
+ *
+ * Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
+ *
+ * Authors: wen...@hisilicon.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/*
+ * I2C Registers offsets
+ */
+#define HIBVT_I2C_GLB 0x0
+#define HIBVT_I2C_SCL_H0x4
+#define HIBVT_I2C_SCL_L0x8
+#define HIBVT_I2C_DATA10x10
+#define HIBVT_I2C_TXF 0x20
+#define HIBVT_I2C_RXF 0x24
+#define HIBVT_I2C_CMD_BASE 0x30
+#define HIBVT_I2C_LOOP10xb0
+#define HIBVT_I2C_DST1 0xb4
+#define HIBVT_I2C_TX_WATER 0xc8
+#define HIBVT_I2C_RX_WATER 0xcc
+#define HIBVT_I2C_CTRL10xd0
+#define HIBVT_I2C_STAT 0xd8
+#define HIBVT_I2C_INTR_RAW 0xe0
+#define HIBVT_I2C_INTR_EN 0xe4
+#define HIBVT_I2C_INTR_STAT0xe8
+
+/*
+ * I2C Global Config Register -- HIBVT_I2C_GLB
+ */
+#define GLB_EN_MASKBIT(0)
+#define GLB_SDA_HOLD_MASK GENMASK(23, 8)
+#define GLB_SDA_HOLD_SHIFT (
