Re: [PATCH v4 09/13] mmc: mmci: add Qcom specifics of clk and datactrl registers.
On 30/05/14 10:55, Ulf Hansson wrote: On 28 May 2014 15:47, wrote: From: Srinivas Kandagatla This patch adds specifics of clk and datactrl register on Qualcomm SD Card controller. This patch also populates the Qcom variant data with these new values specific to Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 4 drivers/mmc/host/mmci.h | 17 + 2 files changed, 21 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 8deea4a..dbcb952 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -179,6 +179,10 @@ static struct variant_data variant_qcom = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, + .clkreg_enable = MCI_QCOM_CLK_FLOWENA | + MCI_QCOM_CLK_SELECT_IN_FBCLK, + .clkreg_8bit_bus_enable = MCI_QCOM_CLK_WIDEBUS_8, + .datactrl_mask_ddrmode = MCI_QCOM_CLK_SELECT_IN_DDR_MODE, This stuff should go in patch3. Yes, I will merge patch3 and this change-set in next version. .blksz_datactrl4= true, .datalength_bits= 24, .pwrreg_powerup = MCI_PWR_UP, diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index cd83ca3..706eb513 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -41,6 +41,15 @@ /* Modified PL180 on Versatile Express platform */ #define MCI_ARM_HWFCEN BIT(12) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CLK_WIDEBUS_8 (BIT(10) | BIT(11)) +#define MCI_QCOM_CLK_FLOWENA BIT(12) +#define MCI_QCOM_CLK_INVERTOUT BIT(13) + +/* select in latch data and command in */ +#define MCI_QCOM_CLK_SELECT_IN_FBCLK BIT(15) +#define MCI_QCOM_CLK_SELECT_IN_DDR_MODE(BIT(14) | BIT(15)) + #define MMCIARGUMENT 0x008 #define MMCICOMMAND0x00c #define MCI_CPSM_RESPONSE BIT(6) @@ -54,6 +63,14 @@ #define MCI_ST_NIENBIT(13) #define MCI_ST_CE_ATACMD BIT(14) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CSPM_DATCMD BIT(12) +#define MCI_QCOM_CSPM_MCIABORT BIT(13) +#define MCI_QCOM_CSPM_CCSENABLEBIT(14) +#define MCI_QCOM_CSPM_CCSDISABLE BIT(15) +#define MCI_QCOM_CSPM_AUTO_CMD19 BIT(16) +#define MCI_QCOM_CSPM_AUTO_CMD21 BIT(21) + Maybe you should have one patch in the beginning of the patchset, that adds all the new QCOM bits in the header file? Instead of splitting them up? Ok, I will do that in next version. Thanks, srini #define MMCIRESPCMD0x010 #define MMCIRESPONSE0 0x014 #define MMCIRESPONSE1 0x018 -- 1.9.1 Kind regards Ulf Hansson -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH v4 09/13] mmc: mmci: add Qcom specifics of clk and datactrl registers.
On 28 May 2014 15:47, wrote: > From: Srinivas Kandagatla > > This patch adds specifics of clk and datactrl register on Qualcomm SD > Card controller. This patch also populates the Qcom variant data with > these new values specific to Qualcomm SD Card Controller. > > Signed-off-by: Srinivas Kandagatla > Reviewed-by: Linus Walleij > --- > drivers/mmc/host/mmci.c | 4 > drivers/mmc/host/mmci.h | 17 + > 2 files changed, 21 insertions(+) > > diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c > index 8deea4a..dbcb952 100644 > --- a/drivers/mmc/host/mmci.c > +++ b/drivers/mmc/host/mmci.c > @@ -179,6 +179,10 @@ static struct variant_data variant_qcom = { > .fifosize = 16 * 4, > .fifohalfsize = 8 * 4, > .clkreg = MCI_CLK_ENABLE, > + .clkreg_enable = MCI_QCOM_CLK_FLOWENA | > + MCI_QCOM_CLK_SELECT_IN_FBCLK, > + .clkreg_8bit_bus_enable = MCI_QCOM_CLK_WIDEBUS_8, > + .datactrl_mask_ddrmode = MCI_QCOM_CLK_SELECT_IN_DDR_MODE, This stuff should go in patch3. > .blksz_datactrl4= true, > .datalength_bits= 24, > .pwrreg_powerup = MCI_PWR_UP, > diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h > index cd83ca3..706eb513 100644 > --- a/drivers/mmc/host/mmci.h > +++ b/drivers/mmc/host/mmci.h > @@ -41,6 +41,15 @@ > /* Modified PL180 on Versatile Express platform */ > #define MCI_ARM_HWFCEN BIT(12) > > +/* Modified on Qualcomm Integrations */ > +#define MCI_QCOM_CLK_WIDEBUS_8 (BIT(10) | BIT(11)) > +#define MCI_QCOM_CLK_FLOWENA BIT(12) > +#define MCI_QCOM_CLK_INVERTOUT BIT(13) > + > +/* select in latch data and command in */ > +#define MCI_QCOM_CLK_SELECT_IN_FBCLK BIT(15) > +#define MCI_QCOM_CLK_SELECT_IN_DDR_MODE(BIT(14) | BIT(15)) > + > #define MMCIARGUMENT 0x008 > #define MMCICOMMAND0x00c > #define MCI_CPSM_RESPONSE BIT(6) > @@ -54,6 +63,14 @@ > #define MCI_ST_NIENBIT(13) > #define MCI_ST_CE_ATACMD BIT(14) > > +/* Modified on Qualcomm Integrations */ > +#define MCI_QCOM_CSPM_DATCMD BIT(12) > +#define MCI_QCOM_CSPM_MCIABORT BIT(13) > +#define MCI_QCOM_CSPM_CCSENABLEBIT(14) > +#define MCI_QCOM_CSPM_CCSDISABLE BIT(15) > +#define MCI_QCOM_CSPM_AUTO_CMD19 BIT(16) > +#define MCI_QCOM_CSPM_AUTO_CMD21 BIT(21) > + Maybe you should have one patch in the beginning of the patchset, that adds all the new QCOM bits in the header file? Instead of splitting them up? > #define MMCIRESPCMD0x010 > #define MMCIRESPONSE0 0x014 > #define MMCIRESPONSE1 0x018 > -- > 1.9.1 > Kind regards Ulf Hansson -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
[PATCH v4 09/13] mmc: mmci: add Qcom specifics of clk and datactrl registers.
From: Srinivas Kandagatla This patch adds specifics of clk and datactrl register on Qualcomm SD Card controller. This patch also populates the Qcom variant data with these new values specific to Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 4 drivers/mmc/host/mmci.h | 17 + 2 files changed, 21 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 8deea4a..dbcb952 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -179,6 +179,10 @@ static struct variant_data variant_qcom = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, + .clkreg_enable = MCI_QCOM_CLK_FLOWENA | + MCI_QCOM_CLK_SELECT_IN_FBCLK, + .clkreg_8bit_bus_enable = MCI_QCOM_CLK_WIDEBUS_8, + .datactrl_mask_ddrmode = MCI_QCOM_CLK_SELECT_IN_DDR_MODE, .blksz_datactrl4= true, .datalength_bits= 24, .pwrreg_powerup = MCI_PWR_UP, diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index cd83ca3..706eb513 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -41,6 +41,15 @@ /* Modified PL180 on Versatile Express platform */ #define MCI_ARM_HWFCEN BIT(12) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CLK_WIDEBUS_8 (BIT(10) | BIT(11)) +#define MCI_QCOM_CLK_FLOWENA BIT(12) +#define MCI_QCOM_CLK_INVERTOUT BIT(13) + +/* select in latch data and command in */ +#define MCI_QCOM_CLK_SELECT_IN_FBCLK BIT(15) +#define MCI_QCOM_CLK_SELECT_IN_DDR_MODE(BIT(14) | BIT(15)) + #define MMCIARGUMENT 0x008 #define MMCICOMMAND0x00c #define MCI_CPSM_RESPONSE BIT(6) @@ -54,6 +63,14 @@ #define MCI_ST_NIENBIT(13) #define MCI_ST_CE_ATACMD BIT(14) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CSPM_DATCMD BIT(12) +#define MCI_QCOM_CSPM_MCIABORT BIT(13) +#define MCI_QCOM_CSPM_CCSENABLEBIT(14) +#define MCI_QCOM_CSPM_CCSDISABLE BIT(15) +#define MCI_QCOM_CSPM_AUTO_CMD19 BIT(16) +#define MCI_QCOM_CSPM_AUTO_CMD21 BIT(21) + #define MMCIRESPCMD0x010 #define MMCIRESPONSE0 0x014 #define MMCIRESPONSE1 0x018 -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/