Re: [PATCH v4 1/3] clk: samsung: Add clock driver for s5pc110/s5pv210
On Saturday, September 21, 2013 07:42:20 PM Mateusz Krawczuk wrote:
> This patch adds new, Common Clock Framework-based clock driver for Samsung
> S5PV210 SoCs. The driver is just added, without enabling it yet.
>
> Signed-off-by: Mateusz Krawczuk
> Signed-off-by: Kyungmin Park
I need the clock framework people to ACK this before I can apply it.
Thanks!
> ---
> .../bindings/clock/samsung,s5pv210-clock.txt | 75 +++
> drivers/clk/samsung/Makefile | 3 +
> drivers/clk/samsung/clk-s5pv210.c | 673
> +
> include/dt-bindings/clock/samsung,s5pv210-clock.h | 224 +++
> 4 files changed, 975 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
> create mode 100644 drivers/clk/samsung/clk-s5pv210.c
> create mode 100644 include/dt-bindings/clock/samsung,s5pv210-clock.h
>
> diff --git
> a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
> b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
> new file mode 100644
> index 000..a253b8d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
> @@ -0,0 +1,75 @@
> +* Samsung S5PC110/S5PV210 Clock Controller
> +
> +The S5PV210 clock controller generates and supplies clock to various
> controllers
> +within the SoC. The clock binding described here is applicable to all SoCs in
> +the S5PC110/S5PV210 family.
> +
> +Required Properties:
> +
> +- compatible: should be "samsung,s5pv210-clock".
> +
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +
> +- #clock-cells: should be 1.
> +
> +All available clocks are defined as preprocessor macros in
> +dt-bindings/clock/samsung,s5pv210-clock.h header and can be used in device
> +tree sources.
> +
> +External clocks:
> +
> +There are several clocks that are generated outside the SoC. It is expected
> +that they are defined using standard clock bindings with following
> +clock-output-names:
> + - "xxti": external crystal oscillator connected to XXTI and XXTO pins of
> +the SoC,
> + - "xusbxti": external crystal oscillator connected to XUSBXTI and XUSBXTO
> +pins of the SoC,
> +
> +A subset of above clocks available on given board shall be specified in
> +board device tree, including the system base clock, as selected by XOM[0]
> +pin of the SoC. Refer to generic fixed rate clock bindings
> +documentation[1] for more information how to specify these clocks.
> +
> +[1] Documentation/devicetree/bindings/clock/fixed-clock.txt
> +
> +Example: Clock controller node:
> +
> + clock: clock-controller@7e00f000 {
> + compatible = "samsung,s5pv210-clock";
> + reg = <0x7e00f000 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> +Example: Required external clocks:
> +
> + xxti: clock-xxti {
> + compatible = "fixed-clock";
> + clock-output-names = "xxti";
> + clock-frequency = <2400>;
> + #clock-cells = <0>;
> + };
> +
> + xusbxti: clock-xusbxti {
> + compatible = "fixed-clock";
> + clock-output-names = "xusbxti";
> + clock-frequency = <2400>;
> + #clock-cells = <0>;
> + };
> +
> +Example: UART controller node that consumes the clock generated by the clock
> + controller (refer to the standard clock bindings for information about
> + "clocks" and "clock-names" properties):
> +
> + uart0: serial@e290 {
> + compatible = "samsung,s5pv210-uart";
> + reg = <0xe290 0x400>;
> + interrupt-parent = <>;
> + interrupts = <10>;
> + clock-names = "uart", "clk_uart_baud0",
> + "clk_uart_baud1";
> + clocks = < UART0>, < UART0>,
> + < SCLK_UART0>;
> + status = "disabled";
> + };
> diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
> index 8eb4799..e08c45e 100644
> --- a/drivers/clk/samsung/Makefile
> +++ b/drivers/clk/samsung/Makefile
> @@ -9,3 +9,6 @@ obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5420.o
> obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
> obj-$(CONFIG_ARCH_EXYNOS)+= clk-exynos-audss.o
> obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
> +ifeq ($(CONFIG_COMMON_CLK), y)
> +obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o
> +endif
> \ No newline at end of file
> diff --git a/drivers/clk/samsung/clk-s5pv210.c
> b/drivers/clk/samsung/clk-s5pv210.c
> new file mode 100644
> index 000..4eeaa27
> --- /dev/null
> +++ b/drivers/clk/samsung/clk-s5pv210.c
> @@ -0,0 +1,673 @@
> +/*
> + * Copyright (c) 2013 Samsung Electronics Co., Ltd.
> + * Author: Mateusz Krawczuk
> + *
> + * Based on clock drivers for S3C64xx and Exynos4 SoCs.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License
Re: [PATCH v4 1/3] clk: samsung: Add clock driver for s5pc110/s5pv210
On Saturday, September 21, 2013 07:42:20 PM Mateusz Krawczuk wrote:
This patch adds new, Common Clock Framework-based clock driver for Samsung
S5PV210 SoCs. The driver is just added, without enabling it yet.
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
I need the clock framework people to ACK this before I can apply it.
Thanks!
---
.../bindings/clock/samsung,s5pv210-clock.txt | 75 +++
drivers/clk/samsung/Makefile | 3 +
drivers/clk/samsung/clk-s5pv210.c | 673
+
include/dt-bindings/clock/samsung,s5pv210-clock.h | 224 +++
4 files changed, 975 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
create mode 100644 drivers/clk/samsung/clk-s5pv210.c
create mode 100644 include/dt-bindings/clock/samsung,s5pv210-clock.h
diff --git
a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
new file mode 100644
index 000..a253b8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
@@ -0,0 +1,75 @@
+* Samsung S5PC110/S5PV210 Clock Controller
+
+The S5PV210 clock controller generates and supplies clock to various
controllers
+within the SoC. The clock binding described here is applicable to all SoCs in
+the S5PC110/S5PV210 family.
+
+Required Properties:
+
+- compatible: should be samsung,s5pv210-clock.
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/samsung,s5pv210-clock.h header and can be used in device
+tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - xxti: external crystal oscillator connected to XXTI and XXTO pins of
+the SoC,
+ - xusbxti: external crystal oscillator connected to XUSBXTI and XUSBXTO
+pins of the SoC,
+
+A subset of above clocks available on given board shall be specified in
+board device tree, including the system base clock, as selected by XOM[0]
+pin of the SoC. Refer to generic fixed rate clock bindings
+documentation[1] for more information how to specify these clocks.
+
+[1] Documentation/devicetree/bindings/clock/fixed-clock.txt
+
+Example: Clock controller node:
+
+ clock: clock-controller@7e00f000 {
+ compatible = samsung,s5pv210-clock;
+ reg = 0x7e00f000 0x1000;
+ #clock-cells = 1;
+ };
+
+Example: Required external clocks:
+
+ xxti: clock-xxti {
+ compatible = fixed-clock;
+ clock-output-names = xxti;
+ clock-frequency = 2400;
+ #clock-cells = 0;
+ };
+
+ xusbxti: clock-xusbxti {
+ compatible = fixed-clock;
+ clock-output-names = xusbxti;
+ clock-frequency = 2400;
+ #clock-cells = 0;
+ };
+
+Example: UART controller node that consumes the clock generated by the clock
+ controller (refer to the standard clock bindings for information about
+ clocks and clock-names properties):
+
+ uart0: serial@e290 {
+ compatible = samsung,s5pv210-uart;
+ reg = 0xe290 0x400;
+ interrupt-parent = vic1;
+ interrupts = 10;
+ clock-names = uart, clk_uart_baud0,
+ clk_uart_baud1;
+ clocks = clocks UART0, clocks UART0,
+ clocks SCLK_UART0;
+ status = disabled;
+ };
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 8eb4799..e08c45e 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -9,3 +9,6 @@ obj-$(CONFIG_SOC_EXYNOS5420) += clk-exynos5420.o
obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
obj-$(CONFIG_ARCH_EXYNOS)+= clk-exynos-audss.o
obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
+ifeq ($(CONFIG_COMMON_CLK), y)
+obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o
+endif
\ No newline at end of file
diff --git a/drivers/clk/samsung/clk-s5pv210.c
b/drivers/clk/samsung/clk-s5pv210.c
new file mode 100644
index 000..4eeaa27
--- /dev/null
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -0,0 +1,673 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Mateusz Krawczuk m.krawc...@partner.samsung.com
+ *
+ * Based on clock drivers for S3C64xx and Exynos4 SoCs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Common
[PATCH v4 1/3] clk: samsung: Add clock driver for s5pc110/s5pv210
This patch adds new, Common Clock Framework-based clock driver for Samsung
S5PV210 SoCs. The driver is just added, without enabling it yet.
Signed-off-by: Mateusz Krawczuk
Signed-off-by: Kyungmin Park
---
.../bindings/clock/samsung,s5pv210-clock.txt | 75 +++
drivers/clk/samsung/Makefile | 3 +
drivers/clk/samsung/clk-s5pv210.c | 673 +
include/dt-bindings/clock/samsung,s5pv210-clock.h | 224 +++
4 files changed, 975 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
create mode 100644 drivers/clk/samsung/clk-s5pv210.c
create mode 100644 include/dt-bindings/clock/samsung,s5pv210-clock.h
diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
new file mode 100644
index 000..a253b8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
@@ -0,0 +1,75 @@
+* Samsung S5PC110/S5PV210 Clock Controller
+
+The S5PV210 clock controller generates and supplies clock to various
controllers
+within the SoC. The clock binding described here is applicable to all SoCs in
+the S5PC110/S5PV210 family.
+
+Required Properties:
+
+- compatible: should be "samsung,s5pv210-clock".
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/samsung,s5pv210-clock.h header and can be used in device
+tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xxti": external crystal oscillator connected to XXTI and XXTO pins of
+the SoC,
+ - "xusbxti": external crystal oscillator connected to XUSBXTI and XUSBXTO
+pins of the SoC,
+
+A subset of above clocks available on given board shall be specified in
+board device tree, including the system base clock, as selected by XOM[0]
+pin of the SoC. Refer to generic fixed rate clock bindings
+documentation[1] for more information how to specify these clocks.
+
+[1] Documentation/devicetree/bindings/clock/fixed-clock.txt
+
+Example: Clock controller node:
+
+ clock: clock-controller@7e00f000 {
+ compatible = "samsung,s5pv210-clock";
+ reg = <0x7e00f000 0x1000>;
+ #clock-cells = <1>;
+ };
+
+Example: Required external clocks:
+
+ xxti: clock-xxti {
+ compatible = "fixed-clock";
+ clock-output-names = "xxti";
+ clock-frequency = <2400>;
+ #clock-cells = <0>;
+ };
+
+ xusbxti: clock-xusbxti {
+ compatible = "fixed-clock";
+ clock-output-names = "xusbxti";
+ clock-frequency = <2400>;
+ #clock-cells = <0>;
+ };
+
+Example: UART controller node that consumes the clock generated by the clock
+ controller (refer to the standard clock bindings for information about
+ "clocks" and "clock-names" properties):
+
+ uart0: serial@e290 {
+ compatible = "samsung,s5pv210-uart";
+ reg = <0xe290 0x400>;
+ interrupt-parent = <>;
+ interrupts = <10>;
+ clock-names = "uart", "clk_uart_baud0",
+ "clk_uart_baud1";
+ clocks = < UART0>, < UART0>,
+ < SCLK_UART0>;
+ status = "disabled";
+ };
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 8eb4799..e08c45e 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -9,3 +9,6 @@ obj-$(CONFIG_SOC_EXYNOS5420)+= clk-exynos5420.o
obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-audss.o
obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
+ifeq ($(CONFIG_COMMON_CLK), y)
+obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o
+endif
\ No newline at end of file
diff --git a/drivers/clk/samsung/clk-s5pv210.c
b/drivers/clk/samsung/clk-s5pv210.c
new file mode 100644
index 000..4eeaa27
--- /dev/null
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -0,0 +1,673 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Mateusz Krawczuk
+ *
+ * Based on clock drivers for S3C64xx and Exynos4 SoCs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Common Clock Framework support for all S5PC110/S5PV210 SoCs.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "clk.h"
+#include "clk-pll.h"
+
+#include
+
+/* S5PC110/S5PV210 clock controller register offsets */
+#define APLL_LOCK 0x
[PATCH v4 1/3] clk: samsung: Add clock driver for s5pc110/s5pv210
This patch adds new, Common Clock Framework-based clock driver for Samsung
S5PV210 SoCs. The driver is just added, without enabling it yet.
Signed-off-by: Mateusz Krawczuk m.krawc...@partner.samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
.../bindings/clock/samsung,s5pv210-clock.txt | 75 +++
drivers/clk/samsung/Makefile | 3 +
drivers/clk/samsung/clk-s5pv210.c | 673 +
include/dt-bindings/clock/samsung,s5pv210-clock.h | 224 +++
4 files changed, 975 insertions(+)
create mode 100644
Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
create mode 100644 drivers/clk/samsung/clk-s5pv210.c
create mode 100644 include/dt-bindings/clock/samsung,s5pv210-clock.h
diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
new file mode 100644
index 000..a253b8d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt
@@ -0,0 +1,75 @@
+* Samsung S5PC110/S5PV210 Clock Controller
+
+The S5PV210 clock controller generates and supplies clock to various
controllers
+within the SoC. The clock binding described here is applicable to all SoCs in
+the S5PC110/S5PV210 family.
+
+Required Properties:
+
+- compatible: should be samsung,s5pv210-clock.
+
+- reg: physical base address of the controller and length of memory mapped
+ region.
+
+- #clock-cells: should be 1.
+
+All available clocks are defined as preprocessor macros in
+dt-bindings/clock/samsung,s5pv210-clock.h header and can be used in device
+tree sources.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - xxti: external crystal oscillator connected to XXTI and XXTO pins of
+the SoC,
+ - xusbxti: external crystal oscillator connected to XUSBXTI and XUSBXTO
+pins of the SoC,
+
+A subset of above clocks available on given board shall be specified in
+board device tree, including the system base clock, as selected by XOM[0]
+pin of the SoC. Refer to generic fixed rate clock bindings
+documentation[1] for more information how to specify these clocks.
+
+[1] Documentation/devicetree/bindings/clock/fixed-clock.txt
+
+Example: Clock controller node:
+
+ clock: clock-controller@7e00f000 {
+ compatible = samsung,s5pv210-clock;
+ reg = 0x7e00f000 0x1000;
+ #clock-cells = 1;
+ };
+
+Example: Required external clocks:
+
+ xxti: clock-xxti {
+ compatible = fixed-clock;
+ clock-output-names = xxti;
+ clock-frequency = 2400;
+ #clock-cells = 0;
+ };
+
+ xusbxti: clock-xusbxti {
+ compatible = fixed-clock;
+ clock-output-names = xusbxti;
+ clock-frequency = 2400;
+ #clock-cells = 0;
+ };
+
+Example: UART controller node that consumes the clock generated by the clock
+ controller (refer to the standard clock bindings for information about
+ clocks and clock-names properties):
+
+ uart0: serial@e290 {
+ compatible = samsung,s5pv210-uart;
+ reg = 0xe290 0x400;
+ interrupt-parent = vic1;
+ interrupts = 10;
+ clock-names = uart, clk_uart_baud0,
+ clk_uart_baud1;
+ clocks = clocks UART0, clocks UART0,
+ clocks SCLK_UART0;
+ status = disabled;
+ };
diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
index 8eb4799..e08c45e 100644
--- a/drivers/clk/samsung/Makefile
+++ b/drivers/clk/samsung/Makefile
@@ -9,3 +9,6 @@ obj-$(CONFIG_SOC_EXYNOS5420)+= clk-exynos5420.o
obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
obj-$(CONFIG_ARCH_EXYNOS) += clk-exynos-audss.o
obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
+ifeq ($(CONFIG_COMMON_CLK), y)
+obj-$(CONFIG_ARCH_S5PV210) += clk-s5pv210.o
+endif
\ No newline at end of file
diff --git a/drivers/clk/samsung/clk-s5pv210.c
b/drivers/clk/samsung/clk-s5pv210.c
new file mode 100644
index 000..4eeaa27
--- /dev/null
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -0,0 +1,673 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Author: Mateusz Krawczuk m.krawc...@partner.samsung.com
+ *
+ * Based on clock drivers for S3C64xx and Exynos4 SoCs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Common Clock Framework support for all S5PC110/S5PV210 SoCs.
+ */
+
+#include linux/clk.h
+#include linux/clkdev.h
+#include linux/clk-provider.h
+#include linux/of.h
+#include linux/of_address.h
+
+#include clk.h
+#include
