[PATCH v4 3/6] drivers/i2c: Add transfer implementation for FSI algorithm

[Eddie James]

From: "Edward A. James" 

Execute I2C transfers from the FSI-attached I2C master. Use polling
instead of interrupts as we have no hardware IRQ over FSI.

Signed-off-by: Edward A. James 
---
 drivers/i2c/busses/i2c-fsi.c | 197 ++-
 1 file changed, 195 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c
index 4b52147..f86595b 100644
--- a/drivers/i2c/busses/i2c-fsi.c
+++ b/drivers/i2c/busses/i2c-fsi.c
@@ -13,10 +13,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #define FSI_ENGID_I2C  0x7
 
@@ -140,6 +142,7 @@ struct fsi_i2c_port {
struct i2c_adapter  adapter;
struct fsi_i2c_master   *master;
u16 port;
+   u16 xfrd;
 };
 
 static int fsi_i2c_read_reg(struct fsi_device *fsi, unsigned int reg,
@@ -224,17 +227,207 @@ static int fsi_i2c_set_port(struct fsi_i2c_port *port)
return rc;
 }
 
+static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg,
+bool stop)
+{
+   int rc;
+   struct fsi_i2c_master *i2c = port->master;
+   u32 cmd = I2C_CMD_WITH_START | I2C_CMD_WITH_ADDR;
+
+   port->xfrd = 0;
+
+   if (msg->flags & I2C_M_RD)
+   cmd |= I2C_CMD_READ;
+
+   if (stop || msg->flags & I2C_M_STOP)
+   cmd |= I2C_CMD_WITH_STOP;
+
+   cmd = SETFIELD(I2C_CMD_ADDR, cmd, msg->addr >> 1);
+   cmd = SETFIELD(I2C_CMD_LEN, cmd, msg->len);
+
+   rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_CMD, );
+
+   return rc;
+}
+
+static int fsi_i2c_write_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,
+ u8 fifo_count)
+{
+   int write;
+   int rc = 0;
+   struct fsi_i2c_master *i2c = port->master;
+   int bytes_to_write = i2c->fifo_size - fifo_count;
+   int bytes_remaining = msg->len - port->xfrd;
+
+   if (bytes_to_write > bytes_remaining)
+   bytes_to_write = bytes_remaining;
+
+   while (bytes_to_write > 0) {
+   write = bytes_to_write;
+   /* fsi limited to max 4 byte aligned ops */
+   if (bytes_to_write > 4)
+   write = 4;
+   else if (write == 3)
+   write = 2;
+
+   rc = fsi_device_write(i2c->fsi, I2C_FSI_FIFO,
+ >buf[port->xfrd], write);
+   if (rc)
+   return rc;
+
+   port->xfrd += write;
+   bytes_to_write -= write;
+   }
+
+   return rc;
+}
+
+static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,
+u8 fifo_count)
+{
+   int read;
+   int rc = 0;
+   struct fsi_i2c_master *i2c = port->master;
+   int xfr_remaining = msg->len - port->xfrd;
+   u32 dummy;
+
+   while (fifo_count) {
+   read = fifo_count;
+   /* fsi limited to max 4 byte aligned ops */
+   if (fifo_count > 4)
+   read = 4;
+   else if (read == 3)
+   read = 2;
+
+   if (xfr_remaining) {
+   if (xfr_remaining < read)
+   read = xfr_remaining;
+
+   rc = fsi_device_read(i2c->fsi, I2C_FSI_FIFO,
+>buf[port->xfrd], read);
+   if (rc)
+   return rc;
+
+   port->xfrd += read;
+   xfr_remaining -= read;
+   } else {
+   /* no more buffer but data in fifo, need to clear it */
+   rc = fsi_device_read(i2c->fsi, I2C_FSI_FIFO, ,
+read);
+   if (rc)
+   return rc;
+   }
+
+   fifo_count -= read;
+   }
+
+   return rc;
+}
+
+static int fsi_i2c_handle_status(struct fsi_i2c_port *port,
+struct i2c_msg *msg, u32 status)
+{
+   int rc;
+   u8 fifo_count;
+   struct fsi_i2c_master *i2c = port->master;
+   u32 dummy = 0;
+
+   if (status & I2C_STAT_ERR) {
+   rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_ERR, );
+   if (rc)
+   return rc;
+
+   if (status & I2C_STAT_NACK)
+   return -EFAULT;
+
+   return -EIO;
+   }
+
+   if (status & I2C_STAT_DAT_REQ) {
+   fifo_count = GETFIELD(I2C_STAT_FIFO_COUNT, status);
+
+   if (msg->flags & I2C_M_RD)
+   rc = fsi_i2c_read_fifo(port, msg, fifo_count);
+   else
+   rc = fsi_i2c_write_fifo(port, msg, fifo_count);
+
+   return rc;

[PATCH v4 3/6] drivers/i2c: Add transfer implementation for FSI algorithm

[Eddie James]

From: "Edward A. James" 

Execute I2C transfers from the FSI-attached I2C master. Use polling
instead of interrupts as we have no hardware IRQ over FSI.

Signed-off-by: Edward A. James 
---
 drivers/i2c/busses/i2c-fsi.c | 197 ++-
 1 file changed, 195 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/busses/i2c-fsi.c b/drivers/i2c/busses/i2c-fsi.c
index 4b52147..f86595b 100644
--- a/drivers/i2c/busses/i2c-fsi.c
+++ b/drivers/i2c/busses/i2c-fsi.c
@@ -13,10 +13,12 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #define FSI_ENGID_I2C  0x7
 
@@ -140,6 +142,7 @@ struct fsi_i2c_port {
struct i2c_adapter  adapter;
struct fsi_i2c_master   *master;
u16 port;
+   u16 xfrd;
 };
 
 static int fsi_i2c_read_reg(struct fsi_device *fsi, unsigned int reg,
@@ -224,17 +227,207 @@ static int fsi_i2c_set_port(struct fsi_i2c_port *port)
return rc;
 }
 
+static int fsi_i2c_start(struct fsi_i2c_port *port, struct i2c_msg *msg,
+bool stop)
+{
+   int rc;
+   struct fsi_i2c_master *i2c = port->master;
+   u32 cmd = I2C_CMD_WITH_START | I2C_CMD_WITH_ADDR;
+
+   port->xfrd = 0;
+
+   if (msg->flags & I2C_M_RD)
+   cmd |= I2C_CMD_READ;
+
+   if (stop || msg->flags & I2C_M_STOP)
+   cmd |= I2C_CMD_WITH_STOP;
+
+   cmd = SETFIELD(I2C_CMD_ADDR, cmd, msg->addr >> 1);
+   cmd = SETFIELD(I2C_CMD_LEN, cmd, msg->len);
+
+   rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_CMD, );
+
+   return rc;
+}
+
+static int fsi_i2c_write_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,
+ u8 fifo_count)
+{
+   int write;
+   int rc = 0;
+   struct fsi_i2c_master *i2c = port->master;
+   int bytes_to_write = i2c->fifo_size - fifo_count;
+   int bytes_remaining = msg->len - port->xfrd;
+
+   if (bytes_to_write > bytes_remaining)
+   bytes_to_write = bytes_remaining;
+
+   while (bytes_to_write > 0) {
+   write = bytes_to_write;
+   /* fsi limited to max 4 byte aligned ops */
+   if (bytes_to_write > 4)
+   write = 4;
+   else if (write == 3)
+   write = 2;
+
+   rc = fsi_device_write(i2c->fsi, I2C_FSI_FIFO,
+ >buf[port->xfrd], write);
+   if (rc)
+   return rc;
+
+   port->xfrd += write;
+   bytes_to_write -= write;
+   }
+
+   return rc;
+}
+
+static int fsi_i2c_read_fifo(struct fsi_i2c_port *port, struct i2c_msg *msg,
+u8 fifo_count)
+{
+   int read;
+   int rc = 0;
+   struct fsi_i2c_master *i2c = port->master;
+   int xfr_remaining = msg->len - port->xfrd;
+   u32 dummy;
+
+   while (fifo_count) {
+   read = fifo_count;
+   /* fsi limited to max 4 byte aligned ops */
+   if (fifo_count > 4)
+   read = 4;
+   else if (read == 3)
+   read = 2;
+
+   if (xfr_remaining) {
+   if (xfr_remaining < read)
+   read = xfr_remaining;
+
+   rc = fsi_device_read(i2c->fsi, I2C_FSI_FIFO,
+>buf[port->xfrd], read);
+   if (rc)
+   return rc;
+
+   port->xfrd += read;
+   xfr_remaining -= read;
+   } else {
+   /* no more buffer but data in fifo, need to clear it */
+   rc = fsi_device_read(i2c->fsi, I2C_FSI_FIFO, ,
+read);
+   if (rc)
+   return rc;
+   }
+
+   fifo_count -= read;
+   }
+
+   return rc;
+}
+
+static int fsi_i2c_handle_status(struct fsi_i2c_port *port,
+struct i2c_msg *msg, u32 status)
+{
+   int rc;
+   u8 fifo_count;
+   struct fsi_i2c_master *i2c = port->master;
+   u32 dummy = 0;
+
+   if (status & I2C_STAT_ERR) {
+   rc = fsi_i2c_write_reg(i2c->fsi, I2C_FSI_RESET_ERR, );
+   if (rc)
+   return rc;
+
+   if (status & I2C_STAT_NACK)
+   return -EFAULT;
+
+   return -EIO;
+   }
+
+   if (status & I2C_STAT_DAT_REQ) {
+   fifo_count = GETFIELD(I2C_STAT_FIFO_COUNT, status);
+
+   if (msg->flags & I2C_M_RD)
+   rc = fsi_i2c_read_fifo(port, msg, fifo_count);
+   else
+   rc = fsi_i2c_write_fifo(port, msg, fifo_count);
+
+   return rc;
+   }
+
+   if (status &