Re: [PATCH v5] arm64: dts: mt8173: add mmsel clocks for 4K support

[Matthias Brugger]

On 12/01/17 05:50, Daniel Kurtz wrote:

Hi Matthias,

(Trying again to send plain text email)...

On Thu, Aug 4, 2016 at 10:57 AM, Bibby Hsieh  wrote:

To support HDMI 4K resolution, mmsys need clcok
mm_sel to be 400MHz.

The board .dts file should override the clock rate
property with the higher VENCPLL frequency the board
supports HDMI 4K resolution.

Signed-off-by: Bibby Hsieh 


Reviewed-by: Daniel Kurtz 



Applied to v4.10-next/dts
Thanks



It looks like this patch was lost.  It is actually a prerequisite for
MTK 4k HDMI support, which already landed in v4.9.

See the email thread entitled:
[PATCH v5 0/3] MT8173 HDMI 4K support 

Or these three:

0d2200794f0a drm/mediatek: modify the factor to make the pll_rate set
in the 1G-2G range
968253bd7caa drm/mediatek: enhance the HDMI driving current
d542b7c473f0 drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

-Dan


---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 78529e4..c3f32f3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -690,6 +690,8 @@
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+   assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
+   assigned-clock-rates = <4>;
#clock-cells = <1>;
};

--
1.7.9.5

Re: [PATCH v5] arm64: dts: mt8173: add mmsel clocks for 4K support

[Daniel Kurtz]

Hi Matthias,

(Trying again to send plain text email)...

On Thu, Aug 4, 2016 at 10:57 AM, Bibby Hsieh  wrote:
> To support HDMI 4K resolution, mmsys need clcok
> mm_sel to be 400MHz.
>
> The board .dts file should override the clock rate
> property with the higher VENCPLL frequency the board
> supports HDMI 4K resolution.
>
> Signed-off-by: Bibby Hsieh 

Reviewed-by: Daniel Kurtz 


It looks like this patch was lost.  It is actually a prerequisite for
MTK 4k HDMI support, which already landed in v4.9.

See the email thread entitled:
[PATCH v5 0/3] MT8173 HDMI 4K support 

Or these three:

0d2200794f0a drm/mediatek: modify the factor to make the pll_rate set
in the 1G-2G range
968253bd7caa drm/mediatek: enhance the HDMI driving current
d542b7c473f0 drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable

-Dan

> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi |2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
> b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 78529e4..c3f32f3 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -690,6 +690,8 @@
> compatible = "mediatek,mt8173-mmsys", "syscon";
> reg = <0 0x1400 0 0x1000>;
> power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
> +   assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
> +   assigned-clock-rates = <4>;
> #clock-cells = <1>;
> };
>
> --
> 1.7.9.5
>

[PATCH v5] arm64: dts: mt8173: add mmsel clocks for 4K support

[Bibby Hsieh]

To support HDMI 4K resolution, mmsys need clcok
mm_sel to be 400MHz.

The board .dts file should override the clock rate
property with the higher VENCPLL frequency the board
supports HDMI 4K resolution.

Signed-off-by: Bibby Hsieh 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 78529e4..c3f32f3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -690,6 +690,8 @@
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0 0x1400 0 0x1000>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
+   assigned-clocks = <&topckgen CLK_TOP_MM_SEL>;
+   assigned-clock-rates = <4>;
#clock-cells = <1>;
};
 
-- 
1.7.9.5