[PATCH v5 1/2] tpm_tis: Move ilb_base_addr to tpm_tis_data

[Azhar Shaikh]

Move static variable ilb_base_addr to tpm_tis_data.

Signed-off-by: Azhar Shaikh 
---
 drivers/char/tpm/tpm_tis.c  | 75 +++--
 drivers/char/tpm/tpm_tis_core.c | 16 -
 drivers/char/tpm/tpm_tis_core.h | 13 +++
 3 files changed, 56 insertions(+), 48 deletions(-)

diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index e2d1055fb814..923f8f2cbaca 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -134,33 +134,24 @@ static int check_acpi_tpm2(struct device *dev)
 #endif
 
 #ifdef CONFIG_X86
-#define INTEL_LEGACY_BLK_BASE_ADDR  0xFED08000
-#define ILB_REMAP_SIZE 0x100
-#define LPC_CNTRL_REG_OFFSET0x84
-#define LPC_CLKRUN_EN   (1 << 2)
-
-static void __iomem *ilb_base_addr;
-
-static inline bool is_bsw(void)
-{
-   return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
-}
+#define LPC_CNTRL_OFFSET   0x84
+#define LPC_CLKRUN_EN  (1 << 2)
 
 /**
  * tpm_platform_begin_xfer() - clear LPC CLKRUN_EN i.e. clocks will be running
  */
-static void tpm_platform_begin_xfer(void)
+static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
 {
u32 clkrun_val;
 
if (!is_bsw())
return;
 
-   clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/* Disable LPC CLKRUN# */
clkrun_val &= ~LPC_CLKRUN_EN;
-   iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/*
 * Write any random value on port 0x80 which is on LPC, to make
@@ -173,18 +164,18 @@ static void tpm_platform_begin_xfer(void)
 /**
  * tpm_platform_end_xfer() - set LPC CLKRUN_EN i.e. clocks can be turned off
  */
-static void tpm_platform_end_xfer(void)
+static void tpm_platform_end_xfer(struct tpm_tis_data *data)
 {
u32 clkrun_val;
 
if (!is_bsw())
return;
 
-   clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/* Enable LPC CLKRUN# */
clkrun_val |= LPC_CLKRUN_EN;
-   iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/*
 * Write any random value on port 0x80 which is on LPC, to make
@@ -194,16 +185,11 @@ static void tpm_platform_end_xfer(void)
 
 }
 #else
-static inline bool is_bsw(void)
-{
-   return false;
-}
-
-static void tpm_platform_begin_xfer(void)
+static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
 {
 }
 
-static void tpm_platform_end_xfer(void)
+static void tpm_platform_end_xfer(struct tpm_tis_data *data)
 {
 }
 #endif
@@ -213,12 +199,12 @@ static int tpm_tcg_read_bytes(struct tpm_tis_data *data, 
u32 addr, u16 len,
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
while (len--)
*result++ = ioread8(phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -228,12 +214,12 @@ static int tpm_tcg_write_bytes(struct tpm_tis_data *data, 
u32 addr, u16 len,
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
while (len--)
iowrite8(*value++, phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -242,11 +228,11 @@ static int tpm_tcg_read16(struct tpm_tis_data *data, u32 
addr, u16 *result)
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
*result = ioread16(phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -255,11 +241,11 @@ static int tpm_tcg_read32(struct tpm_tis_data *data, u32 
addr, u32 *result)
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
*result = ioread32(phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -268,11 +254,11 @@ static int tpm_tcg_write32(struct tpm_tis_data *data, u32 
addr, u32 value)
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
iowrite32(value, phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -351,9 +337,13 @@ static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
 static void 

[PATCH v5 1/2] tpm_tis: Move ilb_base_addr to tpm_tis_data

[Azhar Shaikh]

Move static variable ilb_base_addr to tpm_tis_data.

Signed-off-by: Azhar Shaikh 
---
 drivers/char/tpm/tpm_tis.c  | 75 +++--
 drivers/char/tpm/tpm_tis_core.c | 16 -
 drivers/char/tpm/tpm_tis_core.h | 13 +++
 3 files changed, 56 insertions(+), 48 deletions(-)

diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index e2d1055fb814..923f8f2cbaca 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -134,33 +134,24 @@ static int check_acpi_tpm2(struct device *dev)
 #endif
 
 #ifdef CONFIG_X86
-#define INTEL_LEGACY_BLK_BASE_ADDR  0xFED08000
-#define ILB_REMAP_SIZE 0x100
-#define LPC_CNTRL_REG_OFFSET0x84
-#define LPC_CLKRUN_EN   (1 << 2)
-
-static void __iomem *ilb_base_addr;
-
-static inline bool is_bsw(void)
-{
-   return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
-}
+#define LPC_CNTRL_OFFSET   0x84
+#define LPC_CLKRUN_EN  (1 << 2)
 
 /**
  * tpm_platform_begin_xfer() - clear LPC CLKRUN_EN i.e. clocks will be running
  */
-static void tpm_platform_begin_xfer(void)
+static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
 {
u32 clkrun_val;
 
if (!is_bsw())
return;
 
-   clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/* Disable LPC CLKRUN# */
clkrun_val &= ~LPC_CLKRUN_EN;
-   iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/*
 * Write any random value on port 0x80 which is on LPC, to make
@@ -173,18 +164,18 @@ static void tpm_platform_begin_xfer(void)
 /**
  * tpm_platform_end_xfer() - set LPC CLKRUN_EN i.e. clocks can be turned off
  */
-static void tpm_platform_end_xfer(void)
+static void tpm_platform_end_xfer(struct tpm_tis_data *data)
 {
u32 clkrun_val;
 
if (!is_bsw())
return;
 
-   clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/* Enable LPC CLKRUN# */
clkrun_val |= LPC_CLKRUN_EN;
-   iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
+   iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
 
/*
 * Write any random value on port 0x80 which is on LPC, to make
@@ -194,16 +185,11 @@ static void tpm_platform_end_xfer(void)
 
 }
 #else
-static inline bool is_bsw(void)
-{
-   return false;
-}
-
-static void tpm_platform_begin_xfer(void)
+static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
 {
 }
 
-static void tpm_platform_end_xfer(void)
+static void tpm_platform_end_xfer(struct tpm_tis_data *data)
 {
 }
 #endif
@@ -213,12 +199,12 @@ static int tpm_tcg_read_bytes(struct tpm_tis_data *data, 
u32 addr, u16 len,
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
while (len--)
*result++ = ioread8(phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -228,12 +214,12 @@ static int tpm_tcg_write_bytes(struct tpm_tis_data *data, 
u32 addr, u16 len,
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
while (len--)
iowrite8(*value++, phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -242,11 +228,11 @@ static int tpm_tcg_read16(struct tpm_tis_data *data, u32 
addr, u16 *result)
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
*result = ioread16(phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -255,11 +241,11 @@ static int tpm_tcg_read32(struct tpm_tis_data *data, u32 
addr, u32 *result)
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
*result = ioread32(phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -268,11 +254,11 @@ static int tpm_tcg_write32(struct tpm_tis_data *data, u32 
addr, u32 value)
 {
struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
 
-   tpm_platform_begin_xfer();
+   tpm_platform_begin_xfer(data);
 
iowrite32(value, phy->iobase + addr);
 
-   tpm_platform_end_xfer();
+   tpm_platform_end_xfer(data);
 
return 0;
 }
@@ -351,9 +337,13 @@ static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
 static void tpm_tis_pnp_remove(struct