Re: [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings.

2019-05-20 Thread Sagar Kadam
Hi Rob,


On Mon, May 20, 2019 at 8:07 PM Rob Herring  wrote:
>
> On Mon, May 20, 2019 at 9:12 AM Sagar Shrikant Kadam
>  wrote:
> >
> > Add FU540-C000 specific device tree bindings to already
> > available i2-ocores file. This device is available on
> > HiFive Unleashed Rev A00 board. Move interrupt and interrupt
> > parents under optional property list as these can be optional.
> >
> > The FU540-C000 SoC from sifive, has an Opencore's I2C block
> > reimplementation.
> >
> > The DT compatibility string for this IP is present in HDL and available at.
> > https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73
> >
> > Signed-off-by: Sagar Shrikant Kadam 
> > ---
> >  Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 7 ++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt 
> > b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> > index 17bef9a..b73960e 100644
> > --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> > +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> > @@ -2,8 +2,11 @@ Device tree configuration for i2c-ocores
> >
> >  Required properties:
> >  - compatible  : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
> > +"sifive,fu540-c000-i2c" or "sifive,i2c0".
>
> It's not an OR because both are required. Please reformat to 1 valid
> combination per line.
Yes, will rectify it in V6.

> > +   for Opencore based I2C IP block reimplemented in
> > +   FU540-C000 SoC.Please refer 
> > sifive-blocks-ip-versioning.txt
> > +   for additional details.
> >  - reg : bus address start and address range size of device
> > -- interrupts  : interrupt number
> >  - clocks  : handle to the controller clock; see the note below.
> >  Mutually exclusive with opencores,ip-clock-frequency
> >  - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
> > @@ -12,6 +15,8 @@ Required properties:
> >  - #size-cells : should be <0>
> >
> >  Optional properties:
> > +- interrupt-parent: handle to interrupt controller.
>
> Drop this. interrupt-parent is implied.
>
Sure, will exclude it in v6.

> > +- interrupts  : interrupt number.
> >  - clock-frequency : frequency of bus clock in Hz; see the note below.
> >  Defaults to 100 KHz when the property is not specified
> >  - reg-shift   : device register offsets are shifted by this value
> > --
> > 1.9.1
> >
>
> ___
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> http://lists.infradead.org/mailman/listinfo/linux-riscv

Thanks,
Sagar


Re: [PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings.

2019-05-20 Thread Rob Herring
On Mon, May 20, 2019 at 9:12 AM Sagar Shrikant Kadam
 wrote:
>
> Add FU540-C000 specific device tree bindings to already
> available i2-ocores file. This device is available on
> HiFive Unleashed Rev A00 board. Move interrupt and interrupt
> parents under optional property list as these can be optional.
>
> The FU540-C000 SoC from sifive, has an Opencore's I2C block
> reimplementation.
>
> The DT compatibility string for this IP is present in HDL and available at.
> https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73
>
> Signed-off-by: Sagar Shrikant Kadam 
> ---
>  Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt 
> b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> index 17bef9a..b73960e 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
> @@ -2,8 +2,11 @@ Device tree configuration for i2c-ocores
>
>  Required properties:
>  - compatible  : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
> +"sifive,fu540-c000-i2c" or "sifive,i2c0".

It's not an OR because both are required. Please reformat to 1 valid
combination per line.

> +   for Opencore based I2C IP block reimplemented in
> +   FU540-C000 SoC.Please refer 
> sifive-blocks-ip-versioning.txt
> +   for additional details.
>  - reg : bus address start and address range size of device
> -- interrupts  : interrupt number
>  - clocks  : handle to the controller clock; see the note below.
>  Mutually exclusive with opencores,ip-clock-frequency
>  - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
> @@ -12,6 +15,8 @@ Required properties:
>  - #size-cells : should be <0>
>
>  Optional properties:
> +- interrupt-parent: handle to interrupt controller.

Drop this. interrupt-parent is implied.

> +- interrupts  : interrupt number.
>  - clock-frequency : frequency of bus clock in Hz; see the note below.
>  Defaults to 100 KHz when the property is not specified
>  - reg-shift   : device register offsets are shifted by this value
> --
> 1.9.1
>


[PATCH v5 1/3] dt-bindings: i2c: extend existing opencore bindings.

2019-05-20 Thread Sagar Shrikant Kadam
Add FU540-C000 specific device tree bindings to already
available i2-ocores file. This device is available on
HiFive Unleashed Rev A00 board. Move interrupt and interrupt
parents under optional property list as these can be optional.

The FU540-C000 SoC from sifive, has an Opencore's I2C block
reimplementation.

The DT compatibility string for this IP is present in HDL and available at.
https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/i2c/I2C.scala#L73

Signed-off-by: Sagar Shrikant Kadam 
---
 Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt 
b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
index 17bef9a..b73960e 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -2,8 +2,11 @@ Device tree configuration for i2c-ocores
 
 Required properties:
 - compatible  : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
+"sifive,fu540-c000-i2c" or "sifive,i2c0".
+   for Opencore based I2C IP block reimplemented in
+   FU540-C000 SoC.Please refer sifive-blocks-ip-versioning.txt
+   for additional details.
 - reg : bus address start and address range size of device
-- interrupts  : interrupt number
 - clocks  : handle to the controller clock; see the note below.
 Mutually exclusive with opencores,ip-clock-frequency
 - opencores,ip-clock-frequency: frequency of the controller clock in Hz;
@@ -12,6 +15,8 @@ Required properties:
 - #size-cells : should be <0>
 
 Optional properties:
+- interrupt-parent: handle to interrupt controller.
+- interrupts  : interrupt number.
 - clock-frequency : frequency of bus clock in Hz; see the note below.
 Defaults to 100 KHz when the property is not specified
 - reg-shift   : device register offsets are shifted by this value
-- 
1.9.1