Re: [PATCH v5 3/6] devfreq: rk3399_dmc: Pass ODT and auto power down parameters to TF-A.
Hi
Also, this patch was applied to linux-pm.git for for v5.2-rc1.
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git/commit/?h=bleeding-edge&id=adfe3b76608ffe547af5a74415f15499b798f32a
On 19. 5. 3. 오전 2:58, Gaël PORTAY wrote:
> From: Enric Balletbo i Serra
>
> Trusted Firmware-A (TF-A) for rk3399 implements a SiP call to get the
> on-die termination (ODT) and auto power down parameters from kernel,
> this patch adds the functionality to do this. Also, if DDR clock
> frequency is lower than the on-die termination (ODT) disable frequency
> this driver should disable the DDR ODT.
>
> Signed-off-by: Enric Balletbo i Serra
> Reviewed-by: Chanwoo Choi
> Signed-off-by: Gaël PORTAY
> Acked-by: MyungJoo Ham
> ---
>
> Changes in v5: None
>
> Changes in v4:
> - [PATCH v3 3/5] Add Acked-by: MyungJoo Ham .
>
> Changes in v3:
> - [PATCH v2 3/5] Add Signed-off-by: Gaël PORTAY .
>Remove comments.
>Move pmu dt parsing after dt-parsing of timings to fix
> data->odt_dis_freq value.
>
> Changes in v2: None
>
> Changes in v1:
> - [RFC 3/10] Add an explanation for platform SIP calls.
> - [RFC 3/10] Change if statement for a switch.
> - [RFC 3/10] Rename ddr_flag to odt_enable to be more clear.
>
> drivers/devfreq/rk3399_dmc.c| 71 -
> include/soc/rockchip/rockchip_sip.h | 1 +
> 2 files changed, 71 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
> index e795ad2b3f6b..daf19e121c99 100644
> --- a/drivers/devfreq/rk3399_dmc.c
> +++ b/drivers/devfreq/rk3399_dmc.c
> @@ -18,14 +18,17 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
>
> +#include
> #include
>
> struct dram_timing {
> @@ -69,8 +72,11 @@ struct rk3399_dmcfreq {
> struct mutex lock;
> struct dram_timing timing;
> struct regulator *vdd_center;
> + struct regmap *regmap_pmu;
> unsigned long rate, target_rate;
> unsigned long volt, target_volt;
> + unsigned int odt_dis_freq;
> + int odt_pd_arg0, odt_pd_arg1;
> };
>
> static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
> @@ -80,6 +86,8 @@ static int rk3399_dmcfreq_target(struct device *dev,
> unsigned long *freq,
> struct dev_pm_opp *opp;
> unsigned long old_clk_rate = dmcfreq->rate;
> unsigned long target_volt, target_rate;
> + struct arm_smccc_res res;
> + bool odt_enable = false;
> int err;
>
> opp = devfreq_recommended_opp(dev, freq, flags);
> @@ -95,6 +103,19 @@ static int rk3399_dmcfreq_target(struct device *dev,
> unsigned long *freq,
>
> mutex_lock(&dmcfreq->lock);
>
> + if (target_rate >= dmcfreq->odt_dis_freq)
> + odt_enable = true;
> +
> + /*
> + * This makes a SMC call to the TF-A to set the DDR PD (power-down)
> + * timings and to enable or disable the ODT (on-die termination)
> + * resistors.
> + */
> + arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
> + dmcfreq->odt_pd_arg1,
> + ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
> + odt_enable, 0, 0, 0, &res);
> +
> /*
>* If frequency scaling from low to high, adjust voltage first.
>* If frequency scaling from high to low, adjust frequency first.
> @@ -294,11 +315,13 @@ static int rk3399_dmcfreq_probe(struct platform_device
> *pdev)
> {
> struct arm_smccc_res res;
> struct device *dev = &pdev->dev;
> - struct device_node *np = pdev->dev.of_node;
> + struct device_node *np = pdev->dev.of_node, *node;
> struct rk3399_dmcfreq *data;
> int ret, index, size;
> uint32_t *timing;
> struct dev_pm_opp *opp;
> + u32 ddr_type;
> + u32 val;
>
> data = devm_kzalloc(dev, sizeof(struct rk3399_dmcfreq), GFP_KERNEL);
> if (!data)
> @@ -354,10 +377,56 @@ static int rk3399_dmcfreq_probe(struct platform_device
> *pdev)
> }
> }
>
> + node = of_parse_phandle(np, "rockchip,pmu", 0);
> + if (node) {
> + data->regmap_pmu = syscon_node_to_regmap(node);
> + if (IS_ERR(data->regmap_pmu))
> + return PTR_ERR(data->regmap_pmu);
> + }
> +
> + regmap_read(data->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
> + ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
> + RK3399_PMUGRF_DDRTYPE_MASK;
> +
> + switch (ddr_type) {
> + case RK3399_PMUGRF_DDRTYPE_DDR3:
> + data->odt_dis_freq = data->timing.ddr3_odt_dis_freq;
> + break;
> + case RK3399_PMUGRF_DDRTYPE_LPDDR3:
> + data->odt_dis_freq = data->timing.lpddr3_odt_dis_freq;
> + break;
> + case RK3399_PMUGRF_DDRTYPE_LPDDR4:
> + data->odt_dis_freq = data->timing.lpddr4_odt_dis_freq;
[PATCH v5 3/6] devfreq: rk3399_dmc: Pass ODT and auto power down parameters to TF-A.
From: Enric Balletbo i Serra
Trusted Firmware-A (TF-A) for rk3399 implements a SiP call to get the
on-die termination (ODT) and auto power down parameters from kernel,
this patch adds the functionality to do this. Also, if DDR clock
frequency is lower than the on-die termination (ODT) disable frequency
this driver should disable the DDR ODT.
Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Chanwoo Choi
Signed-off-by: Gaël PORTAY
Acked-by: MyungJoo Ham
---
Changes in v5: None
Changes in v4:
- [PATCH v3 3/5] Add Acked-by: MyungJoo Ham .
Changes in v3:
- [PATCH v2 3/5] Add Signed-off-by: Gaël PORTAY .
Remove comments.
Move pmu dt parsing after dt-parsing of timings to fix
data->odt_dis_freq value.
Changes in v2: None
Changes in v1:
- [RFC 3/10] Add an explanation for platform SIP calls.
- [RFC 3/10] Change if statement for a switch.
- [RFC 3/10] Rename ddr_flag to odt_enable to be more clear.
drivers/devfreq/rk3399_dmc.c| 71 -
include/soc/rockchip/rockchip_sip.h | 1 +
2 files changed, 71 insertions(+), 1 deletion(-)
diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c
index e795ad2b3f6b..daf19e121c99 100644
--- a/drivers/devfreq/rk3399_dmc.c
+++ b/drivers/devfreq/rk3399_dmc.c
@@ -18,14 +18,17 @@
#include
#include
#include
+#include
#include
#include
#include
#include
+#include
#include
#include
#include
+#include
#include
struct dram_timing {
@@ -69,8 +72,11 @@ struct rk3399_dmcfreq {
struct mutex lock;
struct dram_timing timing;
struct regulator *vdd_center;
+ struct regmap *regmap_pmu;
unsigned long rate, target_rate;
unsigned long volt, target_volt;
+ unsigned int odt_dis_freq;
+ int odt_pd_arg0, odt_pd_arg1;
};
static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
@@ -80,6 +86,8 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned
long *freq,
struct dev_pm_opp *opp;
unsigned long old_clk_rate = dmcfreq->rate;
unsigned long target_volt, target_rate;
+ struct arm_smccc_res res;
+ bool odt_enable = false;
int err;
opp = devfreq_recommended_opp(dev, freq, flags);
@@ -95,6 +103,19 @@ static int rk3399_dmcfreq_target(struct device *dev,
unsigned long *freq,
mutex_lock(&dmcfreq->lock);
+ if (target_rate >= dmcfreq->odt_dis_freq)
+ odt_enable = true;
+
+ /*
+* This makes a SMC call to the TF-A to set the DDR PD (power-down)
+* timings and to enable or disable the ODT (on-die termination)
+* resistors.
+*/
+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
+ dmcfreq->odt_pd_arg1,
+ ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
+ odt_enable, 0, 0, 0, &res);
+
/*
* If frequency scaling from low to high, adjust voltage first.
* If frequency scaling from high to low, adjust frequency first.
@@ -294,11 +315,13 @@ static int rk3399_dmcfreq_probe(struct platform_device
*pdev)
{
struct arm_smccc_res res;
struct device *dev = &pdev->dev;
- struct device_node *np = pdev->dev.of_node;
+ struct device_node *np = pdev->dev.of_node, *node;
struct rk3399_dmcfreq *data;
int ret, index, size;
uint32_t *timing;
struct dev_pm_opp *opp;
+ u32 ddr_type;
+ u32 val;
data = devm_kzalloc(dev, sizeof(struct rk3399_dmcfreq), GFP_KERNEL);
if (!data)
@@ -354,10 +377,56 @@ static int rk3399_dmcfreq_probe(struct platform_device
*pdev)
}
}
+ node = of_parse_phandle(np, "rockchip,pmu", 0);
+ if (node) {
+ data->regmap_pmu = syscon_node_to_regmap(node);
+ if (IS_ERR(data->regmap_pmu))
+ return PTR_ERR(data->regmap_pmu);
+ }
+
+ regmap_read(data->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val);
+ ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
+ RK3399_PMUGRF_DDRTYPE_MASK;
+
+ switch (ddr_type) {
+ case RK3399_PMUGRF_DDRTYPE_DDR3:
+ data->odt_dis_freq = data->timing.ddr3_odt_dis_freq;
+ break;
+ case RK3399_PMUGRF_DDRTYPE_LPDDR3:
+ data->odt_dis_freq = data->timing.lpddr3_odt_dis_freq;
+ break;
+ case RK3399_PMUGRF_DDRTYPE_LPDDR4:
+ data->odt_dis_freq = data->timing.lpddr4_odt_dis_freq;
+ break;
+ default:
+ return -EINVAL;
+ };
+
arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, 0, 0,
ROCKCHIP_SIP_CONFIG_DRAM_INIT,
0, 0, 0, 0, &res);
+ /*
+* In TF-A there is a platform SIP call to set the PD (power-down)
+* timings and to enable or disable the ODT (on-die termination).
+* Th
