Re: [PATCH v5 4/5] ARM: dts: exynos: Add Ethernet to Artik 5 board

[Krzysztof Kozlowski]

On Tue, Nov 03, 2020 at 04:15:35PM +0100, Łukasz Stelmach wrote:
> Add node for ax88796c ethernet chip.
> 
> Signed-off-by: Łukasz Stelmach 
> ---
>  arch/arm/boot/dts/exynos3250-artik5-eval.dts | 29 
>  1 file changed, 29 insertions(+)

Thanks, applied.

Best regards,
Krzysztof

[PATCH v5 4/5] ARM: dts: exynos: Add Ethernet to Artik 5 board

[Łukasz Stelmach]

Add node for ax88796c ethernet chip.

Signed-off-by: Łukasz Stelmach 
---
 arch/arm/boot/dts/exynos3250-artik5-eval.dts | 29 
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/exynos3250-artik5-eval.dts 
b/arch/arm/boot/dts/exynos3250-artik5-eval.dts
index 20446a846a98..a91e09a7d3fa 100644
--- a/arch/arm/boot/dts/exynos3250-artik5-eval.dts
+++ b/arch/arm/boot/dts/exynos3250-artik5-eval.dts
@@ -37,3 +37,32 @@ _2 {
 _2 {
status = "okay";
 };
+
+_0 {
+   status = "okay";
+   cs-gpios = < 4 GPIO_ACTIVE_LOW>, <0>;
+
+   assigned-clocks = < CLK_MOUT_MPLL>, < CLK_DIV_MPLL_PRE>,
+   < CLK_MOUT_SPI0>, < CLK_DIV_SPI0>,
+   < CLK_DIV_SPI0_PRE>, < CLK_SCLK_SPI0>;
+   assigned-clock-parents =
+   < CLK_FOUT_MPLL>,/* for: CLK_MOUT_MPLL */
+   < CLK_MOUT_MPLL>,/* for: CLK_DIV_MPLL_PRE */
+   < CLK_DIV_MPLL_PRE>, /* for: CLK_MOUT_SPI0 */
+   < CLK_MOUT_SPI0>,/* for: CLK_DIV_SPI0 */
+   < CLK_DIV_SPI0>, /* for: CLK_DIV_SPI0_PRE */
+   < CLK_DIV_SPI0_PRE>; /* for: CLK_SCLK_SPI0 */
+
+   ethernet@0 {
+   compatible = "asix,ax88796c";
+   reg = <0x0>;
+   local-mac-address = [00 00 00 00 00 00]; /* Filled in by a 
boot-loader */
+   interrupt-parent = <>;
+   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+   spi-max-frequency = <4000>;
+   reset-gpios = < 2 GPIO_ACTIVE_LOW>;
+   controller-data {
+   samsung,spi-feedback-delay = <2>;
+   };
+   };
+};
-- 
2.26.2