Re: [PATCH v5 5/5] arm64: dts: r8a77965: Add DRIF support

[Geert Uytterhoeven]

On Wed, Oct 21, 2020 at 3:53 PM Fabrizio Castro
 wrote:
> Add the DRIF controller nodes for r8a77965 (a.k.a. R-Car M3-N).
>
> Signed-off-by: Fabrizio Castro 
> Reviewed-by: Lad Prabhakar 

Reviewed-by: Geert Uytterhoeven 
i.e. will queue in renesas-devel for v5.11.

Gr{oetje,eeting}s,

Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

[PATCH v5 5/5] arm64: dts: r8a77965: Add DRIF support

[Fabrizio Castro]

Add the DRIF controller nodes for r8a77965 (a.k.a. R-Car M3-N).

Signed-off-by: Fabrizio Castro 
Reviewed-by: Lad Prabhakar 
---
v4->v5:
* No change
v3->v4:
* No change
v2->v3:
* New patch

 arch/arm64/boot/dts/renesas/r8a77965.dtsi | 120 ++
 1 file changed, 120 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index c355460e5f7f..d098eb3ec73a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1550,6 +1550,126 @@ vin7csi40: endpoint@2 {
};
};
 
+   drif00: rif@e6f4 {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6f4 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 515>;
+   clock-names = "fck";
+   dmas = < 0x20>, < 0x20>;
+   dma-names = "rx", "rx";
+   power-domains = < R8A77965_PD_ALWAYS_ON>;
+   resets = < 515>;
+   renesas,bonding = <>;
+   status = "disabled";
+   };
+
+   drif01: rif@e6f5 {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6f5 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 514>;
+   clock-names = "fck";
+   dmas = < 0x22>, < 0x22>;
+   dma-names = "rx", "rx";
+   power-domains = < R8A77965_PD_ALWAYS_ON>;
+   resets = < 514>;
+   renesas,bonding = <>;
+   status = "disabled";
+   };
+
+   drif10: rif@e6f6 {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6f6 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 513>;
+   clock-names = "fck";
+   dmas = < 0x24>, < 0x24>;
+   dma-names = "rx", "rx";
+   power-domains = < R8A77965_PD_ALWAYS_ON>;
+   resets = < 513>;
+   renesas,bonding = <>;
+   status = "disabled";
+   };
+
+   drif11: rif@e6f7 {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6f7 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 512>;
+   clock-names = "fck";
+   dmas = < 0x26>, < 0x26>;
+   dma-names = "rx", "rx";
+   power-domains = < R8A77965_PD_ALWAYS_ON>;
+   resets = < 512>;
+   renesas,bonding = <>;
+   status = "disabled";
+   };
+
+   drif20: rif@e6f8 {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6f8 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 511>;
+   clock-names = "fck";
+   dmas = < 0x28>, < 0x28>;
+   dma-names = "rx", "rx";
+   power-domains = < R8A77965_PD_ALWAYS_ON>;
+   resets = < 511>;
+   renesas,bonding = <>;
+   status = "disabled";
+   };
+
+   drif21: rif@e6f9 {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6f9 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 510>;
+   clock-names = "fck";
+   dmas = < 0x2a>, < 0x2a>;
+   dma-names = "rx", "rx";
+   power-domains = < R8A77965_PD_ALWAYS_ON>;
+   resets = < 510>;
+   renesas,bonding = <>;
+   status = "disabled";
+   };
+
+   drif30: rif@e6fa {
+   compatible = "renesas,r8a77965-drif",
+"renesas,rcar-gen3-drif";
+   reg = <0 0xe6fa 0 0x84>;
+   interrupts = ;
+   clocks = < CPG_MOD 509>;
+   clock-names = "fck";
+