Re: [PATCH v5 5/6] dt-bindings: dw-apb-ictl: convert to json-schema
On 2020/9/24 11:26, Leizhen (ThunderTown) wrote:
>
>
> On 2020/9/24 4:49, Rob Herring wrote:
>> On Fri, Sep 18, 2020 at 07:22:01PM +0800, Zhen Lei wrote:
>>> Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
>>> binding to DT schema format using json-schema.
>>>
>>> Signed-off-by: Zhen Lei
>>> ---
>>> .../interrupt-controller/snps,dw-apb-ictl.txt | 43 -
>>> .../interrupt-controller/snps,dw-apb-ictl.yaml | 75
>>> ++
>>> 2 files changed, 75 insertions(+), 43 deletions(-)
>>> delete mode 100644
>>> Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>>> create mode 100644
>>> Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>>>
>>> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>>> deleted file mode 100644
>>> index 2db59df9408f4c6..000
>>> ---
>>> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>>> +++ /dev/null
>>> @@ -1,43 +0,0 @@
>>> -Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
>>> -
>>> -Synopsys DesignWare provides interrupt controller IP for APB known as
>>> -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
>>> with
>>> -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
>>> -controller in some SoCs, e.g. Hisilicon SD5203.
>>> -
>>> -Required properties:
>>> -- compatible: shall be "snps,dw-apb-ictl"
>>> -- reg: physical base address of the controller and length of memory mapped
>>> - region starting with ENABLE_LOW register
>>> -- interrupt-controller: identifies the node as an interrupt controller
>>> -- #interrupt-cells: number of cells to encode an interrupt-specifier,
>>> shall be 1
>>> -
>>> -Additional required property when it's used as secondary interrupt
>>> controller:
>>> -- interrupts: interrupt reference to primary interrupt controller
>>> -
>>> -The interrupt sources map to the corresponding bits in the interrupt
>>> -registers, i.e.
>>> -- 0 maps to bit 0 of low interrupts,
>>> -- 1 maps to bit 1 of low interrupts,
>>> -- 32 maps to bit 0 of high interrupts,
>>> -- 33 maps to bit 1 of high interrupts,
>>> -- (optional) fast interrupts start at 64.
>>> -
>>> -Example:
>>> - /* dw_apb_ictl is used as secondary interrupt controller */
>>> - aic: interrupt-controller@3000 {
>>> - compatible = "snps,dw-apb-ictl";
>>> - reg = <0x3000 0xc00>;
>>> - interrupt-controller;
>>> - #interrupt-cells = <1>;
>>> - interrupt-parent = <>;
>>> - interrupts = ;
>>> - };
>>> -
>>> - /* dw_apb_ictl is used as primary interrupt controller */
>>> - vic: interrupt-controller@1013 {
>>> - compatible = "snps,dw-apb-ictl";
>>> - reg = <0x1013 0x1000>;
>>> - interrupt-controller;
>>> - #interrupt-cells = <1>;
>>> - };
>>> diff --git
>>> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>>>
>>> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>>> new file mode 100644
>>> index 000..70c12979c843bf0
>>> --- /dev/null
>>> +++
>>> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>>> @@ -0,0 +1,75 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id:
>>> http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
>>> +
>>> +maintainers:
>>> + - Marc Zyngier
>>
>> Usually this would be an owner for this IP block, not the subsystem
>> maintainer.
>
> OK, I will change it to the author of the file "snps,dw-apb-ictl.txt".
>
>
>>
>>> +
>>> +description:
>>> + Synopsys DesignWare provides interrupt controller IP for APB known as
>>> + dw_apb_ictl. The IP is used as secondary interrupt controller in some
>>> SoCs
>>> + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary
>>> + interrupt controller in some SoCs, e.g. Hisilicon SD5203.
>>> +
>>> +allOf:
>>> + - $ref: /schemas/interrupt-controller.yaml#
>>
>> You can drop this, it's already applied based on node name.
> But if we drop this, the "snps,dw-apb-ictl.yaml" can not require that the
> node name
> must match '^interrupt-controller(@[0-9a-f,]+)*$'. The problem of Patch 6/6
> was
> discovered by this.
>
>>
>>> +
>>> +properties:
>>> + compatible:
>>> +const: snps,dw-apb-ictl
>>> +
>>> + interrupt-controller: true
>>> +
>>> + reg:
>>> +description:
>>> + Physical base address of the controller and length of memory mapped
>>> + region starting with ENABLE_LOW register.
>>
>> Need to define how many reg regions (maxItems: 1).
>
> OK, I
Re: [PATCH v5 5/6] dt-bindings: dw-apb-ictl: convert to json-schema
On 2020/9/24 4:49, Rob Herring wrote:
> On Fri, Sep 18, 2020 at 07:22:01PM +0800, Zhen Lei wrote:
>> Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
>> binding to DT schema format using json-schema.
>>
>> Signed-off-by: Zhen Lei
>> ---
>> .../interrupt-controller/snps,dw-apb-ictl.txt | 43 -
>> .../interrupt-controller/snps,dw-apb-ictl.yaml | 75
>> ++
>> 2 files changed, 75 insertions(+), 43 deletions(-)
>> delete mode 100644
>> Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>> create mode 100644
>> Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>>
>> diff --git
>> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>>
>> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>> deleted file mode 100644
>> index 2db59df9408f4c6..000
>> ---
>> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
>> +++ /dev/null
>> @@ -1,43 +0,0 @@
>> -Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
>> -
>> -Synopsys DesignWare provides interrupt controller IP for APB known as
>> -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
>> with
>> -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
>> -controller in some SoCs, e.g. Hisilicon SD5203.
>> -
>> -Required properties:
>> -- compatible: shall be "snps,dw-apb-ictl"
>> -- reg: physical base address of the controller and length of memory mapped
>> - region starting with ENABLE_LOW register
>> -- interrupt-controller: identifies the node as an interrupt controller
>> -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall
>> be 1
>> -
>> -Additional required property when it's used as secondary interrupt
>> controller:
>> -- interrupts: interrupt reference to primary interrupt controller
>> -
>> -The interrupt sources map to the corresponding bits in the interrupt
>> -registers, i.e.
>> -- 0 maps to bit 0 of low interrupts,
>> -- 1 maps to bit 1 of low interrupts,
>> -- 32 maps to bit 0 of high interrupts,
>> -- 33 maps to bit 1 of high interrupts,
>> -- (optional) fast interrupts start at 64.
>> -
>> -Example:
>> -/* dw_apb_ictl is used as secondary interrupt controller */
>> -aic: interrupt-controller@3000 {
>> -compatible = "snps,dw-apb-ictl";
>> -reg = <0x3000 0xc00>;
>> -interrupt-controller;
>> -#interrupt-cells = <1>;
>> -interrupt-parent = <>;
>> -interrupts = ;
>> -};
>> -
>> -/* dw_apb_ictl is used as primary interrupt controller */
>> -vic: interrupt-controller@1013 {
>> -compatible = "snps,dw-apb-ictl";
>> -reg = <0x1013 0x1000>;
>> -interrupt-controller;
>> -#interrupt-cells = <1>;
>> -};
>> diff --git
>> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>>
>> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>> new file mode 100644
>> index 000..70c12979c843bf0
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>> @@ -0,0 +1,75 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>> http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
>> +
>> +maintainers:
>> + - Marc Zyngier
>
> Usually this would be an owner for this IP block, not the subsystem
> maintainer.
OK, I will change it to the author of the file "snps,dw-apb-ictl.txt".
>
>> +
>> +description:
>> + Synopsys DesignWare provides interrupt controller IP for APB known as
>> + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
>> + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary
>> + interrupt controller in some SoCs, e.g. Hisilicon SD5203.
>> +
>> +allOf:
>> + - $ref: /schemas/interrupt-controller.yaml#
>
> You can drop this, it's already applied based on node name.
But if we drop this, the "snps,dw-apb-ictl.yaml" can not require that the node
name
must match '^interrupt-controller(@[0-9a-f,]+)*$'. The problem of Patch 6/6 was
discovered by this.
>
>> +
>> +properties:
>> + compatible:
>> +const: snps,dw-apb-ictl
>> +
>> + interrupt-controller: true
>> +
>> + reg:
>> +description:
>> + Physical base address of the controller and length of memory mapped
>> + region starting with ENABLE_LOW register.
>
> Need to define how many reg regions (maxItems: 1).
OK, I will add it.
>
>> +
>> + interrupts:
>> +description:
>> + Interrupt reference to primary interrupt controller.
>> +
>> + The interrupt sources map to the corresponding
Re: [PATCH v5 5/6] dt-bindings: dw-apb-ictl: convert to json-schema
On Fri, Sep 18, 2020 at 07:22:01PM +0800, Zhen Lei wrote:
> Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
> binding to DT schema format using json-schema.
>
> Signed-off-by: Zhen Lei
> ---
> .../interrupt-controller/snps,dw-apb-ictl.txt | 43 -
> .../interrupt-controller/snps,dw-apb-ictl.yaml | 75
> ++
> 2 files changed, 75 insertions(+), 43 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
> create mode 100644
> Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
> deleted file mode 100644
> index 2db59df9408f4c6..000
> ---
> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
> +++ /dev/null
> @@ -1,43 +0,0 @@
> -Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
> -
> -Synopsys DesignWare provides interrupt controller IP for APB known as
> -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
> with
> -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
> -controller in some SoCs, e.g. Hisilicon SD5203.
> -
> -Required properties:
> -- compatible: shall be "snps,dw-apb-ictl"
> -- reg: physical base address of the controller and length of memory mapped
> - region starting with ENABLE_LOW register
> -- interrupt-controller: identifies the node as an interrupt controller
> -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall
> be 1
> -
> -Additional required property when it's used as secondary interrupt
> controller:
> -- interrupts: interrupt reference to primary interrupt controller
> -
> -The interrupt sources map to the corresponding bits in the interrupt
> -registers, i.e.
> -- 0 maps to bit 0 of low interrupts,
> -- 1 maps to bit 1 of low interrupts,
> -- 32 maps to bit 0 of high interrupts,
> -- 33 maps to bit 1 of high interrupts,
> -- (optional) fast interrupts start at 64.
> -
> -Example:
> - /* dw_apb_ictl is used as secondary interrupt controller */
> - aic: interrupt-controller@3000 {
> - compatible = "snps,dw-apb-ictl";
> - reg = <0x3000 0xc00>;
> - interrupt-controller;
> - #interrupt-cells = <1>;
> - interrupt-parent = <>;
> - interrupts = ;
> - };
> -
> - /* dw_apb_ictl is used as primary interrupt controller */
> - vic: interrupt-controller@1013 {
> - compatible = "snps,dw-apb-ictl";
> - reg = <0x1013 0x1000>;
> - interrupt-controller;
> - #interrupt-cells = <1>;
> - };
> diff --git
> a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
>
> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
> new file mode 100644
> index 000..70c12979c843bf0
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
> @@ -0,0 +1,75 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
> +
> +maintainers:
> + - Marc Zyngier
Usually this would be an owner for this IP block, not the subsystem
maintainer.
> +
> +description:
> + Synopsys DesignWare provides interrupt controller IP for APB known as
> + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
> + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary
> + interrupt controller in some SoCs, e.g. Hisilicon SD5203.
> +
> +allOf:
> + - $ref: /schemas/interrupt-controller.yaml#
You can drop this, it's already applied based on node name.
> +
> +properties:
> + compatible:
> +const: snps,dw-apb-ictl
> +
> + interrupt-controller: true
> +
> + reg:
> +description:
> + Physical base address of the controller and length of memory mapped
> + region starting with ENABLE_LOW register.
Need to define how many reg regions (maxItems: 1).
> +
> + interrupts:
> +description:
> + Interrupt reference to primary interrupt controller.
> +
> + The interrupt sources map to the corresponding bits in the interrupt
> + registers, i.e.
> + - 0 maps to bit 0 of low interrupts,
> + - 1 maps to bit 1 of low interrupts,
> + - 32 maps to bit 0 of high interrupts,
> + - 33 maps to bit 1 of high interrupts,
> + - (optional) fast interrupts start at 64.
> +minItems: 1
> +maxItems: 65
65 connections to the primary interrupt controller? I think this is for
the child interrupts? If so, move to
[PATCH v5 5/6] dt-bindings: dw-apb-ictl: convert to json-schema
Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
binding to DT schema format using json-schema.
Signed-off-by: Zhen Lei
---
.../interrupt-controller/snps,dw-apb-ictl.txt | 43 -
.../interrupt-controller/snps,dw-apb-ictl.yaml | 75 ++
2 files changed, 75 insertions(+), 43 deletions(-)
delete mode 100644
Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
create mode 100644
Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
deleted file mode 100644
index 2db59df9408f4c6..000
---
a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
-
-Synopsys DesignWare provides interrupt controller IP for APB known as
-dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with
-APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
-controller in some SoCs, e.g. Hisilicon SD5203.
-
-Required properties:
-- compatible: shall be "snps,dw-apb-ictl"
-- reg: physical base address of the controller and length of memory mapped
- region starting with ENABLE_LOW register
-- interrupt-controller: identifies the node as an interrupt controller
-- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be
1
-
-Additional required property when it's used as secondary interrupt controller:
-- interrupts: interrupt reference to primary interrupt controller
-
-The interrupt sources map to the corresponding bits in the interrupt
-registers, i.e.
-- 0 maps to bit 0 of low interrupts,
-- 1 maps to bit 1 of low interrupts,
-- 32 maps to bit 0 of high interrupts,
-- 33 maps to bit 1 of high interrupts,
-- (optional) fast interrupts start at 64.
-
-Example:
- /* dw_apb_ictl is used as secondary interrupt controller */
- aic: interrupt-controller@3000 {
- compatible = "snps,dw-apb-ictl";
- reg = <0x3000 0xc00>;
- interrupt-controller;
- #interrupt-cells = <1>;
- interrupt-parent = <>;
- interrupts = ;
- };
-
- /* dw_apb_ictl is used as primary interrupt controller */
- vic: interrupt-controller@1013 {
- compatible = "snps,dw-apb-ictl";
- reg = <0x1013 0x1000>;
- interrupt-controller;
- #interrupt-cells = <1>;
- };
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
new file mode 100644
index 000..70c12979c843bf0
--- /dev/null
+++
b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
+
+maintainers:
+ - Marc Zyngier
+
+description:
+ Synopsys DesignWare provides interrupt controller IP for APB known as
+ dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
+ with APB bus, e.g. Marvell Armada 1500. It can also be used as primary
+ interrupt controller in some SoCs, e.g. Hisilicon SD5203.
+
+allOf:
+ - $ref: /schemas/interrupt-controller.yaml#
+
+properties:
+ compatible:
+const: snps,dw-apb-ictl
+
+ interrupt-controller: true
+
+ reg:
+description:
+ Physical base address of the controller and length of memory mapped
+ region starting with ENABLE_LOW register.
+
+ interrupts:
+description:
+ Interrupt reference to primary interrupt controller.
+
+ The interrupt sources map to the corresponding bits in the interrupt
+ registers, i.e.
+ - 0 maps to bit 0 of low interrupts,
+ - 1 maps to bit 1 of low interrupts,
+ - 32 maps to bit 0 of high interrupts,
+ - 33 maps to bit 1 of high interrupts,
+ - (optional) fast interrupts start at 64.
+minItems: 1
+maxItems: 65
+
+ "#interrupt-cells":
+description:
+ Number of cells to encode an interrupt-specifier.
+const: 1
+
+required:
+ - compatible
+ - reg
+ - interrupt-controller
+ - '#interrupt-cells'
+
+examples:
+ - |
+/* dw_apb_ictl is used as secondary interrupt controller */
+aic: interrupt-controller@3000 {
+compatible = "snps,dw-apb-ictl";
+reg = <0x3000 0xc00>;
+interrupt-controller;
+#interrupt-cells = <1>;
+interrupt-parent = <>;
+interrupts = <0 3 4>;
+};
+
+/* dw_apb_ictl is used as primary interrupt controller */
+
