Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, [auto build test ERROR on v4.8-rc1] [also build test ERROR on next-20160809] [cannot apply to rockchip/for-next devfreq/for-rafael linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lin-Huang/rk3399-support-ddr-frequency-scaling/20160810-114433 config: i386-allyesconfig (attached as .config) compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/built-in.o: In function `rk3399_dmc_irq': >> rk3399_dmc.c:(.text+0x27e5a15): undefined reference to `arm_smccc_smc' drivers/built-in.o: In function `rk3399_dmcfreq_probe': rk3399_dmc.c:(.text+0x27e62a7): undefined reference to `arm_smccc_smc' rk3399_dmc.c:(.text+0x27e6332): undefined reference to `arm_smccc_smc' --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: Binary data
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, [auto build test ERROR on v4.8-rc1] [also build test ERROR on next-20160809] [cannot apply to rockchip/for-next devfreq/for-rafael linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lin-Huang/rk3399-support-ddr-frequency-scaling/20160810-114433 config: x86_64-allmodconfig (attached as .config) compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): >> ERROR: "arm_smccc_smc" [drivers/devfreq/rk3399_dmc.ko] undefined! --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: Binary data
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, [auto build test ERROR on v4.8-rc1] [also build test ERROR on next-20160809] [cannot apply to rockchip/for-next devfreq/for-rafael linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lin-Huang/rk3399-support-ddr-frequency-scaling/20160810-114433 config: x86_64-allmodconfig (attached as .config) compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): >> ERROR: "arm_smccc_smc" [drivers/devfreq/rk3399_dmc.ko] undefined! --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: Binary data
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, [auto build test ERROR on v4.8-rc1] [also build test ERROR on next-20160809] [cannot apply to rockchip/for-next devfreq/for-rafael linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lin-Huang/rk3399-support-ddr-frequency-scaling/20160810-114433 config: i386-allyesconfig (attached as .config) compiler: gcc-6 (Debian 6.1.1-9) 6.1.1 20160705 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/built-in.o: In function `rk3399_dmc_irq': >> rk3399_dmc.c:(.text+0x27e5a15): undefined reference to `arm_smccc_smc' drivers/built-in.o: In function `rk3399_dmcfreq_probe': rk3399_dmc.c:(.text+0x27e62a7): undefined reference to `arm_smccc_smc' rk3399_dmc.c:(.text+0x27e6332): undefined reference to `arm_smccc_smc' --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation .config.gz Description: Binary data
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, I add the some comment on below. If you modify them, feel free to add the my reviewed tag on next version: Reviewed-by: Chanwoo ChoiOn 2016년 08월 10일 12:26, Lin Huang wrote: > base on dfi result, we do ddr frequency scaling, register > dmc driver to devfreq framework, and use simple-ondemand > policy. > > Signed-off-by: Lin Huang > --- > Changes in v5: > - improve dmc driver suggest by Chanwoo Choi > > Changes in v4: > - use arm_smccc_smc() function talk to bl31 > - delete rockchip_dmc.c file and config > - delete dmc_notify > - adjust probe order > > Changes in v3: > - operate dram setting through sip call > - imporve set rate flow > > Changes in v2: > - None > > Changes in v1: > - move dfi controller to event > - fix set voltage sequence when set rate fail > - change Kconfig type from tristate to bool > - move unuse EXPORT_SYMBOL_GPL() > > drivers/devfreq/Kconfig | 9 + > drivers/devfreq/Makefile | 1 + > drivers/devfreq/rk3399_dmc.c | 512 > +++ > 3 files changed, 522 insertions(+) > create mode 100644 drivers/devfreq/rk3399_dmc.c > > diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig > index a5be56e..749499d 100644 > --- a/drivers/devfreq/Kconfig > +++ b/drivers/devfreq/Kconfig > @@ -100,6 +100,15 @@ config ARM_TEGRA_DEVFREQ > It reads ACTMON counters of memory controllers and adjusts the > operating frequencies and voltages with OPP support. > > +config ARM_RK3399_DMC_DEVFREQ > + tristate "ARM RK3399 DMC DEVFREQ Driver" depend on ARCH_ROCKCHIP ? > + select PM_OPP > + select DEVFREQ_GOV_SIMPLE_ONDEMAND This entry needs the following command in Kconfig: select DEVFREQ_EVENT_ROCKCHIP_DFI > + help > + This adds the DEVFREQ driver for the RK3399 dmc(Dynamic Memory > Controller). Use a capital letter for and abbreviation. s/dmc -> DMC > + It sets the frequency for the memory controller and reads the > usage counts > + from hardware. > + > source "drivers/devfreq/event/Kconfig" > > endif # PM_DEVFREQ > diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile > index 09f11d9..70d9549 100644 > --- a/drivers/devfreq/Makefile > +++ b/drivers/devfreq/Makefile > @@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o > # DEVFREQ Drivers > obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra-devfreq.o > +obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o The entry would be positioned The position of CONFIG_ARM_RK3399_DMC_DEVFREQ would be good on between EXYNOS_BUS_DEVFREQ and TEGRA_DEVFREQ because of the alphabetical order. > > # DEVFREQ Event Drivers > obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ > diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c > new file mode 100644 > index 000..c1157ba > --- /dev/null > +++ b/drivers/devfreq/rk3399_dmc.c > @@ -0,0 +1,512 @@ > +/* > + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd. > + * Author: Lin Huang > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +struct dram_timing { > + unsigned int ddr3_speed_bin; > + unsigned int pd_idle; > + unsigned int sr_idle; > + unsigned int sr_mc_gate_idle; > + unsigned int srpd_lite_idle; > + unsigned int standby_idle; > + unsigned int dram_dll_dis_freq; > + unsigned int phy_dll_dis_freq; > + unsigned int ddr3_odt_dis_freq; > + unsigned int ddr3_drv; > + unsigned int ddr3_odt; > + unsigned int phy_ddr3_ca_drv; > + unsigned int phy_ddr3_dq_drv; > + unsigned int phy_ddr3_odt; > + unsigned int lpddr3_odt_dis_freq; > + unsigned int lpddr3_drv; > + unsigned int lpddr3_odt; > + unsigned int phy_lpddr3_ca_drv; > + unsigned int phy_lpddr3_dq_drv; > + unsigned int phy_lpddr3_odt; > + unsigned int lpddr4_odt_dis_freq; > + unsigned int lpddr4_drv; > + unsigned int lpddr4_dq_odt; > + unsigned int lpddr4_ca_odt; > + unsigned int phy_lpddr4_ca_drv; > + unsigned int phy_lpddr4_ck_cs_drv; > + unsigned int phy_lpddr4_dq_drv; > + unsigned int phy_lpddr4_odt; > +}; > + > +struct rk3399_dmcfreq { > + struct device *dev; > + struct devfreq
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, I add the some comment on below. If you modify them, feel free to add the my reviewed tag on next version: Reviewed-by: Chanwoo Choi On 2016년 08월 10일 12:26, Lin Huang wrote: > base on dfi result, we do ddr frequency scaling, register > dmc driver to devfreq framework, and use simple-ondemand > policy. > > Signed-off-by: Lin Huang > --- > Changes in v5: > - improve dmc driver suggest by Chanwoo Choi > > Changes in v4: > - use arm_smccc_smc() function talk to bl31 > - delete rockchip_dmc.c file and config > - delete dmc_notify > - adjust probe order > > Changes in v3: > - operate dram setting through sip call > - imporve set rate flow > > Changes in v2: > - None > > Changes in v1: > - move dfi controller to event > - fix set voltage sequence when set rate fail > - change Kconfig type from tristate to bool > - move unuse EXPORT_SYMBOL_GPL() > > drivers/devfreq/Kconfig | 9 + > drivers/devfreq/Makefile | 1 + > drivers/devfreq/rk3399_dmc.c | 512 > +++ > 3 files changed, 522 insertions(+) > create mode 100644 drivers/devfreq/rk3399_dmc.c > > diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig > index a5be56e..749499d 100644 > --- a/drivers/devfreq/Kconfig > +++ b/drivers/devfreq/Kconfig > @@ -100,6 +100,15 @@ config ARM_TEGRA_DEVFREQ > It reads ACTMON counters of memory controllers and adjusts the > operating frequencies and voltages with OPP support. > > +config ARM_RK3399_DMC_DEVFREQ > + tristate "ARM RK3399 DMC DEVFREQ Driver" depend on ARCH_ROCKCHIP ? > + select PM_OPP > + select DEVFREQ_GOV_SIMPLE_ONDEMAND This entry needs the following command in Kconfig: select DEVFREQ_EVENT_ROCKCHIP_DFI > + help > + This adds the DEVFREQ driver for the RK3399 dmc(Dynamic Memory > Controller). Use a capital letter for and abbreviation. s/dmc -> DMC > + It sets the frequency for the memory controller and reads the > usage counts > + from hardware. > + > source "drivers/devfreq/event/Kconfig" > > endif # PM_DEVFREQ > diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile > index 09f11d9..70d9549 100644 > --- a/drivers/devfreq/Makefile > +++ b/drivers/devfreq/Makefile > @@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o > # DEVFREQ Drivers > obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o > obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra-devfreq.o > +obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o The entry would be positioned The position of CONFIG_ARM_RK3399_DMC_DEVFREQ would be good on between EXYNOS_BUS_DEVFREQ and TEGRA_DEVFREQ because of the alphabetical order. > > # DEVFREQ Event Drivers > obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ > diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c > new file mode 100644 > index 000..c1157ba > --- /dev/null > +++ b/drivers/devfreq/rk3399_dmc.c > @@ -0,0 +1,512 @@ > +/* > + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd. > + * Author: Lin Huang > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms and conditions of the GNU General Public License, > + * version 2, as published by the Free Software Foundation. > + * > + * This program is distributed in the hope it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for > + * more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +struct dram_timing { > + unsigned int ddr3_speed_bin; > + unsigned int pd_idle; > + unsigned int sr_idle; > + unsigned int sr_mc_gate_idle; > + unsigned int srpd_lite_idle; > + unsigned int standby_idle; > + unsigned int dram_dll_dis_freq; > + unsigned int phy_dll_dis_freq; > + unsigned int ddr3_odt_dis_freq; > + unsigned int ddr3_drv; > + unsigned int ddr3_odt; > + unsigned int phy_ddr3_ca_drv; > + unsigned int phy_ddr3_dq_drv; > + unsigned int phy_ddr3_odt; > + unsigned int lpddr3_odt_dis_freq; > + unsigned int lpddr3_drv; > + unsigned int lpddr3_odt; > + unsigned int phy_lpddr3_ca_drv; > + unsigned int phy_lpddr3_dq_drv; > + unsigned int phy_lpddr3_odt; > + unsigned int lpddr4_odt_dis_freq; > + unsigned int lpddr4_drv; > + unsigned int lpddr4_dq_odt; > + unsigned int lpddr4_ca_odt; > + unsigned int phy_lpddr4_ca_drv; > + unsigned int phy_lpddr4_ck_cs_drv; > + unsigned int phy_lpddr4_dq_drv; > + unsigned int phy_lpddr4_odt; > +}; > + > +struct rk3399_dmcfreq { > + struct device *dev; > + struct devfreq *devfreq; > + struct devfreq_simple_ondemand_data ondemand_data; >
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, [auto build test WARNING on v4.8-rc1] [also build test WARNING on next-20160809] [cannot apply to rockchip/for-next devfreq/for-rafael linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lin-Huang/rk3399-support-ddr-frequency-scaling/20160810-114433 coccinelle warnings: (new ones prefixed by >>) >> drivers/devfreq/rk3399_dmc.c:393:2-3: Unneeded semicolon Please review and possibly fold the followup patch. --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
Re: [PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
Hi Lin, [auto build test WARNING on v4.8-rc1] [also build test WARNING on next-20160809] [cannot apply to rockchip/for-next devfreq/for-rafael linux/master] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lin-Huang/rk3399-support-ddr-frequency-scaling/20160810-114433 coccinelle warnings: (new ones prefixed by >>) >> drivers/devfreq/rk3399_dmc.c:393:2-3: Unneeded semicolon Please review and possibly fold the followup patch. --- 0-DAY kernel test infrastructureOpen Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
[PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
base on dfi result, we do ddr frequency scaling, register dmc driver to devfreq framework, and use simple-ondemand policy. Signed-off-by: Lin Huang--- Changes in v5: - improve dmc driver suggest by Chanwoo Choi Changes in v4: - use arm_smccc_smc() function talk to bl31 - delete rockchip_dmc.c file and config - delete dmc_notify - adjust probe order Changes in v3: - operate dram setting through sip call - imporve set rate flow Changes in v2: - None Changes in v1: - move dfi controller to event - fix set voltage sequence when set rate fail - change Kconfig type from tristate to bool - move unuse EXPORT_SYMBOL_GPL() drivers/devfreq/Kconfig | 9 + drivers/devfreq/Makefile | 1 + drivers/devfreq/rk3399_dmc.c | 512 +++ 3 files changed, 522 insertions(+) create mode 100644 drivers/devfreq/rk3399_dmc.c diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig index a5be56e..749499d 100644 --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig @@ -100,6 +100,15 @@ config ARM_TEGRA_DEVFREQ It reads ACTMON counters of memory controllers and adjusts the operating frequencies and voltages with OPP support. +config ARM_RK3399_DMC_DEVFREQ + tristate "ARM RK3399 DMC DEVFREQ Driver" + select PM_OPP + select DEVFREQ_GOV_SIMPLE_ONDEMAND + help + This adds the DEVFREQ driver for the RK3399 dmc(Dynamic Memory Controller). + It sets the frequency for the memory controller and reads the usage counts + from hardware. + source "drivers/devfreq/event/Kconfig" endif # PM_DEVFREQ diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile index 09f11d9..70d9549 100644 --- a/drivers/devfreq/Makefile +++ b/drivers/devfreq/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o # DEVFREQ Drivers obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o obj-$(CONFIG_ARM_TEGRA_DEVFREQ)+= tegra-devfreq.o +obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o # DEVFREQ Event Drivers obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c new file mode 100644 index 000..c1157ba --- /dev/null +++ b/drivers/devfreq/rk3399_dmc.c @@ -0,0 +1,512 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd. + * Author: Lin Huang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +struct dram_timing { + unsigned int ddr3_speed_bin; + unsigned int pd_idle; + unsigned int sr_idle; + unsigned int sr_mc_gate_idle; + unsigned int srpd_lite_idle; + unsigned int standby_idle; + unsigned int dram_dll_dis_freq; + unsigned int phy_dll_dis_freq; + unsigned int ddr3_odt_dis_freq; + unsigned int ddr3_drv; + unsigned int ddr3_odt; + unsigned int phy_ddr3_ca_drv; + unsigned int phy_ddr3_dq_drv; + unsigned int phy_ddr3_odt; + unsigned int lpddr3_odt_dis_freq; + unsigned int lpddr3_drv; + unsigned int lpddr3_odt; + unsigned int phy_lpddr3_ca_drv; + unsigned int phy_lpddr3_dq_drv; + unsigned int phy_lpddr3_odt; + unsigned int lpddr4_odt_dis_freq; + unsigned int lpddr4_drv; + unsigned int lpddr4_dq_odt; + unsigned int lpddr4_ca_odt; + unsigned int phy_lpddr4_ca_drv; + unsigned int phy_lpddr4_ck_cs_drv; + unsigned int phy_lpddr4_dq_drv; + unsigned int phy_lpddr4_odt; +}; + +struct rk3399_dmcfreq { + struct device *dev; + struct devfreq *devfreq; + struct devfreq_simple_ondemand_data ondemand_data; + struct clk *dmc_clk; + struct devfreq_event_dev *edev; + struct mutex lock; + struct dram_timing *timing; + + /* +* DDR Converser of Frequency (DCF) is used to implement DDR frequency +* conversion without the participation of CPU, we will implement and +* control it in arm trust firmware. +*/ + wait_queue_head_t wait_dcf_queue; + int irq; + int wait_dcf_flag; + struct regulator *vdd_center; + unsigned long rate, target_rate; + unsigned long volt, target_volt; + struct dev_pm_opp *curr_opp; +}; + +static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, +
[PATCH v5 7/8] PM / devfreq: rockchip: add devfreq driver for rk3399 dmc
base on dfi result, we do ddr frequency scaling, register dmc driver to devfreq framework, and use simple-ondemand policy. Signed-off-by: Lin Huang --- Changes in v5: - improve dmc driver suggest by Chanwoo Choi Changes in v4: - use arm_smccc_smc() function talk to bl31 - delete rockchip_dmc.c file and config - delete dmc_notify - adjust probe order Changes in v3: - operate dram setting through sip call - imporve set rate flow Changes in v2: - None Changes in v1: - move dfi controller to event - fix set voltage sequence when set rate fail - change Kconfig type from tristate to bool - move unuse EXPORT_SYMBOL_GPL() drivers/devfreq/Kconfig | 9 + drivers/devfreq/Makefile | 1 + drivers/devfreq/rk3399_dmc.c | 512 +++ 3 files changed, 522 insertions(+) create mode 100644 drivers/devfreq/rk3399_dmc.c diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig index a5be56e..749499d 100644 --- a/drivers/devfreq/Kconfig +++ b/drivers/devfreq/Kconfig @@ -100,6 +100,15 @@ config ARM_TEGRA_DEVFREQ It reads ACTMON counters of memory controllers and adjusts the operating frequencies and voltages with OPP support. +config ARM_RK3399_DMC_DEVFREQ + tristate "ARM RK3399 DMC DEVFREQ Driver" + select PM_OPP + select DEVFREQ_GOV_SIMPLE_ONDEMAND + help + This adds the DEVFREQ driver for the RK3399 dmc(Dynamic Memory Controller). + It sets the frequency for the memory controller and reads the usage counts + from hardware. + source "drivers/devfreq/event/Kconfig" endif # PM_DEVFREQ diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile index 09f11d9..70d9549 100644 --- a/drivers/devfreq/Makefile +++ b/drivers/devfreq/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o # DEVFREQ Drivers obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o obj-$(CONFIG_ARM_TEGRA_DEVFREQ)+= tegra-devfreq.o +obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o # DEVFREQ Event Drivers obj-$(CONFIG_PM_DEVFREQ_EVENT) += event/ diff --git a/drivers/devfreq/rk3399_dmc.c b/drivers/devfreq/rk3399_dmc.c new file mode 100644 index 000..c1157ba --- /dev/null +++ b/drivers/devfreq/rk3399_dmc.c @@ -0,0 +1,512 @@ +/* + * Copyright (c) 2016, Fuzhou Rockchip Electronics Co., Ltd. + * Author: Lin Huang + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +struct dram_timing { + unsigned int ddr3_speed_bin; + unsigned int pd_idle; + unsigned int sr_idle; + unsigned int sr_mc_gate_idle; + unsigned int srpd_lite_idle; + unsigned int standby_idle; + unsigned int dram_dll_dis_freq; + unsigned int phy_dll_dis_freq; + unsigned int ddr3_odt_dis_freq; + unsigned int ddr3_drv; + unsigned int ddr3_odt; + unsigned int phy_ddr3_ca_drv; + unsigned int phy_ddr3_dq_drv; + unsigned int phy_ddr3_odt; + unsigned int lpddr3_odt_dis_freq; + unsigned int lpddr3_drv; + unsigned int lpddr3_odt; + unsigned int phy_lpddr3_ca_drv; + unsigned int phy_lpddr3_dq_drv; + unsigned int phy_lpddr3_odt; + unsigned int lpddr4_odt_dis_freq; + unsigned int lpddr4_drv; + unsigned int lpddr4_dq_odt; + unsigned int lpddr4_ca_odt; + unsigned int phy_lpddr4_ca_drv; + unsigned int phy_lpddr4_ck_cs_drv; + unsigned int phy_lpddr4_dq_drv; + unsigned int phy_lpddr4_odt; +}; + +struct rk3399_dmcfreq { + struct device *dev; + struct devfreq *devfreq; + struct devfreq_simple_ondemand_data ondemand_data; + struct clk *dmc_clk; + struct devfreq_event_dev *edev; + struct mutex lock; + struct dram_timing *timing; + + /* +* DDR Converser of Frequency (DCF) is used to implement DDR frequency +* conversion without the participation of CPU, we will implement and +* control it in arm trust firmware. +*/ + wait_queue_head_t wait_dcf_queue; + int irq; + int wait_dcf_flag; + struct regulator *vdd_center; + unsigned long rate, target_rate; + unsigned long volt, target_volt; + struct dev_pm_opp *curr_opp; +}; + +static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq, +u32 flags) +{ + struct