Re: [PATCH v6] mtd: spinand: micron: add support for MT29F2G01AAAED

2020-11-06 Thread Boris Brezillon
On Fri,  6 Nov 2020 22:28:38 +0800
Thirumalesha Narasimhappa  wrote:

> The MT29F2G01AAAED is a single die, 2Gb Micron SPI NAND Flash with 4-bit
> ECC
> 
> Signed-off-by: Thirumalesha Narasimhappa 
> ---
> 
> v6: Reverted the SPINAND_OP_VARIANTS() as they were in v4 for
> MT29F2G01AAAED device
> 
> v5: As per the review comments, the changes were reverted to the v2,
> except the MT29F2G01AAAED device related (including the review comments)
> 
> v4: Split patch into two parts,
> 1. Generalise the oob structure name & function names as show in v3
> 2. Add support for MT29F2G01AAAED device
>a. Add oob section check in micron_ooblayout_free function
>b. Rename mt29f2g01aaaed_* to generic name micron_4_*
> 
> v3: As per the review comments,
>  1. Renamed read_cache_variants as quadio_read_cache_variants,
> write_cache_variants as
>   x4_write_cache_variants/x1_write_cache_variants,
> update_cache_variants as
>   x4_update_cache_variants/x1_update_cache_variants,
> read_cache_variants as x4_read_cache_variants

We want those renames in a separate patch (ideally happening before
this one).


[PATCH v6] mtd: spinand: micron: add support for MT29F2G01AAAED

2020-11-06 Thread Thirumalesha Narasimhappa
The MT29F2G01AAAED is a single die, 2Gb Micron SPI NAND Flash with 4-bit
ECC

Signed-off-by: Thirumalesha Narasimhappa 
---

v6: Reverted the SPINAND_OP_VARIANTS() as they were in v4 for
MT29F2G01AAAED device

v5: As per the review comments, the changes were reverted to the v2,
except the MT29F2G01AAAED device related (including the review comments)

v4: Split patch into two parts,
1. Generalise the oob structure name & function names as show in v3
2. Add support for MT29F2G01AAAED device
   a. Add oob section check in micron_ooblayout_free function
   b. Rename mt29f2g01aaaed_* to generic name micron_4_*

v3: As per the review comments,
 1. Renamed read_cache_variants as quadio_read_cache_variants,
write_cache_variants as
  x4_write_cache_variants/x1_write_cache_variants,
update_cache_variants as
  x4_update_cache_variants/x1_update_cache_variants,
read_cache_variants as x4_read_cache_variants
 2. Renamed micron_8_ooblayout as micron_grouped_ooblayout &
mt29f2g01aaaed_ooblayout as
  micron_interleaved_ooblayout
 3. Generalized page size based oob section check in
mt29f2g01aaaed_ooblayout_ecc function
  and separate case check for two bytes BBM reserved in
mt29f2g01aaaed_ooblayout_free function
 4. Removed mt29f2g01aaaed_ecc_get_status function &
MICRON_STATUS_ECC_1TO4_BITFLIPS

v2: Removed SPINAND_SELECT_TARGET as per the comments & fixed typo
errors

v1: Add support for Micron SPI Nand device MT29F2G01AAAED

 drivers/mtd/nand/spi/micron.c | 64 +++
 1 file changed, 64 insertions(+)

diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 5d370cfcdaaa..317866c077de 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -44,6 +44,19 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
SPINAND_PROG_LOAD(false, 0, NULL, 0));
 
+/* Micron  MT29F2G01AAAED Device */
+static SPINAND_OP_VARIANTS(x4_read_cache_variants,
+  SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+  SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+  SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+  SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 
0));
+
+static SPINAND_OP_VARIANTS(x1_write_cache_variants,
+  SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(x1_update_cache_variants,
+  SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
 static int micron_8_ooblayout_ecc(struct mtd_info *mtd, int section,
  struct mtd_oob_region *region)
 {
@@ -74,6 +87,47 @@ static const struct mtd_ooblayout_ops micron_8_ooblayout = {
.free = micron_8_ooblayout_free,
 };
 
+static int micron_4_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+   struct spinand_device *spinand = mtd_to_spinand(mtd);
+
+   if (section >= spinand->base.memorg.pagesize /
+   mtd->ecc_step_size)
+   return -ERANGE;
+
+   region->offset = (section * 16) + 8;
+   region->length = 8;
+
+   return 0;
+}
+
+static int micron_4_ooblayout_free(struct mtd_info *mtd, int section,
+  struct mtd_oob_region *region)
+{
+   struct spinand_device *spinand = mtd_to_spinand(mtd);
+
+   if (section >= spinand->base.memorg.pagesize /
+   mtd->ecc_step_size)
+   return -ERANGE;
+
+   if (section) {
+   region->offset = 16 * section;
+   region->length = 8;
+   } else {
+   /* section 0 has two bytes reserved for the BBM */
+   region->offset = 2;
+   region->length = 6;
+   }
+
+   return 0;
+}
+
+static const struct mtd_ooblayout_ops micron_4_ooblayout = {
+   .ecc = micron_4_ooblayout_ecc,
+   .free = micron_4_ooblayout_free,
+};
+
 static int micron_select_target(struct spinand_device *spinand,
unsigned int target)
 {
@@ -217,6 +271,16 @@ static const struct spinand_info micron_spinand_table[] = {
 SPINAND_ECCINFO(_8_ooblayout,
 micron_8_ecc_get_status),
 SPINAND_SELECT_TARGET(micron_select_target)),
+   /* M69A 2Gb 3.3V */
+   SPINAND_INFO("MT29F2G01AAAED",
+SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9F),
+NAND_MEMORG(1, 2048, 64, 64, 2048, 80, 2, 1, 1),
+NAND_ECCREQ(4, 512),
+SPINAND_INFO_OP_VARIANTS(_read_cache_variants,
+ _write_cache_variants,
+ _update_cache_variants),
+0,
+