[PATCH v7 3/8] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit

[Tiffany Lin]

From: Andrew-CT Chen 

Add VPU drivers for MT8173

Signed-off-by: Andrew-CT Chen 
Signed-off-by: Tiffany Lin 

---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index eab7efc..ae147bb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -125,6 +125,18 @@
clock-output-names = "cpum_ck";
};
 
+   reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   vpu_dma_reserved: vpu_dma_mem_region {
+   compatible = "shared-dma-pool";
+   reg = <0 0xb700 0 0x50>;
+   alignment = <0x1000>;
+   no-map;
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <>;
@@ -269,6 +281,17 @@
clock-names = "spi", "wrap";
};
 
+   vpu: vpu@1002 {
+   compatible = "mediatek,mt8173-vpu";
+   reg = <0 0x1002 0 0x3>,
+ <0 0x1005 0 0x100>;
+   reg-names = "tcm", "cfg_reg";
+   interrupts = ;
+   clocks = < CLK_TOP_SCP_SEL>;
+   clock-names = "main";
+   memory-region = <_dma_reserved>;
+   };
+
sysirq: intpol-controller@10200620 {
compatible = "mediatek,mt8173-sysirq",
 "mediatek,mt6577-sysirq";
-- 
1.7.9.5

[PATCH v7 3/8] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit

[Tiffany Lin]

From: Andrew-CT Chen 

Add VPU drivers for MT8173

Signed-off-by: Andrew-CT Chen 
Signed-off-by: Tiffany Lin 

---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index eab7efc..ae147bb 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -125,6 +125,18 @@
clock-output-names = "cpum_ck";
};
 
+   reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+   vpu_dma_reserved: vpu_dma_mem_region {
+   compatible = "shared-dma-pool";
+   reg = <0 0xb700 0 0x50>;
+   alignment = <0x1000>;
+   no-map;
+   };
+   };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <>;
@@ -269,6 +281,17 @@
clock-names = "spi", "wrap";
};
 
+   vpu: vpu@1002 {
+   compatible = "mediatek,mt8173-vpu";
+   reg = <0 0x1002 0 0x3>,
+ <0 0x1005 0 0x100>;
+   reg-names = "tcm", "cfg_reg";
+   interrupts = ;
+   clocks = < CLK_TOP_SCP_SEL>;
+   clock-names = "main";
+   memory-region = <_dma_reserved>;
+   };
+
sysirq: intpol-controller@10200620 {
compatible = "mediatek,mt8173-sysirq",
 "mediatek,mt6577-sysirq";
-- 
1.7.9.5