[PATCH v8 1/3] doc: dt: add cyclone-ps-spi binding document

2017-01-23 Thread Joshua Clayton
Describe a cyclone-ps-spi devicetree entry, required features

Signed-off-by: Joshua Clayton 
Acked-by: Rob Herring 
---
 .../bindings/fpga/altera-passive-serial.txt| 25 ++
 1 file changed, 25 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/altera-passive-serial.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt 
b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
new file mode 100644
index 000..b5f0bb5
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
@@ -0,0 +1,25 @@
+Altera Cyclone Passive Serial SPI FPGA Manager
+
+Altera Cyclone FPGAs support a method of loading the bitstream over what is
+referred to as "passive serial".
+The passive serial link is not technically spi, and might require extra
+circuits in order to play nicely with other spi slaves on the same bus.
+
+See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
+
+Required properties:
+- compatible: should contain "altr,fpga-passive-serial"
+- reg: spi chip select of the FPGA
+- nstat-gpios: status pin (referred to as nSTATUS in the cyclone manual)
+- nconfig-gpios: config pin (referred to as nCONFIG in the cyclone manual)
+- confd-gpios: confd pin (referred to as CONF_DONE in the cyclone manual)
+
+Example:
+   fpga_spi: evi-fpga-spi@0 {
+   compatible = "altr,cyclone-ps-spi-fpga-mgr";
+   spi-max-frequency = <2000>;
+   reg = <0>;
+   nconfig-gpios = < 9 GPIO_ACTIVE_LOW>;
+   nstat-gpios = < 11 GPIO_ACTIVE_LOW>;
+   confd-gpios = < 12 GPIO_ACTIVE_LOW>;
+   };
-- 
2.9.3



[PATCH v8 1/3] doc: dt: add cyclone-ps-spi binding document

2017-01-23 Thread Joshua Clayton
Describe a cyclone-ps-spi devicetree entry, required features

Signed-off-by: Joshua Clayton 
Acked-by: Rob Herring 
---
 .../bindings/fpga/altera-passive-serial.txt| 25 ++
 1 file changed, 25 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/fpga/altera-passive-serial.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt 
b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
new file mode 100644
index 000..b5f0bb5
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
@@ -0,0 +1,25 @@
+Altera Cyclone Passive Serial SPI FPGA Manager
+
+Altera Cyclone FPGAs support a method of loading the bitstream over what is
+referred to as "passive serial".
+The passive serial link is not technically spi, and might require extra
+circuits in order to play nicely with other spi slaves on the same bus.
+
+See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
+
+Required properties:
+- compatible: should contain "altr,fpga-passive-serial"
+- reg: spi chip select of the FPGA
+- nstat-gpios: status pin (referred to as nSTATUS in the cyclone manual)
+- nconfig-gpios: config pin (referred to as nCONFIG in the cyclone manual)
+- confd-gpios: confd pin (referred to as CONF_DONE in the cyclone manual)
+
+Example:
+   fpga_spi: evi-fpga-spi@0 {
+   compatible = "altr,cyclone-ps-spi-fpga-mgr";
+   spi-max-frequency = <2000>;
+   reg = <0>;
+   nconfig-gpios = < 9 GPIO_ACTIVE_LOW>;
+   nstat-gpios = < 11 GPIO_ACTIVE_LOW>;
+   confd-gpios = < 12 GPIO_ACTIVE_LOW>;
+   };
-- 
2.9.3